1 | /* |
2 | * Copyright (C) 2007-2023 Free Software Foundation, Inc. |
3 | * |
4 | * This file is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the |
6 | * Free Software Foundation; either version 3, or (at your option) any |
7 | * later version. |
8 | * |
9 | * This file is distributed in the hope that it will be useful, but |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | * General Public License for more details. |
13 | * |
14 | * Under Section 7 of GPL version 3, you are granted additional |
15 | * permissions described in the GCC Runtime Library Exception, version |
16 | * 3.1, as published by the Free Software Foundation. |
17 | * |
18 | * You should have received a copy of the GNU General Public License and |
19 | * a copy of the GCC Runtime Library Exception along with this program; |
20 | * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see |
21 | * <http://www.gnu.org/licenses/>. |
22 | */ |
23 | |
24 | #ifndef _CPUID_H_INCLUDED |
25 | #define _CPUID_H_INCLUDED |
26 | |
27 | /* %ecx */ |
28 | #define bit_SSE3 (1 << 0) |
29 | #define bit_PCLMUL (1 << 1) |
30 | #define bit_LZCNT (1 << 5) |
31 | #define bit_SSSE3 (1 << 9) |
32 | #define bit_FMA (1 << 12) |
33 | #define bit_CMPXCHG16B (1 << 13) |
34 | #define bit_SSE4_1 (1 << 19) |
35 | #define bit_SSE4_2 (1 << 20) |
36 | #define bit_MOVBE (1 << 22) |
37 | #define bit_POPCNT (1 << 23) |
38 | #define bit_AES (1 << 25) |
39 | #define bit_XSAVE (1 << 26) |
40 | #define bit_OSXSAVE (1 << 27) |
41 | #define bit_AVX (1 << 28) |
42 | #define bit_F16C (1 << 29) |
43 | #define bit_RDRND (1 << 30) |
44 | |
45 | /* %edx */ |
46 | #define bit_CMPXCHG8B (1 << 8) |
47 | #define bit_CMOV (1 << 15) |
48 | #define bit_MMX (1 << 23) |
49 | #define bit_FXSAVE (1 << 24) |
50 | #define bit_SSE (1 << 25) |
51 | #define bit_SSE2 (1 << 26) |
52 | |
53 | /* Extended Features (%eax == 0x80000001) */ |
54 | /* %ecx */ |
55 | #define bit_LAHF_LM (1 << 0) |
56 | #define bit_ABM (1 << 5) |
57 | #define bit_SSE4a (1 << 6) |
58 | #define bit_PRFCHW (1 << 8) |
59 | #define bit_XOP (1 << 11) |
60 | #define bit_LWP (1 << 15) |
61 | #define bit_FMA4 (1 << 16) |
62 | #define bit_TBM (1 << 21) |
63 | #define bit_MWAITX (1 << 29) |
64 | |
65 | /* %edx */ |
66 | #define bit_MMXEXT (1 << 22) |
67 | #define bit_LM (1 << 29) |
68 | #define bit_3DNOWP (1 << 30) |
69 | #define bit_3DNOW (1u << 31) |
70 | |
71 | /* %ebx */ |
72 | #define bit_CLZERO (1 << 0) |
73 | #define bit_WBNOINVD (1 << 9) |
74 | |
75 | /* Extended Features Leaf (%eax == 7, %ecx == 0) */ |
76 | /* %ebx */ |
77 | #define bit_FSGSBASE (1 << 0) |
78 | #define bit_SGX (1 << 2) |
79 | #define bit_BMI (1 << 3) |
80 | #define bit_HLE (1 << 4) |
81 | #define bit_AVX2 (1 << 5) |
82 | #define bit_BMI2 (1 << 8) |
83 | #define bit_RTM (1 << 11) |
84 | #define bit_AVX512F (1 << 16) |
85 | #define bit_AVX512DQ (1 << 17) |
86 | #define bit_RDSEED (1 << 18) |
87 | #define bit_ADX (1 << 19) |
88 | #define bit_AVX512IFMA (1 << 21) |
89 | #define bit_CLFLUSHOPT (1 << 23) |
90 | #define bit_CLWB (1 << 24) |
91 | #define bit_AVX512PF (1 << 26) |
92 | #define bit_AVX512ER (1 << 27) |
93 | #define bit_AVX512CD (1 << 28) |
94 | #define bit_SHA (1 << 29) |
95 | #define bit_AVX512BW (1 << 30) |
96 | #define bit_AVX512VL (1u << 31) |
97 | |
98 | /* %ecx */ |
99 | #define bit_PREFETCHWT1 (1 << 0) |
100 | #define bit_AVX512VBMI (1 << 1) |
101 | #define bit_PKU (1 << 3) |
102 | #define bit_OSPKE (1 << 4) |
103 | #define bit_WAITPKG (1 << 5) |
104 | #define bit_AVX512VBMI2 (1 << 6) |
105 | #define bit_SHSTK (1 << 7) |
106 | #define bit_GFNI (1 << 8) |
107 | #define bit_VAES (1 << 9) |
108 | #define bit_VPCLMULQDQ (1 << 10) |
109 | #define bit_AVX512VNNI (1 << 11) |
110 | #define bit_AVX512BITALG (1 << 12) |
111 | #define bit_AVX512VPOPCNTDQ (1 << 14) |
112 | #define bit_RDPID (1 << 22) |
113 | #define bit_KL (1 << 23) |
114 | #define bit_CLDEMOTE (1 << 25) |
115 | #define bit_MOVDIRI (1 << 27) |
116 | #define bit_MOVDIR64B (1 << 28) |
117 | #define bit_ENQCMD (1 << 29) |
118 | |
119 | /* %edx */ |
120 | #define bit_AVX5124VNNIW (1 << 2) |
121 | #define bit_AVX5124FMAPS (1 << 3) |
122 | #define bit_UINTR (1 << 5) |
123 | #define bit_AVX512VP2INTERSECT (1 << 8) |
124 | #define bit_SERIALIZE (1 << 14) |
125 | #define bit_TSXLDTRK (1 << 16) |
126 | #define bit_PCONFIG (1 << 18) |
127 | #define bit_IBT (1 << 20) |
128 | #define bit_AMX_BF16 (1 << 22) |
129 | #define bit_AVX512FP16 (1 << 23) |
130 | #define bit_AMX_TILE (1 << 24) |
131 | #define bit_AMX_INT8 (1 << 25) |
132 | |
133 | /* Extended Features Sub-leaf (%eax == 7, %ecx == 1) */ |
134 | /* %eax */ |
135 | #define bit_SHA512 (1 << 0) |
136 | #define bit_SM3 (1 << 1) |
137 | #define bit_SM4 (1 << 2) |
138 | #define bit_RAOINT (1 << 3) |
139 | #define bit_AVXVNNI (1 << 4) |
140 | #define bit_AVX512BF16 (1 << 5) |
141 | #define bit_CMPCCXADD (1 << 7) |
142 | #define bit_AMX_COMPLEX (1 << 8) |
143 | #define bit_AMX_FP16 (1 << 21) |
144 | #define bit_HRESET (1 << 22) |
145 | #define bit_AVXIFMA (1 << 23) |
146 | |
147 | /* %edx */ |
148 | #define bit_AVXVNNIINT8 (1 << 4) |
149 | #define bit_AVXNECONVERT (1 << 5) |
150 | #define bit_AVXVNNIINT16 (1 << 10) |
151 | #define bit_PREFETCHI (1 << 14) |
152 | #define bit_USER_MSR (1 << 15) |
153 | #define bit_APX_F (1 << 21) |
154 | |
155 | /* Extended State Enumeration Sub-leaf (%eax == 0xd, %ecx == 1) */ |
156 | #define bit_XSAVEOPT (1 << 0) |
157 | #define bit_XSAVEC (1 << 1) |
158 | #define bit_XSAVES (1 << 3) |
159 | |
160 | /* PT sub leaf (%eax == 0x14, %ecx == 0) */ |
161 | /* %ebx */ |
162 | #define bit_PTWRITE (1 << 4) |
163 | |
164 | /* Keylocker leaf (%eax == 0x19) */ |
165 | /* %ebx */ |
166 | #define bit_AESKLE ( 1<<0 ) |
167 | #define bit_WIDEKL ( 1<<2 ) |
168 | |
169 | |
170 | /* Signatures for different CPU implementations as returned in uses |
171 | of cpuid with level 0. */ |
172 | #define signature_AMD_ebx 0x68747541 |
173 | #define signature_AMD_ecx 0x444d4163 |
174 | #define signature_AMD_edx 0x69746e65 |
175 | |
176 | #define signature_CENTAUR_ebx 0x746e6543 |
177 | #define signature_CENTAUR_ecx 0x736c7561 |
178 | #define signature_CENTAUR_edx 0x48727561 |
179 | |
180 | #define signature_CYRIX_ebx 0x69727943 |
181 | #define signature_CYRIX_ecx 0x64616574 |
182 | #define signature_CYRIX_edx 0x736e4978 |
183 | |
184 | #define signature_INTEL_ebx 0x756e6547 |
185 | #define signature_INTEL_ecx 0x6c65746e |
186 | #define signature_INTEL_edx 0x49656e69 |
187 | |
188 | #define signature_TM1_ebx 0x6e617254 |
189 | #define signature_TM1_ecx 0x55504361 |
190 | #define signature_TM1_edx 0x74656d73 |
191 | |
192 | #define signature_TM2_ebx 0x756e6547 |
193 | #define signature_TM2_ecx 0x3638784d |
194 | #define signature_TM2_edx 0x54656e69 |
195 | |
196 | #define signature_NSC_ebx 0x646f6547 |
197 | #define signature_NSC_ecx 0x43534e20 |
198 | #define signature_NSC_edx 0x79622065 |
199 | |
200 | #define signature_NEXGEN_ebx 0x4778654e |
201 | #define signature_NEXGEN_ecx 0x6e657669 |
202 | #define signature_NEXGEN_edx 0x72446e65 |
203 | |
204 | #define signature_RISE_ebx 0x65736952 |
205 | #define signature_RISE_ecx 0x65736952 |
206 | #define signature_RISE_edx 0x65736952 |
207 | |
208 | #define signature_SIS_ebx 0x20536953 |
209 | #define signature_SIS_ecx 0x20536953 |
210 | #define signature_SIS_edx 0x20536953 |
211 | |
212 | #define signature_UMC_ebx 0x20434d55 |
213 | #define signature_UMC_ecx 0x20434d55 |
214 | #define signature_UMC_edx 0x20434d55 |
215 | |
216 | #define signature_VIA_ebx 0x20414956 |
217 | #define signature_VIA_ecx 0x20414956 |
218 | #define signature_VIA_edx 0x20414956 |
219 | |
220 | #define signature_VORTEX_ebx 0x74726f56 |
221 | #define signature_VORTEX_ecx 0x436f5320 |
222 | #define signature_VORTEX_edx 0x36387865 |
223 | |
224 | #define signature_SHANGHAI_ebx 0x68532020 |
225 | #define signature_SHANGHAI_ecx 0x20206961 |
226 | #define signature_SHANGHAI_edx 0x68676e61 |
227 | |
228 | #ifndef __x86_64__ |
229 | /* At least one cpu (Winchip 2) does not set %ebx and %ecx |
230 | for cpuid leaf 1. Forcibly zero the two registers before |
231 | calling cpuid as a precaution. */ |
232 | #define __cpuid(level, a, b, c, d) \ |
233 | do { \ |
234 | if (__builtin_constant_p (level) && (level) != 1) \ |
235 | __asm__ __volatile__ ("cpuid\n\t" \ |
236 | : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
237 | : "0" (level)); \ |
238 | else \ |
239 | __asm__ __volatile__ ("cpuid\n\t" \ |
240 | : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
241 | : "0" (level), "1" (0), "2" (0)); \ |
242 | } while (0) |
243 | #else |
244 | #define __cpuid(level, a, b, c, d) \ |
245 | __asm__ __volatile__ ("cpuid\n\t" \ |
246 | : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
247 | : "0" (level)) |
248 | #endif |
249 | |
250 | #define __cpuid_count(level, count, a, b, c, d) \ |
251 | __asm__ __volatile__ ("cpuid\n\t" \ |
252 | : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
253 | : "0" (level), "2" (count)) |
254 | |
255 | |
256 | /* Return highest supported input value for cpuid instruction. ext can |
257 | be either 0x0 or 0x80000000 to return highest supported value for |
258 | basic or extended cpuid information. Function returns 0 if cpuid |
259 | is not supported or whatever cpuid returns in eax register. If sig |
260 | pointer is non-null, then first four bytes of the signature |
261 | (as found in ebx register) are returned in location pointed by sig. */ |
262 | |
263 | static __inline unsigned int |
264 | __get_cpuid_max (unsigned int __ext, unsigned int *__sig) |
265 | { |
266 | unsigned int __eax, __ebx, __ecx, __edx; |
267 | |
268 | #ifndef __x86_64__ |
269 | /* See if we can use cpuid. On AMD64 we always can. */ |
270 | #if __GNUC__ >= 3 |
271 | __asm__ ("pushf{l|d}\n\t" |
272 | "pushf{l|d}\n\t" |
273 | "pop{l}\t%0\n\t" |
274 | "mov{l}\t{%0, %1|%1, %0}\n\t" |
275 | "xor{l}\t{%2, %0|%0, %2}\n\t" |
276 | "push{l}\t%0\n\t" |
277 | "popf{l|d}\n\t" |
278 | "pushf{l|d}\n\t" |
279 | "pop{l}\t%0\n\t" |
280 | "popf{l|d}\n\t" |
281 | : "=&r" (__eax), "=&r" (__ebx) |
282 | : "i" (0x00200000)); |
283 | #else |
284 | /* Host GCCs older than 3.0 weren't supporting Intel asm syntax |
285 | nor alternatives in i386 code. */ |
286 | __asm__ ("pushfl\n\t" |
287 | "pushfl\n\t" |
288 | "popl\t%0\n\t" |
289 | "movl\t%0, %1\n\t" |
290 | "xorl\t%2, %0\n\t" |
291 | "pushl\t%0\n\t" |
292 | "popfl\n\t" |
293 | "pushfl\n\t" |
294 | "popl\t%0\n\t" |
295 | "popfl\n\t" |
296 | : "=&r" (__eax), "=&r" (__ebx) |
297 | : "i" (0x00200000)); |
298 | #endif |
299 | |
300 | if (__builtin_expect (!((__eax ^ __ebx) & 0x00200000), 0)) |
301 | return 0; |
302 | #endif |
303 | |
304 | /* Host supports cpuid. Return highest supported cpuid input value. */ |
305 | __cpuid (__ext, __eax, __ebx, __ecx, __edx); |
306 | |
307 | if (__sig) |
308 | *__sig = __ebx; |
309 | |
310 | return __eax; |
311 | } |
312 | |
313 | /* Return cpuid data for requested cpuid leaf, as found in returned |
314 | eax, ebx, ecx and edx registers. The function checks if cpuid is |
315 | supported and returns 1 for valid cpuid information or 0 for |
316 | unsupported cpuid leaf. All pointers are required to be non-null. */ |
317 | |
318 | static __inline int |
319 | __get_cpuid (unsigned int __leaf, |
320 | unsigned int *__eax, unsigned int *__ebx, |
321 | unsigned int *__ecx, unsigned int *__edx) |
322 | { |
323 | unsigned int __ext = __leaf & 0x80000000; |
324 | unsigned int __maxlevel = __get_cpuid_max (__ext, sig: 0); |
325 | |
326 | if (__maxlevel == 0 || __maxlevel < __leaf) |
327 | return 0; |
328 | |
329 | __cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx); |
330 | return 1; |
331 | } |
332 | |
333 | /* Same as above, but sub-leaf can be specified. */ |
334 | |
335 | static __inline int |
336 | __get_cpuid_count (unsigned int __leaf, unsigned int __subleaf, |
337 | unsigned int *__eax, unsigned int *__ebx, |
338 | unsigned int *__ecx, unsigned int *__edx) |
339 | { |
340 | unsigned int __ext = __leaf & 0x80000000; |
341 | unsigned int __maxlevel = __get_cpuid_max (__ext, sig: 0); |
342 | |
343 | if (__builtin_expect (__maxlevel == 0, 0) || __maxlevel < __leaf) |
344 | return 0; |
345 | |
346 | __cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx); |
347 | return 1; |
348 | } |
349 | |
350 | static __inline void |
351 | __cpuidex (int __cpuid_info[4], int __leaf, int __subleaf) |
352 | { |
353 | __cpuid_count (__leaf, __subleaf, __cpuid_info[0], __cpuid_info[1], |
354 | __cpuid_info[2], __cpuid_info[3]); |
355 | } |
356 | |
357 | #endif /* _CPUID_H_INCLUDED */ |
358 | |