1 | /* Sets (bit vectors) of hard registers, and operations on them. |
2 | Copyright (C) 1987-2023 Free Software Foundation, Inc. |
3 | |
4 | This file is part of GCC |
5 | |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free |
8 | Software Foundation; either version 3, or (at your option) any later |
9 | version. |
10 | |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
14 | for more details. |
15 | |
16 | You should have received a copy of the GNU General Public License |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ |
19 | |
20 | #ifndef GCC_HARD_REG_SET_H |
21 | #define GCC_HARD_REG_SET_H |
22 | |
23 | #include "array-traits.h" |
24 | |
25 | /* Define the type of a set of hard registers. */ |
26 | |
27 | /* HARD_REG_ELT_TYPE is a typedef of the unsigned integral type which |
28 | will be used for hard reg sets, either alone or in an array. |
29 | |
30 | If HARD_REG_SET is a macro, its definition is HARD_REG_ELT_TYPE, |
31 | and it has enough bits to represent all the target machine's hard |
32 | registers. Otherwise, it is a typedef for a suitably sized array |
33 | of HARD_REG_ELT_TYPEs. HARD_REG_SET_LONGS is defined as how many. |
34 | |
35 | Note that lots of code assumes that the first part of a regset is |
36 | the same format as a HARD_REG_SET. To help make sure this is true, |
37 | we only try the widest fast integer mode (HOST_WIDEST_FAST_INT) |
38 | instead of all the smaller types. This approach loses only if |
39 | there are very few registers and then only in the few cases where |
40 | we have an array of HARD_REG_SETs, so it needn't be as complex as |
41 | it used to be. */ |
42 | |
43 | typedef unsigned HOST_WIDEST_FAST_INT HARD_REG_ELT_TYPE; |
44 | |
45 | #if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT |
46 | |
47 | typedef HARD_REG_ELT_TYPE HARD_REG_SET; |
48 | typedef const HARD_REG_SET const_hard_reg_set; |
49 | |
50 | #else |
51 | |
52 | #define HARD_REG_SET_LONGS \ |
53 | ((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDEST_FAST_INT - 1) \ |
54 | / HOST_BITS_PER_WIDEST_FAST_INT) |
55 | |
56 | struct HARD_REG_SET |
57 | { |
58 | HARD_REG_SET |
59 | operator~ () const |
60 | { |
61 | HARD_REG_SET res; |
62 | for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i) |
63 | res.elts[i] = ~elts[i]; |
64 | return res; |
65 | } |
66 | |
67 | HARD_REG_SET |
68 | operator& (const HARD_REG_SET &other) const |
69 | { |
70 | HARD_REG_SET res; |
71 | for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i) |
72 | res.elts[i] = elts[i] & other.elts[i]; |
73 | return res; |
74 | } |
75 | |
76 | HARD_REG_SET & |
77 | operator&= (const HARD_REG_SET &other) |
78 | { |
79 | for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i) |
80 | elts[i] &= other.elts[i]; |
81 | return *this; |
82 | } |
83 | |
84 | HARD_REG_SET |
85 | operator| (const HARD_REG_SET &other) const |
86 | { |
87 | HARD_REG_SET res; |
88 | for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i) |
89 | res.elts[i] = elts[i] | other.elts[i]; |
90 | return res; |
91 | } |
92 | |
93 | HARD_REG_SET & |
94 | operator|= (const HARD_REG_SET &other) |
95 | { |
96 | for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i) |
97 | elts[i] |= other.elts[i]; |
98 | return *this; |
99 | } |
100 | |
101 | bool |
102 | operator== (const HARD_REG_SET &other) const |
103 | { |
104 | HARD_REG_ELT_TYPE bad = 0; |
105 | for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i) |
106 | bad |= (elts[i] ^ other.elts[i]); |
107 | return bad == 0; |
108 | } |
109 | |
110 | bool |
111 | operator!= (const HARD_REG_SET &other) const |
112 | { |
113 | return !operator== (other); |
114 | } |
115 | |
116 | HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS]; |
117 | }; |
118 | typedef const HARD_REG_SET &const_hard_reg_set; |
119 | |
120 | template<> |
121 | struct array_traits<HARD_REG_SET> |
122 | { |
123 | typedef HARD_REG_ELT_TYPE element_type; |
124 | static const bool has_constant_size = true; |
125 | static const size_t constant_size = HARD_REG_SET_LONGS; |
126 | static const element_type *base (const HARD_REG_SET &x) { return x.elts; } |
127 | static size_t size (const HARD_REG_SET &) { return HARD_REG_SET_LONGS; } |
128 | }; |
129 | |
130 | #endif |
131 | |
132 | /* HARD_REG_SET wrapped into a structure, to make it possible to |
133 | use HARD_REG_SET even in APIs that should not include |
134 | hard-reg-set.h. */ |
135 | struct hard_reg_set_container |
136 | { |
137 | HARD_REG_SET set; |
138 | }; |
139 | |
140 | /* HARD_CONST is used to cast a constant to the appropriate type |
141 | for use with a HARD_REG_SET. */ |
142 | |
143 | #define HARD_CONST(X) ((HARD_REG_ELT_TYPE) (X)) |
144 | |
145 | /* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT |
146 | to set, clear or test one bit in a hard reg set of type HARD_REG_SET. |
147 | All three take two arguments: the set and the register number. |
148 | |
149 | In the case where sets are arrays of longs, the first argument |
150 | is actually a pointer to a long. |
151 | |
152 | Define two macros for initializing a set: |
153 | CLEAR_HARD_REG_SET and SET_HARD_REG_SET. |
154 | These take just one argument. |
155 | |
156 | Also define: |
157 | |
158 | hard_reg_set_subset_p (X, Y), which returns true if X is a subset of Y. |
159 | hard_reg_set_intersect_p (X, Y), which returns true if X and Y intersect. |
160 | hard_reg_set_empty_p (X), which returns true if X is empty. */ |
161 | |
162 | #define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT) |
163 | |
164 | #if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT |
165 | |
166 | #define SET_HARD_REG_BIT(SET, BIT) \ |
167 | ((SET) |= HARD_CONST (1) << (BIT)) |
168 | #define CLEAR_HARD_REG_BIT(SET, BIT) \ |
169 | ((SET) &= ~(HARD_CONST (1) << (BIT))) |
170 | #define TEST_HARD_REG_BIT(SET, BIT) \ |
171 | (!!((SET) & (HARD_CONST (1) << (BIT)))) |
172 | |
173 | #define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0)) |
174 | #define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0)) |
175 | |
176 | inline bool |
177 | hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y) |
178 | { |
179 | return (x & ~y) == HARD_CONST (0); |
180 | } |
181 | |
182 | inline bool |
183 | hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y) |
184 | { |
185 | return (x & y) != HARD_CONST (0); |
186 | } |
187 | |
188 | inline bool |
189 | hard_reg_set_empty_p (const_hard_reg_set x) |
190 | { |
191 | return x == HARD_CONST (0); |
192 | } |
193 | |
194 | #else |
195 | |
196 | inline void |
197 | SET_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit) |
198 | { |
199 | set.elts[bit / UHOST_BITS_PER_WIDE_INT] |
200 | |= HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT); |
201 | } |
202 | |
203 | inline void |
204 | CLEAR_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit) |
205 | { |
206 | set.elts[bit / UHOST_BITS_PER_WIDE_INT] |
207 | &= ~(HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT)); |
208 | } |
209 | |
210 | inline bool |
211 | TEST_HARD_REG_BIT (const_hard_reg_set set, unsigned int bit) |
212 | { |
213 | return (set.elts[bit / UHOST_BITS_PER_WIDE_INT] |
214 | & (HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT))); |
215 | } |
216 | |
217 | inline void |
218 | CLEAR_HARD_REG_SET (HARD_REG_SET &set) |
219 | { |
220 | for (unsigned int i = 0; i < ARRAY_SIZE (set.elts); ++i) |
221 | set.elts[i] = 0; |
222 | } |
223 | |
224 | inline void |
225 | SET_HARD_REG_SET (HARD_REG_SET &set) |
226 | { |
227 | for (unsigned int i = 0; i < ARRAY_SIZE (set.elts); ++i) |
228 | set.elts[i] = -1; |
229 | } |
230 | |
231 | inline bool |
232 | hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y) |
233 | { |
234 | HARD_REG_ELT_TYPE bad = 0; |
235 | for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i) |
236 | bad |= (x.elts[i] & ~y.elts[i]); |
237 | return bad == 0; |
238 | } |
239 | |
240 | inline bool |
241 | hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y) |
242 | { |
243 | HARD_REG_ELT_TYPE good = 0; |
244 | for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i) |
245 | good |= (x.elts[i] & y.elts[i]); |
246 | return good != 0; |
247 | } |
248 | |
249 | inline bool |
250 | hard_reg_set_empty_p (const_hard_reg_set x) |
251 | { |
252 | HARD_REG_ELT_TYPE bad = 0; |
253 | for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i) |
254 | bad |= x.elts[i]; |
255 | return bad == 0; |
256 | } |
257 | #endif |
258 | |
259 | /* Iterator for hard register sets. */ |
260 | |
261 | struct hard_reg_set_iterator |
262 | { |
263 | /* Pointer to the current element. */ |
264 | const HARD_REG_ELT_TYPE *pelt; |
265 | |
266 | /* The length of the set. */ |
267 | unsigned short length; |
268 | |
269 | /* Word within the current element. */ |
270 | unsigned short word_no; |
271 | |
272 | /* Contents of the actually processed word. When finding next bit |
273 | it is shifted right, so that the actual bit is always the least |
274 | significant bit of ACTUAL. */ |
275 | HARD_REG_ELT_TYPE bits; |
276 | }; |
277 | |
278 | #define HARD_REG_ELT_BITS UHOST_BITS_PER_WIDE_INT |
279 | |
280 | /* The implementation of the iterator functions is fully analogous to |
281 | the bitmap iterators. */ |
282 | inline void |
283 | hard_reg_set_iter_init (hard_reg_set_iterator *iter, const_hard_reg_set set, |
284 | unsigned min, unsigned *regno) |
285 | { |
286 | #ifdef HARD_REG_SET_LONGS |
287 | iter->pelt = set.elts; |
288 | iter->length = HARD_REG_SET_LONGS; |
289 | #else |
290 | iter->pelt = &set; |
291 | iter->length = 1; |
292 | #endif |
293 | iter->word_no = min / HARD_REG_ELT_BITS; |
294 | if (iter->word_no < iter->length) |
295 | { |
296 | iter->bits = iter->pelt[iter->word_no]; |
297 | iter->bits >>= min % HARD_REG_ELT_BITS; |
298 | |
299 | /* This is required for correct search of the next bit. */ |
300 | min += !iter->bits; |
301 | } |
302 | *regno = min; |
303 | } |
304 | |
305 | inline bool |
306 | hard_reg_set_iter_set (hard_reg_set_iterator *iter, unsigned *regno) |
307 | { |
308 | while (1) |
309 | { |
310 | /* Return false when we're advanced past the end of the set. */ |
311 | if (iter->word_no >= iter->length) |
312 | return false; |
313 | |
314 | if (iter->bits) |
315 | { |
316 | /* Find the correct bit and return it. */ |
317 | while (!(iter->bits & 1)) |
318 | { |
319 | iter->bits >>= 1; |
320 | *regno += 1; |
321 | } |
322 | return (*regno < FIRST_PSEUDO_REGISTER); |
323 | } |
324 | |
325 | /* Round to the beginning of the next word. */ |
326 | *regno = (*regno + HARD_REG_ELT_BITS - 1); |
327 | *regno -= *regno % HARD_REG_ELT_BITS; |
328 | |
329 | /* Find the next non-zero word. */ |
330 | while (++iter->word_no < iter->length) |
331 | { |
332 | iter->bits = iter->pelt[iter->word_no]; |
333 | if (iter->bits) |
334 | break; |
335 | *regno += HARD_REG_ELT_BITS; |
336 | } |
337 | } |
338 | } |
339 | |
340 | inline void |
341 | hard_reg_set_iter_next (hard_reg_set_iterator *iter, unsigned *regno) |
342 | { |
343 | iter->bits >>= 1; |
344 | *regno += 1; |
345 | } |
346 | |
347 | #define EXECUTE_IF_SET_IN_HARD_REG_SET(SET, MIN, REGNUM, ITER) \ |
348 | for (hard_reg_set_iter_init (&(ITER), (SET), (MIN), &(REGNUM)); \ |
349 | hard_reg_set_iter_set (&(ITER), &(REGNUM)); \ |
350 | hard_reg_set_iter_next (&(ITER), &(REGNUM))) |
351 | |
352 | |
353 | /* Define some standard sets of registers. */ |
354 | |
355 | /* Indexed by hard register number, contains 1 for registers |
356 | that are being used for global register decls. |
357 | These must be exempt from ordinary flow analysis |
358 | and are also considered fixed. */ |
359 | |
360 | extern char global_regs[FIRST_PSEUDO_REGISTER]; |
361 | |
362 | extern HARD_REG_SET global_reg_set; |
363 | |
364 | class simplifiable_subreg; |
365 | class subreg_shape; |
366 | |
367 | struct simplifiable_subregs_hasher : nofree_ptr_hash <simplifiable_subreg> |
368 | { |
369 | typedef const subreg_shape *compare_type; |
370 | |
371 | static inline hashval_t hash (const simplifiable_subreg *); |
372 | static inline bool equal (const simplifiable_subreg *, const subreg_shape *); |
373 | }; |
374 | |
375 | struct target_hard_regs { |
376 | void finalize (); |
377 | |
378 | /* The set of registers that actually exist on the current target. */ |
379 | HARD_REG_SET x_accessible_reg_set; |
380 | |
381 | /* The set of registers that should be considered to be register |
382 | operands. It is a subset of x_accessible_reg_set. */ |
383 | HARD_REG_SET x_operand_reg_set; |
384 | |
385 | /* Indexed by hard register number, contains 1 for registers |
386 | that are fixed use (stack pointer, pc, frame pointer, etc.;. |
387 | These are the registers that cannot be used to allocate |
388 | a pseudo reg whose life does not cross calls. */ |
389 | char x_fixed_regs[FIRST_PSEUDO_REGISTER]; |
390 | |
391 | /* The same info as a HARD_REG_SET. */ |
392 | HARD_REG_SET x_fixed_reg_set; |
393 | |
394 | /* Indexed by hard register number, contains 1 for registers |
395 | that are fixed use or are clobbered by function calls. |
396 | These are the registers that cannot be used to allocate |
397 | a pseudo reg whose life crosses calls. */ |
398 | char x_call_used_regs[FIRST_PSEUDO_REGISTER]; |
399 | |
400 | /* For targets that use reload rather than LRA, this is the set |
401 | of registers that we are able to save and restore around calls |
402 | (i.e. those for which we know a suitable mode and set of |
403 | load/store instructions exist). For LRA targets it contains |
404 | all registers. |
405 | |
406 | This is legacy information and should be removed if all targets |
407 | switch to LRA. */ |
408 | HARD_REG_SET x_savable_regs; |
409 | |
410 | /* Contains registers that are fixed use -- i.e. in fixed_reg_set -- but |
411 | only if they are not merely part of that set because they are global |
412 | regs. Global regs that are not otherwise fixed can still take part |
413 | in register allocation. */ |
414 | HARD_REG_SET x_fixed_nonglobal_reg_set; |
415 | |
416 | /* Contains 1 for registers that are set or clobbered by calls. */ |
417 | /* ??? Ideally, this would be just call_used_regs plus global_regs, but |
418 | for someone's bright idea to have call_used_regs strictly include |
419 | fixed_regs. Which leaves us guessing as to the set of fixed_regs |
420 | that are actually preserved. We know for sure that those associated |
421 | with the local stack frame are safe, but scant others. */ |
422 | HARD_REG_SET x_regs_invalidated_by_call; |
423 | |
424 | /* Table of register numbers in the order in which to try to use them. */ |
425 | int x_reg_alloc_order[FIRST_PSEUDO_REGISTER]; |
426 | |
427 | /* The inverse of reg_alloc_order. */ |
428 | int x_inv_reg_alloc_order[FIRST_PSEUDO_REGISTER]; |
429 | |
430 | /* For each reg class, a HARD_REG_SET saying which registers are in it. */ |
431 | HARD_REG_SET x_reg_class_contents[N_REG_CLASSES]; |
432 | |
433 | /* For each reg class, a boolean saying whether the class contains only |
434 | fixed registers. */ |
435 | bool x_class_only_fixed_regs[N_REG_CLASSES]; |
436 | |
437 | /* For each reg class, number of regs it contains. */ |
438 | unsigned int x_reg_class_size[N_REG_CLASSES]; |
439 | |
440 | /* For each reg class, table listing all the classes contained in it. */ |
441 | enum reg_class x_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES]; |
442 | |
443 | /* For each pair of reg classes, |
444 | a largest reg class contained in their union. */ |
445 | enum reg_class x_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES]; |
446 | |
447 | /* For each pair of reg classes, |
448 | the smallest reg class that contains their union. */ |
449 | enum reg_class x_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES]; |
450 | |
451 | /* Vector indexed by hardware reg giving its name. */ |
452 | const char *x_reg_names[FIRST_PSEUDO_REGISTER]; |
453 | |
454 | /* Records which registers can form a particular subreg, with the subreg |
455 | being identified by its outer mode, inner mode and offset. */ |
456 | hash_table <simplifiable_subregs_hasher> *x_simplifiable_subregs; |
457 | }; |
458 | |
459 | extern struct target_hard_regs default_target_hard_regs; |
460 | #if SWITCHABLE_TARGET |
461 | extern struct target_hard_regs *this_target_hard_regs; |
462 | #else |
463 | #define this_target_hard_regs (&default_target_hard_regs) |
464 | #endif |
465 | |
466 | #define accessible_reg_set \ |
467 | (this_target_hard_regs->x_accessible_reg_set) |
468 | #define operand_reg_set \ |
469 | (this_target_hard_regs->x_operand_reg_set) |
470 | #define fixed_regs \ |
471 | (this_target_hard_regs->x_fixed_regs) |
472 | #define fixed_reg_set \ |
473 | (this_target_hard_regs->x_fixed_reg_set) |
474 | #define fixed_nonglobal_reg_set \ |
475 | (this_target_hard_regs->x_fixed_nonglobal_reg_set) |
476 | #ifdef IN_TARGET_CODE |
477 | #define call_used_regs \ |
478 | (this_target_hard_regs->x_call_used_regs) |
479 | #endif |
480 | #define savable_regs \ |
481 | (this_target_hard_regs->x_savable_regs) |
482 | #ifdef IN_TARGET_CODE |
483 | #define regs_invalidated_by_call \ |
484 | (this_target_hard_regs->x_regs_invalidated_by_call) |
485 | #define call_used_or_fixed_regs \ |
486 | (regs_invalidated_by_call | fixed_reg_set) |
487 | #endif |
488 | #define reg_alloc_order \ |
489 | (this_target_hard_regs->x_reg_alloc_order) |
490 | #define inv_reg_alloc_order \ |
491 | (this_target_hard_regs->x_inv_reg_alloc_order) |
492 | #define reg_class_contents \ |
493 | (this_target_hard_regs->x_reg_class_contents) |
494 | #define class_only_fixed_regs \ |
495 | (this_target_hard_regs->x_class_only_fixed_regs) |
496 | #define reg_class_size \ |
497 | (this_target_hard_regs->x_reg_class_size) |
498 | #define reg_class_subclasses \ |
499 | (this_target_hard_regs->x_reg_class_subclasses) |
500 | #define reg_class_subunion \ |
501 | (this_target_hard_regs->x_reg_class_subunion) |
502 | #define reg_class_superunion \ |
503 | (this_target_hard_regs->x_reg_class_superunion) |
504 | #define reg_names \ |
505 | (this_target_hard_regs->x_reg_names) |
506 | |
507 | /* Vector indexed by reg class giving its name. */ |
508 | |
509 | extern const char * reg_class_names[]; |
510 | |
511 | /* Given a hard REGN a FROM mode and a TO mode, return true if |
512 | REGN can change from mode FROM to mode TO. */ |
513 | #define REG_CAN_CHANGE_MODE_P(REGN, FROM, TO) \ |
514 | (targetm.can_change_mode_class (FROM, TO, REGNO_REG_CLASS (REGN))) |
515 | |
516 | #ifdef IN_TARGET_CODE |
517 | /* Return true if register REGNO is either fixed or call-used |
518 | (aka call-clobbered). */ |
519 | |
520 | inline bool |
521 | call_used_or_fixed_reg_p (unsigned int regno) |
522 | { |
523 | return fixed_regs[regno] || this_target_hard_regs->x_call_used_regs[regno]; |
524 | } |
525 | #endif |
526 | |
527 | #endif /* ! GCC_HARD_REG_SET_H */ |
528 | |