1/* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2017 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20/* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
22
23 * The form of the input:
24
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
34
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
42
43 * The form of the output:
44
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
50
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
53
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
57
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
60
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
64
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
68 stack.
69
70 * Methodology:
71
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
75
76 * asm_operands:
77
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
80 stack-like regs:
81
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
85
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
88 output operand.
89
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
95 up".
96
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
99
100 All explicitly referenced input operands may not "skip" a reg.
101 Otherwise we can have holes in the stack.
102
103 3. It is possible that if an input dies in an insn, reload might
104 use the input reg for an output reload. Consider this example:
105
106 asm ("foo" : "=t" (a) : "f" (b));
107
108 This asm says that input B is not popped by the asm, and that
109 the asm pushes a result onto the reg-stack, i.e., the stack is one
110 deeper after the asm than it was before. But, it is possible that
111 reload will think that it can use the same reg for both the input and
112 the output, if input B dies in this insn.
113
114 If any input operand uses the "f" constraint, all output reg
115 constraints must use the "&" earlyclobber.
116
117 The asm above would be written as
118
119 asm ("foo" : "=&t" (a) : "f" (b));
120
121 4. Some operands need to be in particular places on the stack. All
122 output operands fall in this category - there is no other way to
123 know which regs the outputs appear in unless the user indicates
124 this in the constraints.
125
126 Output operands must specifically indicate which reg an output
127 appears in after an asm. "=f" is not allowed: the operand
128 constraints must select a class with a single reg.
129
130 5. Output operands may not be "inserted" between existing stack regs.
131 Since no 387 opcode uses a read/write operand, all output operands
132 are dead before the asm_operands, and are pushed by the asm_operands.
133 It makes no sense to push anywhere but the top of the reg-stack.
134
135 Output operands must start at the top of the reg-stack: output
136 operands may not "skip" a reg.
137
138 6. Some asm statements may need extra stack space for internal
139 calculations. This can be guaranteed by clobbering stack registers
140 unrelated to the inputs and outputs.
141
142 Here are a couple of reasonable asms to want to write. This asm
143 takes one input, which is internally popped, and produces two outputs.
144
145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146
147 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
148 and replaces them with one output. The user must code the "st(1)"
149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150
151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
152
153*/
154
155#include "config.h"
156#include "system.h"
157#include "coretypes.h"
158#include "backend.h"
159#include "target.h"
160#include "rtl.h"
161#include "tree.h"
162#include "df.h"
163#include "insn-config.h"
164#include "memmodel.h"
165#include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
166#include "recog.h"
167#include "varasm.h"
168#include "rtl-error.h"
169#include "cfgrtl.h"
170#include "cfganal.h"
171#include "cfgbuild.h"
172#include "cfgcleanup.h"
173#include "reload.h"
174#include "tree-pass.h"
175#include "rtl-iter.h"
176
177#ifdef STACK_REGS
178
179/* We use this array to cache info about insns, because otherwise we
180 spend too much time in stack_regs_mentioned_p.
181
182 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
183 the insn uses stack registers, two indicates the insn does not use
184 stack registers. */
185static vec<char> stack_regs_mentioned_data;
186
187#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
188
189int regstack_completed = 0;
190
191/* This is the basic stack record. TOP is an index into REG[] such
192 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
193
194 If TOP is -2, REG[] is not yet initialized. Stack initialization
195 consists of placing each live reg in array `reg' and setting `top'
196 appropriately.
197
198 REG_SET indicates which registers are live. */
199
200typedef struct stack_def
201{
202 int top; /* index to top stack element */
203 HARD_REG_SET reg_set; /* set of live registers */
204 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
205} *stack_ptr;
206
207/* This is used to carry information about basic blocks. It is
208 attached to the AUX field of the standard CFG block. */
209
210typedef struct block_info_def
211{
212 struct stack_def stack_in; /* Input stack configuration. */
213 struct stack_def stack_out; /* Output stack configuration. */
214 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
215 int done; /* True if block already converted. */
216 int predecessors; /* Number of predecessors that need
217 to be visited. */
218} *block_info;
219
220#define BLOCK_INFO(B) ((block_info) (B)->aux)
221
222/* Passed to change_stack to indicate where to emit insns. */
223enum emit_where
224{
225 EMIT_AFTER,
226 EMIT_BEFORE
227};
228
229/* The block we're currently working on. */
230static basic_block current_block;
231
232/* In the current_block, whether we're processing the first register
233 stack or call instruction, i.e. the regstack is currently the
234 same as BLOCK_INFO(current_block)->stack_in. */
235static bool starting_stack_p;
236
237/* This is the register file for all register after conversion. */
238static rtx
239 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
240
241#define FP_MODE_REG(regno,mode) \
242 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
243
244/* Used to initialize uninitialized registers. */
245static rtx not_a_num;
246
247/* Forward declarations */
248
249static int stack_regs_mentioned_p (const_rtx pat);
250static void pop_stack (stack_ptr, int);
251static rtx *get_true_reg (rtx *);
252
253static int check_asm_stack_operands (rtx_insn *);
254static void get_asm_operands_in_out (rtx, int *, int *);
255static rtx stack_result (tree);
256static void replace_reg (rtx *, int);
257static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int);
258static int get_hard_regnum (stack_ptr, rtx);
259static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where);
260static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx);
261static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx);
262static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx);
263static int swap_rtx_condition_1 (rtx);
264static int swap_rtx_condition (rtx_insn *);
265static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx, bool);
266static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx);
267static void subst_asm_stack_regs (rtx_insn *, stack_ptr);
268static bool subst_stack_regs (rtx_insn *, stack_ptr);
269static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
270static void print_stack (FILE *, stack_ptr);
271static rtx_insn *next_flags_user (rtx_insn *);
272
273/* Return nonzero if any stack register is mentioned somewhere within PAT. */
274
275static int
276stack_regs_mentioned_p (const_rtx pat)
277{
278 const char *fmt;
279 int i;
280
281 if (STACK_REG_P (pat))
282 return 1;
283
284 fmt = GET_RTX_FORMAT (GET_CODE (pat));
285 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
286 {
287 if (fmt[i] == 'E')
288 {
289 int j;
290
291 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
292 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
293 return 1;
294 }
295 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
296 return 1;
297 }
298
299 return 0;
300}
301
302/* Return nonzero if INSN mentions stacked registers, else return zero. */
303
304int
305stack_regs_mentioned (const_rtx insn)
306{
307 unsigned int uid, max;
308 int test;
309
310 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
311 return 0;
312
313 uid = INSN_UID (insn);
314 max = stack_regs_mentioned_data.length ();
315 if (uid >= max)
316 {
317 /* Allocate some extra size to avoid too many reallocs, but
318 do not grow too quickly. */
319 max = uid + uid / 20 + 1;
320 stack_regs_mentioned_data.safe_grow_cleared (max);
321 }
322
323 test = stack_regs_mentioned_data[uid];
324 if (test == 0)
325 {
326 /* This insn has yet to be examined. Do so now. */
327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
328 stack_regs_mentioned_data[uid] = test;
329 }
330
331 return test == 1;
332}
333
334static rtx ix86_flags_rtx;
335
336static rtx_insn *
337next_flags_user (rtx_insn *insn)
338{
339 /* Search forward looking for the first use of this value.
340 Stop at block boundaries. */
341
342 while (insn != BB_END (current_block))
343 {
344 insn = NEXT_INSN (insn);
345
346 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
347 return insn;
348
349 if (CALL_P (insn))
350 return NULL;
351 }
352 return NULL;
353}
354
355/* Reorganize the stack into ascending numbers, before this insn. */
356
357static void
358straighten_stack (rtx_insn *insn, stack_ptr regstack)
359{
360 struct stack_def temp_stack;
361 int top;
362
363 /* If there is only a single register on the stack, then the stack is
364 already in increasing order and no reorganization is needed.
365
366 Similarly if the stack is empty. */
367 if (regstack->top <= 0)
368 return;
369
370 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
371
372 for (top = temp_stack.top = regstack->top; top >= 0; top--)
373 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
374
375 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
376}
377
378/* Pop a register from the stack. */
379
380static void
381pop_stack (stack_ptr regstack, int regno)
382{
383 int top = regstack->top;
384
385 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
386 regstack->top--;
387 /* If regno was not at the top of stack then adjust stack. */
388 if (regstack->reg [top] != regno)
389 {
390 int i;
391 for (i = regstack->top; i >= 0; i--)
392 if (regstack->reg [i] == regno)
393 {
394 int j;
395 for (j = i; j < top; j++)
396 regstack->reg [j] = regstack->reg [j + 1];
397 break;
398 }
399 }
400}
401
402/* Return a pointer to the REG expression within PAT. If PAT is not a
403 REG, possible enclosed by a conversion rtx, return the inner part of
404 PAT that stopped the search. */
405
406static rtx *
407get_true_reg (rtx *pat)
408{
409 for (;;)
410 switch (GET_CODE (*pat))
411 {
412 case SUBREG:
413 /* Eliminate FP subregister accesses in favor of the
414 actual FP register in use. */
415 {
416 rtx subreg;
417 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
418 {
419 int regno_off = subreg_regno_offset (REGNO (subreg),
420 GET_MODE (subreg),
421 SUBREG_BYTE (*pat),
422 GET_MODE (*pat));
423 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
424 GET_MODE (subreg));
425 return pat;
426 }
427 pat = &XEXP (*pat, 0);
428 break;
429 }
430 case FLOAT:
431 case FIX:
432 case FLOAT_EXTEND:
433 pat = &XEXP (*pat, 0);
434 break;
435
436 case UNSPEC:
437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
438 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC)
439 pat = &XVECEXP (*pat, 0, 0);
440 return pat;
441
442 case FLOAT_TRUNCATE:
443 if (!flag_unsafe_math_optimizations)
444 return pat;
445 pat = &XEXP (*pat, 0);
446 break;
447
448 default:
449 return pat;
450 }
451}
452
453/* Set if we find any malformed asms in a block. */
454static bool any_malformed_asm;
455
456/* There are many rules that an asm statement for stack-like regs must
457 follow. Those rules are explained at the top of this file: the rule
458 numbers below refer to that explanation. */
459
460static int
461check_asm_stack_operands (rtx_insn *insn)
462{
463 int i;
464 int n_clobbers;
465 int malformed_asm = 0;
466 rtx body = PATTERN (insn);
467
468 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
469 char implicitly_dies[FIRST_PSEUDO_REGISTER];
470 char explicitly_used[FIRST_PSEUDO_REGISTER];
471
472 rtx *clobber_reg = 0;
473 int n_inputs, n_outputs;
474
475 /* Find out what the constraints require. If no constraint
476 alternative matches, this asm is malformed. */
477 extract_constrain_insn (insn);
478
479 preprocess_constraints (insn);
480
481 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
482
483 if (which_alternative < 0)
484 {
485 malformed_asm = 1;
486 /* Avoid further trouble with this insn. */
487 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
488 return 0;
489 }
490 const operand_alternative *op_alt = which_op_alt ();
491
492 /* Strip SUBREGs here to make the following code simpler. */
493 for (i = 0; i < recog_data.n_operands; i++)
494 if (GET_CODE (recog_data.operand[i]) == SUBREG
495 && REG_P (SUBREG_REG (recog_data.operand[i])))
496 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
497
498 /* Set up CLOBBER_REG. */
499
500 n_clobbers = 0;
501
502 if (GET_CODE (body) == PARALLEL)
503 {
504 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
505
506 for (i = 0; i < XVECLEN (body, 0); i++)
507 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
508 {
509 rtx clobber = XVECEXP (body, 0, i);
510 rtx reg = XEXP (clobber, 0);
511
512 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
513 reg = SUBREG_REG (reg);
514
515 if (STACK_REG_P (reg))
516 {
517 clobber_reg[n_clobbers] = reg;
518 n_clobbers++;
519 }
520 }
521 }
522
523 /* Enforce rule #4: Output operands must specifically indicate which
524 reg an output appears in after an asm. "=f" is not allowed: the
525 operand constraints must select a class with a single reg.
526
527 Also enforce rule #5: Output operands must start at the top of
528 the reg-stack: output operands may not "skip" a reg. */
529
530 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
531 for (i = 0; i < n_outputs; i++)
532 if (STACK_REG_P (recog_data.operand[i]))
533 {
534 if (reg_class_size[(int) op_alt[i].cl] != 1)
535 {
536 error_for_asm (insn, "output constraint %d must specify a single register", i);
537 malformed_asm = 1;
538 }
539 else
540 {
541 int j;
542
543 for (j = 0; j < n_clobbers; j++)
544 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
545 {
546 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
547 i, reg_names [REGNO (clobber_reg[j])]);
548 malformed_asm = 1;
549 break;
550 }
551 if (j == n_clobbers)
552 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
553 }
554 }
555
556
557 /* Search for first non-popped reg. */
558 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
559 if (! reg_used_as_output[i])
560 break;
561
562 /* If there are any other popped regs, that's an error. */
563 for (; i < LAST_STACK_REG + 1; i++)
564 if (reg_used_as_output[i])
565 break;
566
567 if (i != LAST_STACK_REG + 1)
568 {
569 error_for_asm (insn, "output regs must be grouped at top of stack");
570 malformed_asm = 1;
571 }
572
573 /* Enforce rule #2: All implicitly popped input regs must be closer
574 to the top of the reg-stack than any input that is not implicitly
575 popped. */
576
577 memset (implicitly_dies, 0, sizeof (implicitly_dies));
578 memset (explicitly_used, 0, sizeof (explicitly_used));
579 for (i = n_outputs; i < n_outputs + n_inputs; i++)
580 if (STACK_REG_P (recog_data.operand[i]))
581 {
582 /* An input reg is implicitly popped if it is tied to an
583 output, or if there is a CLOBBER for it. */
584 int j;
585
586 for (j = 0; j < n_clobbers; j++)
587 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
588 break;
589
590 if (j < n_clobbers || op_alt[i].matches >= 0)
591 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
592 else if (reg_class_size[(int) op_alt[i].cl] == 1)
593 explicitly_used[REGNO (recog_data.operand[i])] = 1;
594 }
595
596 /* Search for first non-popped reg. */
597 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
598 if (! implicitly_dies[i])
599 break;
600
601 /* If there are any other popped regs, that's an error. */
602 for (; i < LAST_STACK_REG + 1; i++)
603 if (implicitly_dies[i])
604 break;
605
606 if (i != LAST_STACK_REG + 1)
607 {
608 error_for_asm (insn,
609 "implicitly popped regs must be grouped at top of stack");
610 malformed_asm = 1;
611 }
612
613 /* Search for first not-explicitly used reg. */
614 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
615 if (! implicitly_dies[i] && ! explicitly_used[i])
616 break;
617
618 /* If there are any other explicitly used regs, that's an error. */
619 for (; i < LAST_STACK_REG + 1; i++)
620 if (explicitly_used[i])
621 break;
622
623 if (i != LAST_STACK_REG + 1)
624 {
625 error_for_asm (insn,
626 "explicitly used regs must be grouped at top of stack");
627 malformed_asm = 1;
628 }
629
630 /* Enforce rule #3: If any input operand uses the "f" constraint, all
631 output constraints must use the "&" earlyclobber.
632
633 ??? Detect this more deterministically by having constrain_asm_operands
634 record any earlyclobber. */
635
636 for (i = n_outputs; i < n_outputs + n_inputs; i++)
637 if (STACK_REG_P (recog_data.operand[i]) && op_alt[i].matches == -1)
638 {
639 int j;
640
641 for (j = 0; j < n_outputs; j++)
642 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
643 {
644 error_for_asm (insn,
645 "output operand %d must use %<&%> constraint", j);
646 malformed_asm = 1;
647 }
648 }
649
650 if (malformed_asm)
651 {
652 /* Avoid further trouble with this insn. */
653 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
654 any_malformed_asm = true;
655 return 0;
656 }
657
658 return 1;
659}
660
661/* Calculate the number of inputs and outputs in BODY, an
662 asm_operands. N_OPERANDS is the total number of operands, and
663 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
664 placed. */
665
666static void
667get_asm_operands_in_out (rtx body, int *pout, int *pin)
668{
669 rtx asmop = extract_asm_operands (body);
670
671 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
672 *pout = (recog_data.n_operands
673 - ASM_OPERANDS_INPUT_LENGTH (asmop)
674 - ASM_OPERANDS_LABEL_LENGTH (asmop));
675}
676
677/* If current function returns its result in an fp stack register,
678 return the REG. Otherwise, return 0. */
679
680static rtx
681stack_result (tree decl)
682{
683 rtx result;
684
685 /* If the value is supposed to be returned in memory, then clearly
686 it is not returned in a stack register. */
687 if (aggregate_value_p (DECL_RESULT (decl), decl))
688 return 0;
689
690 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
691 if (result != 0)
692 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
693 decl, true);
694
695 return result != 0 && STACK_REG_P (result) ? result : 0;
696}
697
698
699/*
700 * This section deals with stack register substitution, and forms the second
701 * pass over the RTL.
702 */
703
704/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
705 the desired hard REGNO. */
706
707static void
708replace_reg (rtx *reg, int regno)
709{
710 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
711 gcc_assert (STACK_REG_P (*reg));
712
713 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
714 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
715
716 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
717}
718
719/* Remove a note of type NOTE, which must be found, for register
720 number REGNO from INSN. Remove only one such note. */
721
722static void
723remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno)
724{
725 rtx *note_link, this_rtx;
726
727 note_link = &REG_NOTES (insn);
728 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
729 if (REG_NOTE_KIND (this_rtx) == note
730 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
731 {
732 *note_link = XEXP (this_rtx, 1);
733 return;
734 }
735 else
736 note_link = &XEXP (this_rtx, 1);
737
738 gcc_unreachable ();
739}
740
741/* Find the hard register number of virtual register REG in REGSTACK.
742 The hard register number is relative to the top of the stack. -1 is
743 returned if the register is not found. */
744
745static int
746get_hard_regnum (stack_ptr regstack, rtx reg)
747{
748 int i;
749
750 gcc_assert (STACK_REG_P (reg));
751
752 for (i = regstack->top; i >= 0; i--)
753 if (regstack->reg[i] == REGNO (reg))
754 break;
755
756 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
757}
758
759/* Emit an insn to pop virtual register REG before or after INSN.
760 REGSTACK is the stack state after INSN and is updated to reflect this
761 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
762 is represented as a SET whose destination is the register to be popped
763 and source is the top of stack. A death note for the top of stack
764 cases the movdf pattern to pop. */
765
766static rtx_insn *
767emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where)
768{
769 rtx_insn *pop_insn;
770 rtx pop_rtx;
771 int hard_regno;
772
773 /* For complex types take care to pop both halves. These may survive in
774 CLOBBER and USE expressions. */
775 if (COMPLEX_MODE_P (GET_MODE (reg)))
776 {
777 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
778 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
779
780 pop_insn = NULL;
781 if (get_hard_regnum (regstack, reg1) >= 0)
782 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
783 if (get_hard_regnum (regstack, reg2) >= 0)
784 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
785 gcc_assert (pop_insn);
786 return pop_insn;
787 }
788
789 hard_regno = get_hard_regnum (regstack, reg);
790
791 gcc_assert (hard_regno >= FIRST_STACK_REG);
792
793 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode),
794 FP_MODE_REG (FIRST_STACK_REG, DFmode));
795
796 if (where == EMIT_AFTER)
797 pop_insn = emit_insn_after (pop_rtx, insn);
798 else
799 pop_insn = emit_insn_before (pop_rtx, insn);
800
801 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
802
803 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
804 = regstack->reg[regstack->top];
805 regstack->top -= 1;
806 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
807
808 return pop_insn;
809}
810
811/* Emit an insn before or after INSN to swap virtual register REG with
812 the top of stack. REGSTACK is the stack state before the swap, and
813 is updated to reflect the swap. A swap insn is represented as a
814 PARALLEL of two patterns: each pattern moves one reg to the other.
815
816 If REG is already at the top of the stack, no insn is emitted. */
817
818static void
819emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
820{
821 int hard_regno;
822 rtx swap_rtx;
823 int other_reg; /* swap regno temps */
824 rtx_insn *i1; /* the stack-reg insn prior to INSN */
825 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
826
827 hard_regno = get_hard_regnum (regstack, reg);
828
829 if (hard_regno == FIRST_STACK_REG)
830 return;
831 if (hard_regno == -1)
832 {
833 /* Something failed if the register wasn't on the stack. If we had
834 malformed asms, we zapped the instruction itself, but that didn't
835 produce the same pattern of register sets as before. To prevent
836 further failure, adjust REGSTACK to include REG at TOP. */
837 gcc_assert (any_malformed_asm);
838 regstack->reg[++regstack->top] = REGNO (reg);
839 return;
840 }
841 gcc_assert (hard_regno >= FIRST_STACK_REG);
842
843 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
844 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]);
845
846 /* Find the previous insn involving stack regs, but don't pass a
847 block boundary. */
848 i1 = NULL;
849 if (current_block && insn != BB_HEAD (current_block))
850 {
851 rtx_insn *tmp = PREV_INSN (insn);
852 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
853 while (tmp != limit)
854 {
855 if (LABEL_P (tmp)
856 || CALL_P (tmp)
857 || NOTE_INSN_BASIC_BLOCK_P (tmp)
858 || (NONJUMP_INSN_P (tmp)
859 && stack_regs_mentioned (tmp)))
860 {
861 i1 = tmp;
862 break;
863 }
864 tmp = PREV_INSN (tmp);
865 }
866 }
867
868 if (i1 != NULL_RTX
869 && (i1set = single_set (i1)) != NULL_RTX)
870 {
871 rtx i1src = *get_true_reg (&SET_SRC (i1set));
872 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
873
874 /* If the previous register stack push was from the reg we are to
875 swap with, omit the swap. */
876
877 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
878 && REG_P (i1src)
879 && REGNO (i1src) == (unsigned) hard_regno - 1
880 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
881 return;
882
883 /* If the previous insn wrote to the reg we are to swap with,
884 omit the swap. */
885
886 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
887 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
888 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
889 return;
890
891 /* Instead of
892 fld a
893 fld b
894 fxch %st(1)
895 just use
896 fld b
897 fld a
898 if possible. Similarly for fld1, fldz, fldpi etc. instead of any
899 of the loads or for float extension from memory. */
900
901 i1src = SET_SRC (i1set);
902 if (GET_CODE (i1src) == FLOAT_EXTEND)
903 i1src = XEXP (i1src, 0);
904 if (REG_P (i1dest)
905 && REGNO (i1dest) == FIRST_STACK_REG
906 && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE)
907 && !side_effects_p (i1src)
908 && hard_regno == FIRST_STACK_REG + 1
909 && i1 != BB_HEAD (current_block))
910 {
911 /* i1 is the last insn that involves stack regs before insn, and
912 is known to be a load without other side-effects, i.e. fld b
913 in the above comment. */
914 rtx_insn *i2 = NULL;
915 rtx i2set;
916 rtx_insn *tmp = PREV_INSN (i1);
917 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
918 /* Find the previous insn involving stack regs, but don't pass a
919 block boundary. */
920 while (tmp != limit)
921 {
922 if (LABEL_P (tmp)
923 || CALL_P (tmp)
924 || NOTE_INSN_BASIC_BLOCK_P (tmp)
925 || (NONJUMP_INSN_P (tmp)
926 && stack_regs_mentioned (tmp)))
927 {
928 i2 = tmp;
929 break;
930 }
931 tmp = PREV_INSN (tmp);
932 }
933 if (i2 != NULL_RTX
934 && (i2set = single_set (i2)) != NULL_RTX)
935 {
936 rtx i2dest = *get_true_reg (&SET_DEST (i2set));
937 rtx i2src = SET_SRC (i2set);
938 if (GET_CODE (i2src) == FLOAT_EXTEND)
939 i2src = XEXP (i2src, 0);
940 /* If the last two insns before insn that involve
941 stack regs are loads, where the latter (i1)
942 pushes onto the register stack and thus
943 moves the value from the first load (i2) from
944 %st to %st(1), consider swapping them. */
945 if (REG_P (i2dest)
946 && REGNO (i2dest) == FIRST_STACK_REG
947 && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE)
948 /* Ensure i2 doesn't have other side-effects. */
949 && !side_effects_p (i2src)
950 /* And that the two instructions can actually be
951 swapped, i.e. there shouldn't be any stores
952 in between i2 and i1 that might alias with
953 the i1 memory, and the memory address can't
954 use registers set in between i2 and i1. */
955 && !modified_between_p (SET_SRC (i1set), i2, i1))
956 {
957 /* Move i1 (fld b above) right before i2 (fld a
958 above. */
959 remove_insn (i1);
960 SET_PREV_INSN (i1) = NULL_RTX;
961 SET_NEXT_INSN (i1) = NULL_RTX;
962 set_block_for_insn (i1, NULL);
963 emit_insn_before (i1, i2);
964 return;
965 }
966 }
967 }
968 }
969
970 /* Avoid emitting the swap if this is the first register stack insn
971 of the current_block. Instead update the current_block's stack_in
972 and let compensate edges take care of this for us. */
973 if (current_block && starting_stack_p)
974 {
975 BLOCK_INFO (current_block)->stack_in = *regstack;
976 starting_stack_p = false;
977 return;
978 }
979
980 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
981 FP_MODE_REG (FIRST_STACK_REG, XFmode));
982
983 if (i1)
984 emit_insn_after (swap_rtx, i1);
985 else if (current_block)
986 emit_insn_before (swap_rtx, BB_HEAD (current_block));
987 else
988 emit_insn_before (swap_rtx, insn);
989}
990
991/* Emit an insns before INSN to swap virtual register SRC1 with
992 the top of stack and virtual register SRC2 with second stack
993 slot. REGSTACK is the stack state before the swaps, and
994 is updated to reflect the swaps. A swap insn is represented as a
995 PARALLEL of two patterns: each pattern moves one reg to the other.
996
997 If SRC1 and/or SRC2 are already at the right place, no swap insn
998 is emitted. */
999
1000static void
1001swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
1002{
1003 struct stack_def temp_stack;
1004 int regno, j, k;
1005
1006 temp_stack = *regstack;
1007
1008 /* Place operand 1 at the top of stack. */
1009 regno = get_hard_regnum (&temp_stack, src1);
1010 gcc_assert (regno >= 0);
1011 if (regno != FIRST_STACK_REG)
1012 {
1013 k = temp_stack.top - (regno - FIRST_STACK_REG);
1014 j = temp_stack.top;
1015
1016 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
1017 }
1018
1019 /* Place operand 2 next on the stack. */
1020 regno = get_hard_regnum (&temp_stack, src2);
1021 gcc_assert (regno >= 0);
1022 if (regno != FIRST_STACK_REG + 1)
1023 {
1024 k = temp_stack.top - (regno - FIRST_STACK_REG);
1025 j = temp_stack.top - 1;
1026
1027 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
1028 }
1029
1030 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1031}
1032
1033/* Handle a move to or from a stack register in PAT, which is in INSN.
1034 REGSTACK is the current stack. Return whether a control flow insn
1035 was deleted in the process. */
1036
1037static bool
1038move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat)
1039{
1040 rtx *psrc = get_true_reg (&SET_SRC (pat));
1041 rtx *pdest = get_true_reg (&SET_DEST (pat));
1042 rtx src, dest;
1043 rtx note;
1044 bool control_flow_insn_deleted = false;
1045
1046 src = *psrc; dest = *pdest;
1047
1048 if (STACK_REG_P (src) && STACK_REG_P (dest))
1049 {
1050 /* Write from one stack reg to another. If SRC dies here, then
1051 just change the register mapping and delete the insn. */
1052
1053 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1054 if (note)
1055 {
1056 int i;
1057
1058 /* If this is a no-op move, there must not be a REG_DEAD note. */
1059 gcc_assert (REGNO (src) != REGNO (dest));
1060
1061 for (i = regstack->top; i >= 0; i--)
1062 if (regstack->reg[i] == REGNO (src))
1063 break;
1064
1065 /* The destination must be dead, or life analysis is borked. */
1066 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1067
1068 /* If the source is not live, this is yet another case of
1069 uninitialized variables. Load up a NaN instead. */
1070 if (i < 0)
1071 return move_nan_for_stack_reg (insn, regstack, dest);
1072
1073 /* It is possible that the dest is unused after this insn.
1074 If so, just pop the src. */
1075
1076 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1077 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1078 else
1079 {
1080 regstack->reg[i] = REGNO (dest);
1081 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1082 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1083 }
1084
1085 control_flow_insn_deleted |= control_flow_insn_p (insn);
1086 delete_insn (insn);
1087 return control_flow_insn_deleted;
1088 }
1089
1090 /* The source reg does not die. */
1091
1092 /* If this appears to be a no-op move, delete it, or else it
1093 will confuse the machine description output patterns. But if
1094 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1095 for REG_UNUSED will not work for deleted insns. */
1096
1097 if (REGNO (src) == REGNO (dest))
1098 {
1099 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1100 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1101
1102 control_flow_insn_deleted |= control_flow_insn_p (insn);
1103 delete_insn (insn);
1104 return control_flow_insn_deleted;
1105 }
1106
1107 /* The destination ought to be dead. */
1108 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1109
1110 replace_reg (psrc, get_hard_regnum (regstack, src));
1111
1112 regstack->reg[++regstack->top] = REGNO (dest);
1113 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1114 replace_reg (pdest, FIRST_STACK_REG);
1115 }
1116 else if (STACK_REG_P (src))
1117 {
1118 /* Save from a stack reg to MEM, or possibly integer reg. Since
1119 only top of stack may be saved, emit an exchange first if
1120 needs be. */
1121
1122 emit_swap_insn (insn, regstack, src);
1123
1124 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1125 if (note)
1126 {
1127 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1128 regstack->top--;
1129 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1130 }
1131 else if ((GET_MODE (src) == XFmode)
1132 && regstack->top < REG_STACK_SIZE - 1)
1133 {
1134 /* A 387 cannot write an XFmode value to a MEM without
1135 clobbering the source reg. The output code can handle
1136 this by reading back the value from the MEM.
1137 But it is more efficient to use a temp register if one is
1138 available. Push the source value here if the register
1139 stack is not full, and then write the value to memory via
1140 a pop. */
1141 rtx push_rtx;
1142 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1143
1144 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1145 emit_insn_before (push_rtx, insn);
1146 add_reg_note (insn, REG_DEAD, top_stack_reg);
1147 }
1148
1149 replace_reg (psrc, FIRST_STACK_REG);
1150 }
1151 else
1152 {
1153 rtx pat = PATTERN (insn);
1154
1155 gcc_assert (STACK_REG_P (dest));
1156
1157 /* Load from MEM, or possibly integer REG or constant, into the
1158 stack regs. The actual target is always the top of the
1159 stack. The stack mapping is changed to reflect that DEST is
1160 now at top of stack. */
1161
1162 /* The destination ought to be dead. However, there is a
1163 special case with i387 UNSPEC_TAN, where destination is live
1164 (an argument to fptan) but inherent load of 1.0 is modelled
1165 as a load from a constant. */
1166 if (GET_CODE (pat) == PARALLEL
1167 && XVECLEN (pat, 0) == 2
1168 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1169 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1170 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1171 emit_swap_insn (insn, regstack, dest);
1172 else
1173 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1174
1175 gcc_assert (regstack->top < REG_STACK_SIZE);
1176
1177 regstack->reg[++regstack->top] = REGNO (dest);
1178 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1179 replace_reg (pdest, FIRST_STACK_REG);
1180 }
1181
1182 return control_flow_insn_deleted;
1183}
1184
1185/* A helper function which replaces INSN with a pattern that loads up
1186 a NaN into DEST, then invokes move_for_stack_reg. */
1187
1188static bool
1189move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
1190{
1191 rtx pat;
1192
1193 dest = FP_MODE_REG (REGNO (dest), SFmode);
1194 pat = gen_rtx_SET (dest, not_a_num);
1195 PATTERN (insn) = pat;
1196 INSN_CODE (insn) = -1;
1197
1198 return move_for_stack_reg (insn, regstack, pat);
1199}
1200
1201/* Swap the condition on a branch, if there is one. Return true if we
1202 found a condition to swap. False if the condition was not used as
1203 such. */
1204
1205static int
1206swap_rtx_condition_1 (rtx pat)
1207{
1208 const char *fmt;
1209 int i, r = 0;
1210
1211 if (COMPARISON_P (pat))
1212 {
1213 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1214 r = 1;
1215 }
1216 else
1217 {
1218 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1219 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1220 {
1221 if (fmt[i] == 'E')
1222 {
1223 int j;
1224
1225 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1226 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1227 }
1228 else if (fmt[i] == 'e')
1229 r |= swap_rtx_condition_1 (XEXP (pat, i));
1230 }
1231 }
1232
1233 return r;
1234}
1235
1236static int
1237swap_rtx_condition (rtx_insn *insn)
1238{
1239 rtx pat = PATTERN (insn);
1240
1241 /* We're looking for a single set to cc0 or an HImode temporary. */
1242
1243 if (GET_CODE (pat) == SET
1244 && REG_P (SET_DEST (pat))
1245 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1246 {
1247 insn = next_flags_user (insn);
1248 if (insn == NULL_RTX)
1249 return 0;
1250 pat = PATTERN (insn);
1251 }
1252
1253 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1254 with the cc value right now. We may be able to search for one
1255 though. */
1256
1257 if (GET_CODE (pat) == SET
1258 && GET_CODE (SET_SRC (pat)) == UNSPEC
1259 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1260 {
1261 rtx dest = SET_DEST (pat);
1262
1263 /* Search forward looking for the first use of this value.
1264 Stop at block boundaries. */
1265 while (insn != BB_END (current_block))
1266 {
1267 insn = NEXT_INSN (insn);
1268 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1269 break;
1270 if (CALL_P (insn))
1271 return 0;
1272 }
1273
1274 /* We haven't found it. */
1275 if (insn == BB_END (current_block))
1276 return 0;
1277
1278 /* So we've found the insn using this value. If it is anything
1279 other than sahf or the value does not die (meaning we'd have
1280 to search further), then we must give up. */
1281 pat = PATTERN (insn);
1282 if (GET_CODE (pat) != SET
1283 || GET_CODE (SET_SRC (pat)) != UNSPEC
1284 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1285 || ! dead_or_set_p (insn, dest))
1286 return 0;
1287
1288 /* Now we are prepared to handle this as a normal cc0 setter. */
1289 insn = next_flags_user (insn);
1290 if (insn == NULL_RTX)
1291 return 0;
1292 pat = PATTERN (insn);
1293 }
1294
1295 if (swap_rtx_condition_1 (pat))
1296 {
1297 int fail = 0;
1298 INSN_CODE (insn) = -1;
1299 if (recog_memoized (insn) == -1)
1300 fail = 1;
1301 /* In case the flags don't die here, recurse to try fix
1302 following user too. */
1303 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1304 {
1305 insn = next_flags_user (insn);
1306 if (!insn || !swap_rtx_condition (insn))
1307 fail = 1;
1308 }
1309 if (fail)
1310 {
1311 swap_rtx_condition_1 (pat);
1312 return 0;
1313 }
1314 return 1;
1315 }
1316 return 0;
1317}
1318
1319/* Handle a comparison. Special care needs to be taken to avoid
1320 causing comparisons that a 387 cannot do correctly, such as EQ.
1321
1322 Also, a pop insn may need to be emitted. The 387 does have an
1323 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1324 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1325 set up. */
1326
1327static void
1328compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack,
1329 rtx pat_src, bool can_pop_second_op)
1330{
1331 rtx *src1, *src2;
1332 rtx src1_note, src2_note;
1333
1334 src1 = get_true_reg (&XEXP (pat_src, 0));
1335 src2 = get_true_reg (&XEXP (pat_src, 1));
1336
1337 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1338 registers that die in this insn - move those to stack top first. */
1339 if ((! STACK_REG_P (*src1)
1340 || (STACK_REG_P (*src2)
1341 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1342 && swap_rtx_condition (insn))
1343 {
1344 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1));
1345
1346 src1 = get_true_reg (&XEXP (pat_src, 0));
1347 src2 = get_true_reg (&XEXP (pat_src, 1));
1348
1349 INSN_CODE (insn) = -1;
1350 }
1351
1352 /* We will fix any death note later. */
1353
1354 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1355
1356 if (STACK_REG_P (*src2))
1357 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1358 else
1359 src2_note = NULL_RTX;
1360
1361 emit_swap_insn (insn, regstack, *src1);
1362
1363 replace_reg (src1, FIRST_STACK_REG);
1364
1365 if (STACK_REG_P (*src2))
1366 replace_reg (src2, get_hard_regnum (regstack, *src2));
1367
1368 if (src1_note)
1369 {
1370 if (*src2 == CONST0_RTX (GET_MODE (*src2)))
1371 {
1372 /* This is `ftst' insn that can't pop register. */
1373 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src1_note, 0)));
1374 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1375 EMIT_AFTER);
1376 }
1377 else
1378 {
1379 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1380 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1381 }
1382 }
1383
1384 /* If the second operand dies, handle that. But if the operands are
1385 the same stack register, don't bother, because only one death is
1386 needed, and it was just handled. */
1387
1388 if (src2_note
1389 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1390 && REGNO (*src1) == REGNO (*src2)))
1391 {
1392 /* As a special case, two regs may die in this insn if src2 is
1393 next to top of stack and the top of stack also dies. Since
1394 we have already popped src1, "next to top of stack" is really
1395 at top (FIRST_STACK_REG) now. */
1396
1397 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1398 && src1_note && can_pop_second_op)
1399 {
1400 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1401 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1402 }
1403 else
1404 {
1405 /* The 386 can only represent death of the first operand in
1406 the case handled above. In all other cases, emit a separate
1407 pop and remove the death note from here. */
1408 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1409 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1410 EMIT_AFTER);
1411 }
1412 }
1413}
1414
1415/* Substitute hardware stack regs in debug insn INSN, using stack
1416 layout REGSTACK. If we can't find a hardware stack reg for any of
1417 the REGs in it, reset the debug insn. */
1418
1419static void
1420subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack)
1421{
1422 subrtx_ptr_iterator::array_type array;
1423 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST)
1424 {
1425 rtx *loc = *iter;
1426 rtx x = *loc;
1427 if (STACK_REG_P (x))
1428 {
1429 int hard_regno = get_hard_regnum (regstack, x);
1430
1431 /* If we can't find an active register, reset this debug insn. */
1432 if (hard_regno == -1)
1433 {
1434 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1435 return;
1436 }
1437
1438 gcc_assert (hard_regno >= FIRST_STACK_REG);
1439 replace_reg (loc, hard_regno);
1440 iter.skip_subrtxes ();
1441 }
1442 }
1443}
1444
1445/* Substitute new registers in PAT, which is part of INSN. REGSTACK
1446 is the current register layout. Return whether a control flow insn
1447 was deleted in the process. */
1448
1449static bool
1450subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
1451{
1452 rtx *dest, *src;
1453 bool control_flow_insn_deleted = false;
1454
1455 switch (GET_CODE (pat))
1456 {
1457 case USE:
1458 /* Deaths in USE insns can happen in non optimizing compilation.
1459 Handle them by popping the dying register. */
1460 src = get_true_reg (&XEXP (pat, 0));
1461 if (STACK_REG_P (*src)
1462 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1463 {
1464 /* USEs are ignored for liveness information so USEs of dead
1465 register might happen. */
1466 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1467 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1468 return control_flow_insn_deleted;
1469 }
1470 /* Uninitialized USE might happen for functions returning uninitialized
1471 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1472 so it is safe to ignore the use here. This is consistent with behavior
1473 of dataflow analyzer that ignores USE too. (This also imply that
1474 forcibly initializing the register to NaN here would lead to ICE later,
1475 since the REG_DEAD notes are not issued.) */
1476 break;
1477
1478 case VAR_LOCATION:
1479 gcc_unreachable ();
1480
1481 case CLOBBER:
1482 {
1483 rtx note;
1484
1485 dest = get_true_reg (&XEXP (pat, 0));
1486 if (STACK_REG_P (*dest))
1487 {
1488 note = find_reg_note (insn, REG_DEAD, *dest);
1489
1490 if (pat != PATTERN (insn))
1491 {
1492 /* The fix_truncdi_1 pattern wants to be able to
1493 allocate its own scratch register. It does this by
1494 clobbering an fp reg so that it is assured of an
1495 empty reg-stack register. If the register is live,
1496 kill it now. Remove the DEAD/UNUSED note so we
1497 don't try to kill it later too.
1498
1499 In reality the UNUSED note can be absent in some
1500 complicated cases when the register is reused for
1501 partially set variable. */
1502
1503 if (note)
1504 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1505 else
1506 note = find_reg_note (insn, REG_UNUSED, *dest);
1507 if (note)
1508 remove_note (insn, note);
1509 replace_reg (dest, FIRST_STACK_REG + 1);
1510 }
1511 else
1512 {
1513 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1514 indicates an uninitialized value. Because reload removed
1515 all other clobbers, this must be due to a function
1516 returning without a value. Load up a NaN. */
1517
1518 if (!note)
1519 {
1520 rtx t = *dest;
1521 if (COMPLEX_MODE_P (GET_MODE (t)))
1522 {
1523 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1524 if (get_hard_regnum (regstack, u) == -1)
1525 {
1526 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1527 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1528 control_flow_insn_deleted
1529 |= move_nan_for_stack_reg (insn2, regstack, u);
1530 }
1531 }
1532 if (get_hard_regnum (regstack, t) == -1)
1533 control_flow_insn_deleted
1534 |= move_nan_for_stack_reg (insn, regstack, t);
1535 }
1536 }
1537 }
1538 break;
1539 }
1540
1541 case SET:
1542 {
1543 rtx *src1 = (rtx *) 0, *src2;
1544 rtx src1_note, src2_note;
1545 rtx pat_src;
1546
1547 dest = get_true_reg (&SET_DEST (pat));
1548 src = get_true_reg (&SET_SRC (pat));
1549 pat_src = SET_SRC (pat);
1550
1551 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1552 if (STACK_REG_P (*src)
1553 || (STACK_REG_P (*dest)
1554 && (REG_P (*src) || MEM_P (*src)
1555 || CONST_DOUBLE_P (*src))))
1556 {
1557 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1558 break;
1559 }
1560
1561 switch (GET_CODE (pat_src))
1562 {
1563 case CALL:
1564 {
1565 int count;
1566 for (count = REG_NREGS (*dest); --count >= 0;)
1567 {
1568 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1569 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1570 }
1571 }
1572 replace_reg (dest, FIRST_STACK_REG);
1573 break;
1574
1575 case REG:
1576 /* This is a `tstM2' case. */
1577 gcc_assert (*dest == cc0_rtx);
1578 src1 = src;
1579
1580 /* Fall through. */
1581
1582 case FLOAT_TRUNCATE:
1583 case SQRT:
1584 case ABS:
1585 case NEG:
1586 /* These insns only operate on the top of the stack. DEST might
1587 be cc0_rtx if we're processing a tstM pattern. Also, it's
1588 possible that the tstM case results in a REG_DEAD note on the
1589 source. */
1590
1591 if (src1 == 0)
1592 src1 = get_true_reg (&XEXP (pat_src, 0));
1593
1594 emit_swap_insn (insn, regstack, *src1);
1595
1596 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1597
1598 if (STACK_REG_P (*dest))
1599 replace_reg (dest, FIRST_STACK_REG);
1600
1601 if (src1_note)
1602 {
1603 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1604 regstack->top--;
1605 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1606 }
1607
1608 replace_reg (src1, FIRST_STACK_REG);
1609 break;
1610
1611 case MINUS:
1612 case DIV:
1613 /* On i386, reversed forms of subM3 and divM3 exist for
1614 MODE_FLOAT, so the same code that works for addM3 and mulM3
1615 can be used. */
1616 case MULT:
1617 case PLUS:
1618 /* These insns can accept the top of stack as a destination
1619 from a stack reg or mem, or can use the top of stack as a
1620 source and some other stack register (possibly top of stack)
1621 as a destination. */
1622
1623 src1 = get_true_reg (&XEXP (pat_src, 0));
1624 src2 = get_true_reg (&XEXP (pat_src, 1));
1625
1626 /* We will fix any death note later. */
1627
1628 if (STACK_REG_P (*src1))
1629 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1630 else
1631 src1_note = NULL_RTX;
1632 if (STACK_REG_P (*src2))
1633 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1634 else
1635 src2_note = NULL_RTX;
1636
1637 /* If either operand is not a stack register, then the dest
1638 must be top of stack. */
1639
1640 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1641 emit_swap_insn (insn, regstack, *dest);
1642 else
1643 {
1644 /* Both operands are REG. If neither operand is already
1645 at the top of stack, choose to make the one that is the
1646 dest the new top of stack. */
1647
1648 int src1_hard_regnum, src2_hard_regnum;
1649
1650 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1651 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1652
1653 /* If the source is not live, this is yet another case of
1654 uninitialized variables. Load up a NaN instead. */
1655 if (src1_hard_regnum == -1)
1656 {
1657 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1658 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1659 control_flow_insn_deleted
1660 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1661 }
1662 if (src2_hard_regnum == -1)
1663 {
1664 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1665 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1666 control_flow_insn_deleted
1667 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1668 }
1669
1670 if (src1_hard_regnum != FIRST_STACK_REG
1671 && src2_hard_regnum != FIRST_STACK_REG)
1672 emit_swap_insn (insn, regstack, *dest);
1673 }
1674
1675 if (STACK_REG_P (*src1))
1676 replace_reg (src1, get_hard_regnum (regstack, *src1));
1677 if (STACK_REG_P (*src2))
1678 replace_reg (src2, get_hard_regnum (regstack, *src2));
1679
1680 if (src1_note)
1681 {
1682 rtx src1_reg = XEXP (src1_note, 0);
1683
1684 /* If the register that dies is at the top of stack, then
1685 the destination is somewhere else - merely substitute it.
1686 But if the reg that dies is not at top of stack, then
1687 move the top of stack to the dead reg, as though we had
1688 done the insn and then a store-with-pop. */
1689
1690 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1691 {
1692 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1693 replace_reg (dest, get_hard_regnum (regstack, *dest));
1694 }
1695 else
1696 {
1697 int regno = get_hard_regnum (regstack, src1_reg);
1698
1699 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1700 replace_reg (dest, regno);
1701
1702 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1703 = regstack->reg[regstack->top];
1704 }
1705
1706 CLEAR_HARD_REG_BIT (regstack->reg_set,
1707 REGNO (XEXP (src1_note, 0)));
1708 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1709 regstack->top--;
1710 }
1711 else if (src2_note)
1712 {
1713 rtx src2_reg = XEXP (src2_note, 0);
1714 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1715 {
1716 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1717 replace_reg (dest, get_hard_regnum (regstack, *dest));
1718 }
1719 else
1720 {
1721 int regno = get_hard_regnum (regstack, src2_reg);
1722
1723 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1724 replace_reg (dest, regno);
1725
1726 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1727 = regstack->reg[regstack->top];
1728 }
1729
1730 CLEAR_HARD_REG_BIT (regstack->reg_set,
1731 REGNO (XEXP (src2_note, 0)));
1732 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1733 regstack->top--;
1734 }
1735 else
1736 {
1737 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1738 replace_reg (dest, get_hard_regnum (regstack, *dest));
1739 }
1740
1741 /* Keep operand 1 matching with destination. */
1742 if (COMMUTATIVE_ARITH_P (pat_src)
1743 && REG_P (*src1) && REG_P (*src2)
1744 && REGNO (*src1) != REGNO (*dest))
1745 {
1746 int tmp = REGNO (*src1);
1747 replace_reg (src1, REGNO (*src2));
1748 replace_reg (src2, tmp);
1749 }
1750 break;
1751
1752 case UNSPEC:
1753 switch (XINT (pat_src, 1))
1754 {
1755 case UNSPEC_FIST:
1756 case UNSPEC_FIST_ATOMIC:
1757
1758 case UNSPEC_FIST_FLOOR:
1759 case UNSPEC_FIST_CEIL:
1760
1761 /* These insns only operate on the top of the stack. */
1762
1763 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1764 emit_swap_insn (insn, regstack, *src1);
1765
1766 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1767
1768 if (STACK_REG_P (*dest))
1769 replace_reg (dest, FIRST_STACK_REG);
1770
1771 if (src1_note)
1772 {
1773 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1774 regstack->top--;
1775 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1776 }
1777
1778 replace_reg (src1, FIRST_STACK_REG);
1779 break;
1780
1781 case UNSPEC_FXAM:
1782
1783 /* This insn only operate on the top of the stack. */
1784
1785 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1786 emit_swap_insn (insn, regstack, *src1);
1787
1788 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1789
1790 replace_reg (src1, FIRST_STACK_REG);
1791
1792 if (src1_note)
1793 {
1794 remove_regno_note (insn, REG_DEAD,
1795 REGNO (XEXP (src1_note, 0)));
1796 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1797 EMIT_AFTER);
1798 }
1799
1800 break;
1801
1802 case UNSPEC_SIN:
1803 case UNSPEC_COS:
1804 case UNSPEC_FRNDINT:
1805 case UNSPEC_F2XM1:
1806
1807 case UNSPEC_FRNDINT_FLOOR:
1808 case UNSPEC_FRNDINT_CEIL:
1809 case UNSPEC_FRNDINT_TRUNC:
1810 case UNSPEC_FRNDINT_MASK_PM:
1811
1812 /* Above insns operate on the top of the stack. */
1813
1814 case UNSPEC_SINCOS_COS:
1815 case UNSPEC_XTRACT_FRACT:
1816
1817 /* Above insns operate on the top two stack slots,
1818 first part of one input, double output insn. */
1819
1820 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1821
1822 emit_swap_insn (insn, regstack, *src1);
1823
1824 /* Input should never die, it is replaced with output. */
1825 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1826 gcc_assert (!src1_note);
1827
1828 if (STACK_REG_P (*dest))
1829 replace_reg (dest, FIRST_STACK_REG);
1830
1831 replace_reg (src1, FIRST_STACK_REG);
1832 break;
1833
1834 case UNSPEC_SINCOS_SIN:
1835 case UNSPEC_XTRACT_EXP:
1836
1837 /* These insns operate on the top two stack slots,
1838 second part of one input, double output insn. */
1839
1840 regstack->top++;
1841 /* FALLTHRU */
1842
1843 case UNSPEC_TAN:
1844
1845 /* For UNSPEC_TAN, regstack->top is already increased
1846 by inherent load of constant 1.0. */
1847
1848 /* Output value is generated in the second stack slot.
1849 Move current value from second slot to the top. */
1850 regstack->reg[regstack->top]
1851 = regstack->reg[regstack->top - 1];
1852
1853 gcc_assert (STACK_REG_P (*dest));
1854
1855 regstack->reg[regstack->top - 1] = REGNO (*dest);
1856 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1857 replace_reg (dest, FIRST_STACK_REG + 1);
1858
1859 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1860
1861 replace_reg (src1, FIRST_STACK_REG);
1862 break;
1863
1864 case UNSPEC_FPATAN:
1865 case UNSPEC_FYL2X:
1866 case UNSPEC_FYL2XP1:
1867 /* These insns operate on the top two stack slots. */
1868
1869 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1870 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1871
1872 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1873 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1874
1875 swap_to_top (insn, regstack, *src1, *src2);
1876
1877 replace_reg (src1, FIRST_STACK_REG);
1878 replace_reg (src2, FIRST_STACK_REG + 1);
1879
1880 if (src1_note)
1881 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1882 if (src2_note)
1883 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1884
1885 /* Pop both input operands from the stack. */
1886 CLEAR_HARD_REG_BIT (regstack->reg_set,
1887 regstack->reg[regstack->top]);
1888 CLEAR_HARD_REG_BIT (regstack->reg_set,
1889 regstack->reg[regstack->top - 1]);
1890 regstack->top -= 2;
1891
1892 /* Push the result back onto the stack. */
1893 regstack->reg[++regstack->top] = REGNO (*dest);
1894 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1895 replace_reg (dest, FIRST_STACK_REG);
1896 break;
1897
1898 case UNSPEC_FSCALE_FRACT:
1899 case UNSPEC_FPREM_F:
1900 case UNSPEC_FPREM1_F:
1901 /* These insns operate on the top two stack slots,
1902 first part of double input, double output insn. */
1903
1904 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1905 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1906
1907 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1908 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1909
1910 /* Inputs should never die, they are
1911 replaced with outputs. */
1912 gcc_assert (!src1_note);
1913 gcc_assert (!src2_note);
1914
1915 swap_to_top (insn, regstack, *src1, *src2);
1916
1917 /* Push the result back onto stack. Empty stack slot
1918 will be filled in second part of insn. */
1919 if (STACK_REG_P (*dest))
1920 {
1921 regstack->reg[regstack->top] = REGNO (*dest);
1922 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1923 replace_reg (dest, FIRST_STACK_REG);
1924 }
1925
1926 replace_reg (src1, FIRST_STACK_REG);
1927 replace_reg (src2, FIRST_STACK_REG + 1);
1928 break;
1929
1930 case UNSPEC_FSCALE_EXP:
1931 case UNSPEC_FPREM_U:
1932 case UNSPEC_FPREM1_U:
1933 /* These insns operate on the top two stack slots,
1934 second part of double input, double output insn. */
1935
1936 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1937 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1938
1939 /* Push the result back onto stack. Fill empty slot from
1940 first part of insn and fix top of stack pointer. */
1941 if (STACK_REG_P (*dest))
1942 {
1943 regstack->reg[regstack->top - 1] = REGNO (*dest);
1944 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1945 replace_reg (dest, FIRST_STACK_REG + 1);
1946 }
1947
1948 replace_reg (src1, FIRST_STACK_REG);
1949 replace_reg (src2, FIRST_STACK_REG + 1);
1950 break;
1951
1952 case UNSPEC_C2_FLAG:
1953 /* This insn operates on the top two stack slots,
1954 third part of C2 setting double input insn. */
1955
1956 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1957 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1958
1959 replace_reg (src1, FIRST_STACK_REG);
1960 replace_reg (src2, FIRST_STACK_REG + 1);
1961 break;
1962
1963 case UNSPEC_FNSTSW:
1964 /* Combined fcomp+fnstsw generated for doing well with
1965 CSE. When optimizing this would have been broken
1966 up before now. */
1967
1968 pat_src = XVECEXP (pat_src, 0, 0);
1969 if (GET_CODE (pat_src) == COMPARE)
1970 goto do_compare;
1971
1972 /* Fall through. */
1973
1974 case UNSPEC_NOTRAP:
1975
1976 pat_src = XVECEXP (pat_src, 0, 0);
1977 gcc_assert (GET_CODE (pat_src) == COMPARE);
1978 goto do_compare;
1979
1980 default:
1981 gcc_unreachable ();
1982 }
1983 break;
1984
1985 case COMPARE:
1986 do_compare:
1987 /* `fcomi' insn can't pop two regs. */
1988 compare_for_stack_reg (insn, regstack, pat_src,
1989 REGNO (*dest) != FLAGS_REG);
1990 break;
1991
1992 case IF_THEN_ELSE:
1993 /* This insn requires the top of stack to be the destination. */
1994
1995 src1 = get_true_reg (&XEXP (pat_src, 1));
1996 src2 = get_true_reg (&XEXP (pat_src, 2));
1997
1998 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1999 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2000
2001 /* If the comparison operator is an FP comparison operator,
2002 it is handled correctly by compare_for_stack_reg () who
2003 will move the destination to the top of stack. But if the
2004 comparison operator is not an FP comparison operator, we
2005 have to handle it here. */
2006 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
2007 && REGNO (*dest) != regstack->reg[regstack->top])
2008 {
2009 /* In case one of operands is the top of stack and the operands
2010 dies, it is safe to make it the destination operand by
2011 reversing the direction of cmove and avoid fxch. */
2012 if ((REGNO (*src1) == regstack->reg[regstack->top]
2013 && src1_note)
2014 || (REGNO (*src2) == regstack->reg[regstack->top]
2015 && src2_note))
2016 {
2017 int idx1 = (get_hard_regnum (regstack, *src1)
2018 - FIRST_STACK_REG);
2019 int idx2 = (get_hard_regnum (regstack, *src2)
2020 - FIRST_STACK_REG);
2021
2022 /* Make reg-stack believe that the operands are already
2023 swapped on the stack */
2024 regstack->reg[regstack->top - idx1] = REGNO (*src2);
2025 regstack->reg[regstack->top - idx2] = REGNO (*src1);
2026
2027 /* Reverse condition to compensate the operand swap.
2028 i386 do have comparison always reversible. */
2029 PUT_CODE (XEXP (pat_src, 0),
2030 reversed_comparison_code (XEXP (pat_src, 0), insn));
2031 }
2032 else
2033 emit_swap_insn (insn, regstack, *dest);
2034 }
2035
2036 {
2037 rtx src_note [3];
2038 int i;
2039
2040 src_note[0] = 0;
2041 src_note[1] = src1_note;
2042 src_note[2] = src2_note;
2043
2044 if (STACK_REG_P (*src1))
2045 replace_reg (src1, get_hard_regnum (regstack, *src1));
2046 if (STACK_REG_P (*src2))
2047 replace_reg (src2, get_hard_regnum (regstack, *src2));
2048
2049 for (i = 1; i <= 2; i++)
2050 if (src_note [i])
2051 {
2052 int regno = REGNO (XEXP (src_note[i], 0));
2053
2054 /* If the register that dies is not at the top of
2055 stack, then move the top of stack to the dead reg.
2056 Top of stack should never die, as it is the
2057 destination. */
2058 gcc_assert (regno != regstack->reg[regstack->top]);
2059 remove_regno_note (insn, REG_DEAD, regno);
2060 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2061 EMIT_AFTER);
2062 }
2063 }
2064
2065 /* Make dest the top of stack. Add dest to regstack if
2066 not present. */
2067 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2068 regstack->reg[++regstack->top] = REGNO (*dest);
2069 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2070 replace_reg (dest, FIRST_STACK_REG);
2071 break;
2072
2073 default:
2074 gcc_unreachable ();
2075 }
2076 break;
2077 }
2078
2079 default:
2080 break;
2081 }
2082
2083 return control_flow_insn_deleted;
2084}
2085
2086/* Substitute hard regnums for any stack regs in INSN, which has
2087 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2088 before the insn, and is updated with changes made here.
2089
2090 There are several requirements and assumptions about the use of
2091 stack-like regs in asm statements. These rules are enforced by
2092 record_asm_stack_regs; see comments there for details. Any
2093 asm_operands left in the RTL at this point may be assume to meet the
2094 requirements, since record_asm_stack_regs removes any problem asm. */
2095
2096static void
2097subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack)
2098{
2099 rtx body = PATTERN (insn);
2100
2101 rtx *note_reg; /* Array of note contents */
2102 rtx **note_loc; /* Address of REG field of each note */
2103 enum reg_note *note_kind; /* The type of each note */
2104
2105 rtx *clobber_reg = 0;
2106 rtx **clobber_loc = 0;
2107
2108 struct stack_def temp_stack;
2109 int n_notes;
2110 int n_clobbers;
2111 rtx note;
2112 int i;
2113 int n_inputs, n_outputs;
2114
2115 if (! check_asm_stack_operands (insn))
2116 return;
2117
2118 /* Find out what the constraints required. If no constraint
2119 alternative matches, that is a compiler bug: we should have caught
2120 such an insn in check_asm_stack_operands. */
2121 extract_constrain_insn (insn);
2122
2123 preprocess_constraints (insn);
2124 const operand_alternative *op_alt = which_op_alt ();
2125
2126 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2127
2128 /* Strip SUBREGs here to make the following code simpler. */
2129 for (i = 0; i < recog_data.n_operands; i++)
2130 if (GET_CODE (recog_data.operand[i]) == SUBREG
2131 && REG_P (SUBREG_REG (recog_data.operand[i])))
2132 {
2133 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2134 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2135 }
2136
2137 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2138
2139 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2140 i++;
2141
2142 note_reg = XALLOCAVEC (rtx, i);
2143 note_loc = XALLOCAVEC (rtx *, i);
2144 note_kind = XALLOCAVEC (enum reg_note, i);
2145
2146 n_notes = 0;
2147 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2148 {
2149 if (GET_CODE (note) != EXPR_LIST)
2150 continue;
2151 rtx reg = XEXP (note, 0);
2152 rtx *loc = & XEXP (note, 0);
2153
2154 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2155 {
2156 loc = & SUBREG_REG (reg);
2157 reg = SUBREG_REG (reg);
2158 }
2159
2160 if (STACK_REG_P (reg)
2161 && (REG_NOTE_KIND (note) == REG_DEAD
2162 || REG_NOTE_KIND (note) == REG_UNUSED))
2163 {
2164 note_reg[n_notes] = reg;
2165 note_loc[n_notes] = loc;
2166 note_kind[n_notes] = REG_NOTE_KIND (note);
2167 n_notes++;
2168 }
2169 }
2170
2171 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2172
2173 n_clobbers = 0;
2174
2175 if (GET_CODE (body) == PARALLEL)
2176 {
2177 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2178 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2179
2180 for (i = 0; i < XVECLEN (body, 0); i++)
2181 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2182 {
2183 rtx clobber = XVECEXP (body, 0, i);
2184 rtx reg = XEXP (clobber, 0);
2185 rtx *loc = & XEXP (clobber, 0);
2186
2187 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2188 {
2189 loc = & SUBREG_REG (reg);
2190 reg = SUBREG_REG (reg);
2191 }
2192
2193 if (STACK_REG_P (reg))
2194 {
2195 clobber_reg[n_clobbers] = reg;
2196 clobber_loc[n_clobbers] = loc;
2197 n_clobbers++;
2198 }
2199 }
2200 }
2201
2202 temp_stack = *regstack;
2203
2204 /* Put the input regs into the desired place in TEMP_STACK. */
2205
2206 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2207 if (STACK_REG_P (recog_data.operand[i])
2208 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS)
2209 && op_alt[i].cl != FLOAT_REGS)
2210 {
2211 /* If an operand needs to be in a particular reg in
2212 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2213 these constraints are for single register classes, and
2214 reload guaranteed that operand[i] is already in that class,
2215 we can just use REGNO (recog_data.operand[i]) to know which
2216 actual reg this operand needs to be in. */
2217
2218 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2219
2220 gcc_assert (regno >= 0);
2221
2222 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2223 {
2224 /* recog_data.operand[i] is not in the right place. Find
2225 it and swap it with whatever is already in I's place.
2226 K is where recog_data.operand[i] is now. J is where it
2227 should be. */
2228 int j, k;
2229
2230 k = temp_stack.top - (regno - FIRST_STACK_REG);
2231 j = (temp_stack.top
2232 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2233
2234 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
2235 }
2236 }
2237
2238 /* Emit insns before INSN to make sure the reg-stack is in the right
2239 order. */
2240
2241 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2242
2243 /* Make the needed input register substitutions. Do death notes and
2244 clobbers too, because these are for inputs, not outputs. */
2245
2246 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2247 if (STACK_REG_P (recog_data.operand[i]))
2248 {
2249 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2250
2251 gcc_assert (regnum >= 0);
2252
2253 replace_reg (recog_data.operand_loc[i], regnum);
2254 }
2255
2256 for (i = 0; i < n_notes; i++)
2257 if (note_kind[i] == REG_DEAD)
2258 {
2259 int regnum = get_hard_regnum (regstack, note_reg[i]);
2260
2261 gcc_assert (regnum >= 0);
2262
2263 replace_reg (note_loc[i], regnum);
2264 }
2265
2266 for (i = 0; i < n_clobbers; i++)
2267 {
2268 /* It's OK for a CLOBBER to reference a reg that is not live.
2269 Don't try to replace it in that case. */
2270 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2271
2272 if (regnum >= 0)
2273 {
2274 /* Sigh - clobbers always have QImode. But replace_reg knows
2275 that these regs can't be MODE_INT and will assert. Just put
2276 the right reg there without calling replace_reg. */
2277
2278 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2279 }
2280 }
2281
2282 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2283
2284 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2285 if (STACK_REG_P (recog_data.operand[i]))
2286 {
2287 /* An input reg is implicitly popped if it is tied to an
2288 output, or if there is a CLOBBER for it. */
2289 int j;
2290
2291 for (j = 0; j < n_clobbers; j++)
2292 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2293 break;
2294
2295 if (j < n_clobbers || op_alt[i].matches >= 0)
2296 {
2297 /* recog_data.operand[i] might not be at the top of stack.
2298 But that's OK, because all we need to do is pop the
2299 right number of regs off of the top of the reg-stack.
2300 record_asm_stack_regs guaranteed that all implicitly
2301 popped regs were grouped at the top of the reg-stack. */
2302
2303 CLEAR_HARD_REG_BIT (regstack->reg_set,
2304 regstack->reg[regstack->top]);
2305 regstack->top--;
2306 }
2307 }
2308
2309 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2310 Note that there isn't any need to substitute register numbers.
2311 ??? Explain why this is true. */
2312
2313 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2314 {
2315 /* See if there is an output for this hard reg. */
2316 int j;
2317
2318 for (j = 0; j < n_outputs; j++)
2319 if (STACK_REG_P (recog_data.operand[j])
2320 && REGNO (recog_data.operand[j]) == (unsigned) i)
2321 {
2322 regstack->reg[++regstack->top] = i;
2323 SET_HARD_REG_BIT (regstack->reg_set, i);
2324 break;
2325 }
2326 }
2327
2328 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2329 input that the asm didn't implicitly pop. If the asm didn't
2330 implicitly pop an input reg, that reg will still be live.
2331
2332 Note that we can't use find_regno_note here: the register numbers
2333 in the death notes have already been substituted. */
2334
2335 for (i = 0; i < n_outputs; i++)
2336 if (STACK_REG_P (recog_data.operand[i]))
2337 {
2338 int j;
2339
2340 for (j = 0; j < n_notes; j++)
2341 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2342 && note_kind[j] == REG_UNUSED)
2343 {
2344 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2345 EMIT_AFTER);
2346 break;
2347 }
2348 }
2349
2350 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2351 if (STACK_REG_P (recog_data.operand[i]))
2352 {
2353 int j;
2354
2355 for (j = 0; j < n_notes; j++)
2356 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2357 && note_kind[j] == REG_DEAD
2358 && TEST_HARD_REG_BIT (regstack->reg_set,
2359 REGNO (recog_data.operand[i])))
2360 {
2361 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2362 EMIT_AFTER);
2363 break;
2364 }
2365 }
2366}
2367
2368/* Substitute stack hard reg numbers for stack virtual registers in
2369 INSN. Non-stack register numbers are not changed. REGSTACK is the
2370 current stack content. Insns may be emitted as needed to arrange the
2371 stack for the 387 based on the contents of the insn. Return whether
2372 a control flow insn was deleted in the process. */
2373
2374static bool
2375subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
2376{
2377 rtx *note_link, note;
2378 bool control_flow_insn_deleted = false;
2379 int i;
2380
2381 if (CALL_P (insn))
2382 {
2383 int top = regstack->top;
2384
2385 /* If there are any floating point parameters to be passed in
2386 registers for this call, make sure they are in the right
2387 order. */
2388
2389 if (top >= 0)
2390 {
2391 straighten_stack (insn, regstack);
2392
2393 /* Now mark the arguments as dead after the call. */
2394
2395 while (regstack->top >= 0)
2396 {
2397 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2398 regstack->top--;
2399 }
2400 }
2401 }
2402
2403 /* Do the actual substitution if any stack regs are mentioned.
2404 Since we only record whether entire insn mentions stack regs, and
2405 subst_stack_regs_pat only works for patterns that contain stack regs,
2406 we must check each pattern in a parallel here. A call_value_pop could
2407 fail otherwise. */
2408
2409 if (stack_regs_mentioned (insn))
2410 {
2411 int n_operands = asm_noperands (PATTERN (insn));
2412 if (n_operands >= 0)
2413 {
2414 /* This insn is an `asm' with operands. Decode the operands,
2415 decide how many are inputs, and do register substitution.
2416 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2417
2418 subst_asm_stack_regs (insn, regstack);
2419 return control_flow_insn_deleted;
2420 }
2421
2422 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2423 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2424 {
2425 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2426 {
2427 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2428 XVECEXP (PATTERN (insn), 0, i)
2429 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2430 control_flow_insn_deleted
2431 |= subst_stack_regs_pat (insn, regstack,
2432 XVECEXP (PATTERN (insn), 0, i));
2433 }
2434 }
2435 else
2436 control_flow_insn_deleted
2437 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2438 }
2439
2440 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2441 REG_UNUSED will already have been dealt with, so just return. */
2442
2443 if (NOTE_P (insn) || insn->deleted ())
2444 return control_flow_insn_deleted;
2445
2446 /* If this a noreturn call, we can't insert pop insns after it.
2447 Instead, reset the stack state to empty. */
2448 if (CALL_P (insn)
2449 && find_reg_note (insn, REG_NORETURN, NULL))
2450 {
2451 regstack->top = -1;
2452 CLEAR_HARD_REG_SET (regstack->reg_set);
2453 return control_flow_insn_deleted;
2454 }
2455
2456 /* If there is a REG_UNUSED note on a stack register on this insn,
2457 the indicated reg must be popped. The REG_UNUSED note is removed,
2458 since the form of the newly emitted pop insn references the reg,
2459 making it no longer `unset'. */
2460
2461 note_link = &REG_NOTES (insn);
2462 for (note = *note_link; note; note = XEXP (note, 1))
2463 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2464 {
2465 *note_link = XEXP (note, 1);
2466 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2467 }
2468 else
2469 note_link = &XEXP (note, 1);
2470
2471 return control_flow_insn_deleted;
2472}
2473
2474/* Change the organization of the stack so that it fits a new basic
2475 block. Some registers might have to be popped, but there can never be
2476 a register live in the new block that is not now live.
2477
2478 Insert any needed insns before or after INSN, as indicated by
2479 WHERE. OLD is the original stack layout, and NEW is the desired
2480 form. OLD is updated to reflect the code emitted, i.e., it will be
2481 the same as NEW upon return.
2482
2483 This function will not preserve block_end[]. But that information
2484 is no longer needed once this has executed. */
2485
2486static void
2487change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
2488 enum emit_where where)
2489{
2490 int reg;
2491 int update_end = 0;
2492 int i;
2493
2494 /* Stack adjustments for the first insn in a block update the
2495 current_block's stack_in instead of inserting insns directly.
2496 compensate_edges will add the necessary code later. */
2497 if (current_block
2498 && starting_stack_p
2499 && where == EMIT_BEFORE)
2500 {
2501 BLOCK_INFO (current_block)->stack_in = *new_stack;
2502 starting_stack_p = false;
2503 *old = *new_stack;
2504 return;
2505 }
2506
2507 /* We will be inserting new insns "backwards". If we are to insert
2508 after INSN, find the next insn, and insert before it. */
2509
2510 if (where == EMIT_AFTER)
2511 {
2512 if (current_block && BB_END (current_block) == insn)
2513 update_end = 1;
2514 insn = NEXT_INSN (insn);
2515 }
2516
2517 /* Initialize partially dead variables. */
2518 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2519 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2520 && !TEST_HARD_REG_BIT (old->reg_set, i))
2521 {
2522 old->reg[++old->top] = i;
2523 SET_HARD_REG_BIT (old->reg_set, i);
2524 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num),
2525 insn);
2526 }
2527
2528 /* Pop any registers that are not needed in the new block. */
2529
2530 /* If the destination block's stack already has a specified layout
2531 and contains two or more registers, use a more intelligent algorithm
2532 to pop registers that minimizes the number of fxchs below. */
2533 if (new_stack->top > 0)
2534 {
2535 bool slots[REG_STACK_SIZE];
2536 int pops[REG_STACK_SIZE];
2537 int next, dest, topsrc;
2538
2539 /* First pass to determine the free slots. */
2540 for (reg = 0; reg <= new_stack->top; reg++)
2541 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2542
2543 /* Second pass to allocate preferred slots. */
2544 topsrc = -1;
2545 for (reg = old->top; reg > new_stack->top; reg--)
2546 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2547 {
2548 dest = -1;
2549 for (next = 0; next <= new_stack->top; next++)
2550 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2551 {
2552 /* If this is a preference for the new top of stack, record
2553 the fact by remembering it's old->reg in topsrc. */
2554 if (next == new_stack->top)
2555 topsrc = reg;
2556 slots[next] = true;
2557 dest = next;
2558 break;
2559 }
2560 pops[reg] = dest;
2561 }
2562 else
2563 pops[reg] = reg;
2564
2565 /* Intentionally, avoid placing the top of stack in it's correct
2566 location, if we still need to permute the stack below and we
2567 can usefully place it somewhere else. This is the case if any
2568 slot is still unallocated, in which case we should place the
2569 top of stack there. */
2570 if (topsrc != -1)
2571 for (reg = 0; reg < new_stack->top; reg++)
2572 if (!slots[reg])
2573 {
2574 pops[topsrc] = reg;
2575 slots[new_stack->top] = false;
2576 slots[reg] = true;
2577 break;
2578 }
2579
2580 /* Third pass allocates remaining slots and emits pop insns. */
2581 next = new_stack->top;
2582 for (reg = old->top; reg > new_stack->top; reg--)
2583 {
2584 dest = pops[reg];
2585 if (dest == -1)
2586 {
2587 /* Find next free slot. */
2588 while (slots[next])
2589 next--;
2590 dest = next--;
2591 }
2592 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2593 EMIT_BEFORE);
2594 }
2595 }
2596 else
2597 {
2598 /* The following loop attempts to maximize the number of times we
2599 pop the top of the stack, as this permits the use of the faster
2600 ffreep instruction on platforms that support it. */
2601 int live, next;
2602
2603 live = 0;
2604 for (reg = 0; reg <= old->top; reg++)
2605 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2606 live++;
2607
2608 next = live;
2609 while (old->top >= live)
2610 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2611 {
2612 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2613 next--;
2614 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2615 EMIT_BEFORE);
2616 }
2617 else
2618 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2619 EMIT_BEFORE);
2620 }
2621
2622 if (new_stack->top == -2)
2623 {
2624 /* If the new block has never been processed, then it can inherit
2625 the old stack order. */
2626
2627 new_stack->top = old->top;
2628 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2629 }
2630 else
2631 {
2632 /* This block has been entered before, and we must match the
2633 previously selected stack order. */
2634
2635 /* By now, the only difference should be the order of the stack,
2636 not their depth or liveliness. */
2637
2638 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2639 gcc_assert (old->top == new_stack->top);
2640
2641 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2642 swaps until the stack is correct.
2643
2644 The worst case number of swaps emitted is N + 2, where N is the
2645 depth of the stack. In some cases, the reg at the top of
2646 stack may be correct, but swapped anyway in order to fix
2647 other regs. But since we never swap any other reg away from
2648 its correct slot, this algorithm will converge. */
2649
2650 if (new_stack->top != -1)
2651 do
2652 {
2653 /* Swap the reg at top of stack into the position it is
2654 supposed to be in, until the correct top of stack appears. */
2655
2656 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2657 {
2658 for (reg = new_stack->top; reg >= 0; reg--)
2659 if (new_stack->reg[reg] == old->reg[old->top])
2660 break;
2661
2662 gcc_assert (reg != -1);
2663
2664 emit_swap_insn (insn, old,
2665 FP_MODE_REG (old->reg[reg], DFmode));
2666 }
2667
2668 /* See if any regs remain incorrect. If so, bring an
2669 incorrect reg to the top of stack, and let the while loop
2670 above fix it. */
2671
2672 for (reg = new_stack->top; reg >= 0; reg--)
2673 if (new_stack->reg[reg] != old->reg[reg])
2674 {
2675 emit_swap_insn (insn, old,
2676 FP_MODE_REG (old->reg[reg], DFmode));
2677 break;
2678 }
2679 } while (reg >= 0);
2680
2681 /* At this point there must be no differences. */
2682
2683 for (reg = old->top; reg >= 0; reg--)
2684 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2685 }
2686
2687 if (update_end)
2688 BB_END (current_block) = PREV_INSN (insn);
2689}
2690
2691/* Print stack configuration. */
2692
2693static void
2694print_stack (FILE *file, stack_ptr s)
2695{
2696 if (! file)
2697 return;
2698
2699 if (s->top == -2)
2700 fprintf (file, "uninitialized\n");
2701 else if (s->top == -1)
2702 fprintf (file, "empty\n");
2703 else
2704 {
2705 int i;
2706 fputs ("[ ", file);
2707 for (i = 0; i <= s->top; ++i)
2708 fprintf (file, "%d ", s->reg[i]);
2709 fputs ("]\n", file);
2710 }
2711}
2712
2713/* This function was doing life analysis. We now let the regular live
2714 code do it's job, so we only need to check some extra invariants
2715 that reg-stack expects. Primary among these being that all registers
2716 are initialized before use.
2717
2718 The function returns true when code was emitted to CFG edges and
2719 commit_edge_insertions needs to be called. */
2720
2721static int
2722convert_regs_entry (void)
2723{
2724 int inserted = 0;
2725 edge e;
2726 edge_iterator ei;
2727
2728 /* Load something into each stack register live at function entry.
2729 Such live registers can be caused by uninitialized variables or
2730 functions not returning values on all paths. In order to keep
2731 the push/pop code happy, and to not scrog the register stack, we
2732 must put something in these registers. Use a QNaN.
2733
2734 Note that we are inserting converted code here. This code is
2735 never seen by the convert_regs pass. */
2736
2737 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
2738 {
2739 basic_block block = e->dest;
2740 block_info bi = BLOCK_INFO (block);
2741 int reg, top = -1;
2742
2743 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2744 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2745 {
2746 rtx init;
2747
2748 bi->stack_in.reg[++top] = reg;
2749
2750 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode),
2751 not_a_num);
2752 insert_insn_on_edge (init, e);
2753 inserted = 1;
2754 }
2755
2756 bi->stack_in.top = top;
2757 }
2758
2759 return inserted;
2760}
2761
2762/* Construct the desired stack for function exit. This will either
2763 be `empty', or the function return value at top-of-stack. */
2764
2765static void
2766convert_regs_exit (void)
2767{
2768 int value_reg_low, value_reg_high;
2769 stack_ptr output_stack;
2770 rtx retvalue;
2771
2772 retvalue = stack_result (current_function_decl);
2773 value_reg_low = value_reg_high = -1;
2774 if (retvalue)
2775 {
2776 value_reg_low = REGNO (retvalue);
2777 value_reg_high = END_REGNO (retvalue) - 1;
2778 }
2779
2780 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in;
2781 if (value_reg_low == -1)
2782 output_stack->top = -1;
2783 else
2784 {
2785 int reg;
2786
2787 output_stack->top = value_reg_high - value_reg_low;
2788 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2789 {
2790 output_stack->reg[value_reg_high - reg] = reg;
2791 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2792 }
2793 }
2794}
2795
2796/* Copy the stack info from the end of edge E's source block to the
2797 start of E's destination block. */
2798
2799static void
2800propagate_stack (edge e)
2801{
2802 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2803 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2804 int reg;
2805
2806 /* Preserve the order of the original stack, but check whether
2807 any pops are needed. */
2808 dest_stack->top = -1;
2809 for (reg = 0; reg <= src_stack->top; ++reg)
2810 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2811 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2812
2813 /* Push in any partially dead values. */
2814 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2815 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2816 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2817 dest_stack->reg[++dest_stack->top] = reg;
2818}
2819
2820
2821/* Adjust the stack of edge E's source block on exit to match the stack
2822 of it's target block upon input. The stack layouts of both blocks
2823 should have been defined by now. */
2824
2825static bool
2826compensate_edge (edge e)
2827{
2828 basic_block source = e->src, target = e->dest;
2829 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2830 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2831 struct stack_def regstack;
2832 int reg;
2833
2834 if (dump_file)
2835 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2836
2837 gcc_assert (target_stack->top != -2);
2838
2839 /* Check whether stacks are identical. */
2840 if (target_stack->top == source_stack->top)
2841 {
2842 for (reg = target_stack->top; reg >= 0; --reg)
2843 if (target_stack->reg[reg] != source_stack->reg[reg])
2844 break;
2845
2846 if (reg == -1)
2847 {
2848 if (dump_file)
2849 fprintf (dump_file, "no changes needed\n");
2850 return false;
2851 }
2852 }
2853
2854 if (dump_file)
2855 {
2856 fprintf (dump_file, "correcting stack to ");
2857 print_stack (dump_file, target_stack);
2858 }
2859
2860 /* Abnormal calls may appear to have values live in st(0), but the
2861 abnormal return path will not have actually loaded the values. */
2862 if (e->flags & EDGE_ABNORMAL_CALL)
2863 {
2864 /* Assert that the lifetimes are as we expect -- one value
2865 live at st(0) on the end of the source block, and no
2866 values live at the beginning of the destination block.
2867 For complex return values, we may have st(1) live as well. */
2868 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2869 gcc_assert (target_stack->top == -1);
2870 return false;
2871 }
2872
2873 /* Handle non-call EH edges specially. The normal return path have
2874 values in registers. These will be popped en masse by the unwind
2875 library. */
2876 if (e->flags & EDGE_EH)
2877 {
2878 gcc_assert (target_stack->top == -1);
2879 return false;
2880 }
2881
2882 /* We don't support abnormal edges. Global takes care to
2883 avoid any live register across them, so we should never
2884 have to insert instructions on such edges. */
2885 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2886
2887 /* Make a copy of source_stack as change_stack is destructive. */
2888 regstack = *source_stack;
2889
2890 /* It is better to output directly to the end of the block
2891 instead of to the edge, because emit_swap can do minimal
2892 insn scheduling. We can do this when there is only one
2893 edge out, and it is not abnormal. */
2894 if (EDGE_COUNT (source->succs) == 1)
2895 {
2896 current_block = source;
2897 change_stack (BB_END (source), &regstack, target_stack,
2898 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2899 }
2900 else
2901 {
2902 rtx_insn *seq;
2903 rtx_note *after;
2904
2905 current_block = NULL;
2906 start_sequence ();
2907
2908 /* ??? change_stack needs some point to emit insns after. */
2909 after = emit_note (NOTE_INSN_DELETED);
2910
2911 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2912
2913 seq = get_insns ();
2914 end_sequence ();
2915
2916 insert_insn_on_edge (seq, e);
2917 return true;
2918 }
2919 return false;
2920}
2921
2922/* Traverse all non-entry edges in the CFG, and emit the necessary
2923 edge compensation code to change the stack from stack_out of the
2924 source block to the stack_in of the destination block. */
2925
2926static bool
2927compensate_edges (void)
2928{
2929 bool inserted = false;
2930 basic_block bb;
2931
2932 starting_stack_p = false;
2933
2934 FOR_EACH_BB_FN (bb, cfun)
2935 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun))
2936 {
2937 edge e;
2938 edge_iterator ei;
2939
2940 FOR_EACH_EDGE (e, ei, bb->succs)
2941 inserted |= compensate_edge (e);
2942 }
2943 return inserted;
2944}
2945
2946/* Select the better of two edges E1 and E2 to use to determine the
2947 stack layout for their shared destination basic block. This is
2948 typically the more frequently executed. The edge E1 may be NULL
2949 (in which case E2 is returned), but E2 is always non-NULL. */
2950
2951static edge
2952better_edge (edge e1, edge e2)
2953{
2954 if (!e1)
2955 return e2;
2956
2957 if (e1->count () > e2->count ())
2958 return e1;
2959 if (e1->count () < e2->count ())
2960 return e2;
2961
2962 /* Prefer critical edges to minimize inserting compensation code on
2963 critical edges. */
2964
2965 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2966 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2967
2968 /* Avoid non-deterministic behavior. */
2969 return (e1->src->index < e2->src->index) ? e1 : e2;
2970}
2971
2972/* Convert stack register references in one block. Return true if the CFG
2973 has been modified in the process. */
2974
2975static bool
2976convert_regs_1 (basic_block block)
2977{
2978 struct stack_def regstack;
2979 block_info bi = BLOCK_INFO (block);
2980 int reg;
2981 rtx_insn *insn, *next;
2982 bool control_flow_insn_deleted = false;
2983 bool cfg_altered = false;
2984 int debug_insns_with_starting_stack = 0;
2985
2986 any_malformed_asm = false;
2987
2988 /* Choose an initial stack layout, if one hasn't already been chosen. */
2989 if (bi->stack_in.top == -2)
2990 {
2991 edge e, beste = NULL;
2992 edge_iterator ei;
2993
2994 /* Select the best incoming edge (typically the most frequent) to
2995 use as a template for this basic block. */
2996 FOR_EACH_EDGE (e, ei, block->preds)
2997 if (BLOCK_INFO (e->src)->done)
2998 beste = better_edge (beste, e);
2999
3000 if (beste)
3001 propagate_stack (beste);
3002 else
3003 {
3004 /* No predecessors. Create an arbitrary input stack. */
3005 bi->stack_in.top = -1;
3006 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
3007 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
3008 bi->stack_in.reg[++bi->stack_in.top] = reg;
3009 }
3010 }
3011
3012 if (dump_file)
3013 {
3014 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
3015 print_stack (dump_file, &bi->stack_in);
3016 }
3017
3018 /* Process all insns in this block. Keep track of NEXT so that we
3019 don't process insns emitted while substituting in INSN. */
3020 current_block = block;
3021 next = BB_HEAD (block);
3022 regstack = bi->stack_in;
3023 starting_stack_p = true;
3024
3025 do
3026 {
3027 insn = next;
3028 next = NEXT_INSN (insn);
3029
3030 /* Ensure we have not missed a block boundary. */
3031 gcc_assert (next);
3032 if (insn == BB_END (block))
3033 next = NULL;
3034
3035 /* Don't bother processing unless there is a stack reg
3036 mentioned or if it's a CALL_INSN. */
3037 if (DEBUG_BIND_INSN_P (insn))
3038 {
3039 if (starting_stack_p)
3040 debug_insns_with_starting_stack++;
3041 else
3042 {
3043 subst_all_stack_regs_in_debug_insn (insn, &regstack);
3044
3045 /* Nothing must ever die at a debug insn. If something
3046 is referenced in it that becomes dead, it should have
3047 died before and the reference in the debug insn
3048 should have been removed so as to avoid changing code
3049 generation. */
3050 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
3051 }
3052 }
3053 else if (stack_regs_mentioned (insn)
3054 || CALL_P (insn))
3055 {
3056 if (dump_file)
3057 {
3058 fprintf (dump_file, " insn %d input stack: ",
3059 INSN_UID (insn));
3060 print_stack (dump_file, &regstack);
3061 }
3062 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
3063 starting_stack_p = false;
3064 }
3065 }
3066 while (next);
3067
3068 if (debug_insns_with_starting_stack)
3069 {
3070 /* Since it's the first non-debug instruction that determines
3071 the stack requirements of the current basic block, we refrain
3072 from updating debug insns before it in the loop above, and
3073 fix them up here. */
3074 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
3075 insn = NEXT_INSN (insn))
3076 {
3077 if (!DEBUG_BIND_INSN_P (insn))
3078 continue;
3079
3080 debug_insns_with_starting_stack--;
3081 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
3082 }
3083 }
3084
3085 if (dump_file)
3086 {
3087 fprintf (dump_file, "Expected live registers [");
3088 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3089 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
3090 fprintf (dump_file, " %d", reg);
3091 fprintf (dump_file, " ]\nOutput stack: ");
3092 print_stack (dump_file, &regstack);
3093 }
3094
3095 insn = BB_END (block);
3096 if (JUMP_P (insn))
3097 insn = PREV_INSN (insn);
3098
3099 /* If the function is declared to return a value, but it returns one
3100 in only some cases, some registers might come live here. Emit
3101 necessary moves for them. */
3102
3103 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3104 {
3105 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3106 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3107 {
3108 rtx set;
3109
3110 if (dump_file)
3111 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3112
3113 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num);
3114 insn = emit_insn_after (set, insn);
3115 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
3116 }
3117 }
3118
3119 /* Amongst the insns possibly deleted during the substitution process above,
3120 might have been the only trapping insn in the block. We purge the now
3121 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3122 called at the end of convert_regs. The order in which we process the
3123 blocks ensures that we never delete an already processed edge.
3124
3125 Note that, at this point, the CFG may have been damaged by the emission
3126 of instructions after an abnormal call, which moves the basic block end
3127 (and is the reason why we call fixup_abnormal_edges later). So we must
3128 be sure that the trapping insn has been deleted before trying to purge
3129 dead edges, otherwise we risk purging valid edges.
3130
3131 ??? We are normally supposed not to delete trapping insns, so we pretend
3132 that the insns deleted above don't actually trap. It would have been
3133 better to detect this earlier and avoid creating the EH edge in the first
3134 place, still, but we don't have enough information at that time. */
3135
3136 if (control_flow_insn_deleted)
3137 cfg_altered |= purge_dead_edges (block);
3138
3139 /* Something failed if the stack lives don't match. If we had malformed
3140 asms, we zapped the instruction itself, but that didn't produce the
3141 same pattern of register kills as before. */
3142
3143 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3144 || any_malformed_asm);
3145 bi->stack_out = regstack;
3146 bi->done = true;
3147
3148 return cfg_altered;
3149}
3150
3151/* Convert registers in all blocks reachable from BLOCK. Return true if the
3152 CFG has been modified in the process. */
3153
3154static bool
3155convert_regs_2 (basic_block block)
3156{
3157 basic_block *stack, *sp;
3158 bool cfg_altered = false;
3159
3160 /* We process the blocks in a top-down manner, in a way such that one block
3161 is only processed after all its predecessors. The number of predecessors
3162 of every block has already been computed. */
3163
3164 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun));
3165 sp = stack;
3166
3167 *sp++ = block;
3168
3169 do
3170 {
3171 edge e;
3172 edge_iterator ei;
3173
3174 block = *--sp;
3175
3176 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3177 some dead EH outgoing edge after the deletion of the trapping
3178 insn inside the block. Since the number of predecessors of
3179 BLOCK's successors was computed based on the initial edge set,
3180 we check the necessity to process some of these successors
3181 before such an edge deletion may happen. However, there is
3182 a pitfall: if BLOCK is the only predecessor of a successor and
3183 the edge between them happens to be deleted, the successor
3184 becomes unreachable and should not be processed. The problem
3185 is that there is no way to preventively detect this case so we
3186 stack the successor in all cases and hand over the task of
3187 fixing up the discrepancy to convert_regs_1. */
3188
3189 FOR_EACH_EDGE (e, ei, block->succs)
3190 if (! (e->flags & EDGE_DFS_BACK))
3191 {
3192 BLOCK_INFO (e->dest)->predecessors--;
3193 if (!BLOCK_INFO (e->dest)->predecessors)
3194 *sp++ = e->dest;
3195 }
3196
3197 cfg_altered |= convert_regs_1 (block);
3198 }
3199 while (sp != stack);
3200
3201 free (stack);
3202
3203 return cfg_altered;
3204}
3205
3206/* Traverse all basic blocks in a function, converting the register
3207 references in each insn from the "flat" register file that gcc uses,
3208 to the stack-like registers the 387 uses. */
3209
3210static void
3211convert_regs (void)
3212{
3213 bool cfg_altered = false;
3214 int inserted;
3215 basic_block b;
3216 edge e;
3217 edge_iterator ei;
3218
3219 /* Initialize uninitialized registers on function entry. */
3220 inserted = convert_regs_entry ();
3221
3222 /* Construct the desired stack for function exit. */
3223 convert_regs_exit ();
3224 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1;
3225
3226 /* ??? Future: process inner loops first, and give them arbitrary
3227 initial stacks which emit_swap_insn can modify. This ought to
3228 prevent double fxch that often appears at the head of a loop. */
3229
3230 /* Process all blocks reachable from all entry points. */
3231 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
3232 cfg_altered |= convert_regs_2 (e->dest);
3233
3234 /* ??? Process all unreachable blocks. Though there's no excuse
3235 for keeping these even when not optimizing. */
3236 FOR_EACH_BB_FN (b, cfun)
3237 {
3238 block_info bi = BLOCK_INFO (b);
3239
3240 if (! bi->done)
3241 cfg_altered |= convert_regs_2 (b);
3242 }
3243
3244 /* We must fix up abnormal edges before inserting compensation code
3245 because both mechanisms insert insns on edges. */
3246 inserted |= fixup_abnormal_edges ();
3247
3248 inserted |= compensate_edges ();
3249
3250 clear_aux_for_blocks ();
3251
3252 if (inserted)
3253 commit_edge_insertions ();
3254
3255 if (cfg_altered)
3256 cleanup_cfg (0);
3257
3258 if (dump_file)
3259 fputc ('\n', dump_file);
3260}
3261
3262/* Convert register usage from "flat" register file usage to a "stack
3263 register file. FILE is the dump file, if used.
3264
3265 Construct a CFG and run life analysis. Then convert each insn one
3266 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3267 code duplication created when the converter inserts pop insns on
3268 the edges. */
3269
3270static bool
3271reg_to_stack (void)
3272{
3273 basic_block bb;
3274 int i;
3275 int max_uid;
3276
3277 /* Clean up previous run. */
3278 stack_regs_mentioned_data.release ();
3279
3280 /* See if there is something to do. Flow analysis is quite
3281 expensive so we might save some compilation time. */
3282 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3283 if (df_regs_ever_live_p (i))
3284 break;
3285 if (i > LAST_STACK_REG)
3286 return false;
3287
3288 df_note_add_problem ();
3289 df_analyze ();
3290
3291 mark_dfs_back_edges ();
3292
3293 /* Set up block info for each basic block. */
3294 alloc_aux_for_blocks (sizeof (struct block_info_def));
3295 FOR_EACH_BB_FN (bb, cfun)
3296 {
3297 block_info bi = BLOCK_INFO (bb);
3298 edge_iterator ei;
3299 edge e;
3300 int reg;
3301
3302 FOR_EACH_EDGE (e, ei, bb->preds)
3303 if (!(e->flags & EDGE_DFS_BACK)
3304 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun))
3305 bi->predecessors++;
3306
3307 /* Set current register status at last instruction `uninitialized'. */
3308 bi->stack_in.top = -2;
3309
3310 /* Copy live_at_end and live_at_start into temporaries. */
3311 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3312 {
3313 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3314 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3315 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3316 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3317 }
3318 }
3319
3320 /* Create the replacement registers up front. */
3321 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3322 {
3323 machine_mode mode;
3324 FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
3325 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3326 FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT)
3327 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3328 }
3329
3330 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3331
3332 /* A QNaN for initializing uninitialized variables.
3333
3334 ??? We can't load from constant memory in PIC mode, because
3335 we're inserting these instructions before the prologue and
3336 the PIC register hasn't been set up. In that case, fall back
3337 on zero, which we can get from `fldz'. */
3338
3339 if ((flag_pic && !TARGET_64BIT)
3340 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3341 not_a_num = CONST0_RTX (SFmode);
3342 else
3343 {
3344 REAL_VALUE_TYPE r;
3345
3346 real_nan (&r, "", 1, SFmode);
3347 not_a_num = const_double_from_real_value (r, SFmode);
3348 not_a_num = force_const_mem (SFmode, not_a_num);
3349 }
3350
3351 /* Allocate a cache for stack_regs_mentioned. */
3352 max_uid = get_max_uid ();
3353 stack_regs_mentioned_data.create (max_uid + 1);
3354 memset (stack_regs_mentioned_data.address (),
3355 0, sizeof (char) * (max_uid + 1));
3356
3357 convert_regs ();
3358
3359 free_aux_for_blocks ();
3360 return true;
3361}
3362#endif /* STACK_REGS */
3363
3364namespace {
3365
3366const pass_data pass_data_stack_regs =
3367{
3368 RTL_PASS, /* type */
3369 "*stack_regs", /* name */
3370 OPTGROUP_NONE, /* optinfo_flags */
3371 TV_REG_STACK, /* tv_id */
3372 0, /* properties_required */
3373 0, /* properties_provided */
3374 0, /* properties_destroyed */
3375 0, /* todo_flags_start */
3376 0, /* todo_flags_finish */
3377};
3378
3379class pass_stack_regs : public rtl_opt_pass
3380{
3381public:
3382 pass_stack_regs (gcc::context *ctxt)
3383 : rtl_opt_pass (pass_data_stack_regs, ctxt)
3384 {}
3385
3386 /* opt_pass methods: */
3387 virtual bool gate (function *)
3388 {
3389#ifdef STACK_REGS
3390 return true;
3391#else
3392 return false;
3393#endif
3394 }
3395
3396}; // class pass_stack_regs
3397
3398} // anon namespace
3399
3400rtl_opt_pass *
3401make_pass_stack_regs (gcc::context *ctxt)
3402{
3403 return new pass_stack_regs (ctxt);
3404}
3405
3406/* Convert register usage from flat register file usage to a stack
3407 register file. */
3408static unsigned int
3409rest_of_handle_stack_regs (void)
3410{
3411#ifdef STACK_REGS
3412 reg_to_stack ();
3413 regstack_completed = 1;
3414#endif
3415 return 0;
3416}
3417
3418namespace {
3419
3420const pass_data pass_data_stack_regs_run =
3421{
3422 RTL_PASS, /* type */
3423 "stack", /* name */
3424 OPTGROUP_NONE, /* optinfo_flags */
3425 TV_REG_STACK, /* tv_id */
3426 0, /* properties_required */
3427 0, /* properties_provided */
3428 0, /* properties_destroyed */
3429 0, /* todo_flags_start */
3430 TODO_df_finish, /* todo_flags_finish */
3431};
3432
3433class pass_stack_regs_run : public rtl_opt_pass
3434{
3435public:
3436 pass_stack_regs_run (gcc::context *ctxt)
3437 : rtl_opt_pass (pass_data_stack_regs_run, ctxt)
3438 {}
3439
3440 /* opt_pass methods: */
3441 virtual unsigned int execute (function *)
3442 {
3443 return rest_of_handle_stack_regs ();
3444 }
3445
3446}; // class pass_stack_regs_run
3447
3448} // anon namespace
3449
3450rtl_opt_pass *
3451make_pass_stack_regs_run (gcc::context *ctxt)
3452{
3453 return new pass_stack_regs_run (ctxt);
3454}
3455