1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * linux/arch/arm/mach-omap2/clock.h
4 *
5 * Copyright (C) 2005-2009 Texas Instruments, Inc.
6 * Copyright (C) 2004-2011 Nokia Corporation
7 *
8 * Contacts:
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Paul Walmsley
11 */
12
13#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
14#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
15
16#include <linux/kernel.h>
17#include <linux/list.h>
18
19#include <linux/clkdev.h>
20#include <linux/clk-provider.h>
21#include <linux/clk/ti.h>
22
23/* struct clksel_rate.flags possibilities */
24#define RATE_IN_242X (1 << 0)
25#define RATE_IN_243X (1 << 1)
26#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
27#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
28#define RATE_IN_36XX (1 << 4)
29#define RATE_IN_4430 (1 << 5)
30#define RATE_IN_TI816X (1 << 6)
31#define RATE_IN_4460 (1 << 7)
32#define RATE_IN_AM33XX (1 << 8)
33#define RATE_IN_TI814X (1 << 9)
34
35#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
36#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
37#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
38#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
39
40/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
41#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
42
43/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
44#define CORE_CLK_SRC_32K 0x0
45#define CORE_CLK_SRC_DPLL 0x1
46#define CORE_CLK_SRC_DPLL_X2 0x2
47
48/* OMAP2xxx CM_CLKEN_PLL.EN_DPLL bits - for omap2_get_dpll_rate() */
49#define OMAP2XXX_EN_DPLL_LPBYPASS 0x1
50#define OMAP2XXX_EN_DPLL_FRBYPASS 0x2
51#define OMAP2XXX_EN_DPLL_LOCKED 0x3
52
53/* OMAP3xxx CM_CLKEN_PLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
54#define OMAP3XXX_EN_DPLL_LPBYPASS 0x5
55#define OMAP3XXX_EN_DPLL_FRBYPASS 0x6
56#define OMAP3XXX_EN_DPLL_LOCKED 0x7
57
58/* OMAP4xxx CM_CLKMODE_DPLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
59#define OMAP4XXX_EN_DPLL_MNBYPASS 0x4
60#define OMAP4XXX_EN_DPLL_LPBYPASS 0x5
61#define OMAP4XXX_EN_DPLL_FRBYPASS 0x6
62#define OMAP4XXX_EN_DPLL_LOCKED 0x7
63
64extern struct ti_clk_ll_ops omap_clk_ll_ops;
65
66int __init omap2_clk_setup_ll_ops(void);
67
68void __init ti_clk_init_features(void);
69#endif
70

source code of linux/arch/arm/mach-omap2/clock.h