1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * OMAP2420 clockdomains |
4 | * |
5 | * Copyright (C) 2008-2011 Texas Instruments, Inc. |
6 | * Copyright (C) 2008-2010 Nokia Corporation |
7 | * |
8 | * Paul Walmsley, Jouni Högander |
9 | * |
10 | * This file contains clockdomains and clockdomain wakeup dependencies |
11 | * for OMAP2420 chips. Some notes: |
12 | * |
13 | * A useful validation rule for struct clockdomain: Any clockdomain |
14 | * referenced by a wkdep_srcs must have a dep_bit assigned. So |
15 | * wkdep_srcs are really just software-controllable dependencies. |
16 | * Non-software-controllable dependencies do exist, but they are not |
17 | * encoded below (yet). |
18 | * |
19 | * 24xx does not support programmable sleep dependencies (SLEEPDEP) |
20 | * |
21 | * The overly-specific dep_bit names are due to a bit name collision |
22 | * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift |
23 | * value are the same for all powerdomains: 2 |
24 | * |
25 | * XXX should dep_bit be a mask, so we can test to see if it is 0 as a |
26 | * sanity check? |
27 | * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE |
28 | */ |
29 | |
30 | /* |
31 | * To-Do List |
32 | * -> Port the Sleep/Wakeup dependencies for the domains |
33 | * from the Power domain framework |
34 | */ |
35 | |
36 | #include <linux/kernel.h> |
37 | #include <linux/io.h> |
38 | |
39 | #include "soc.h" |
40 | #include "clockdomain.h" |
41 | #include "prm2xxx_3xxx.h" |
42 | #include "cm2xxx_3xxx.h" |
43 | #include "cm-regbits-24xx.h" |
44 | #include "prm-regbits-24xx.h" |
45 | |
46 | /* |
47 | * Clockdomain dependencies for wkdeps |
48 | * |
49 | * XXX Hardware dependencies (e.g., dependencies that cannot be |
50 | * changed in software) are not included here yet, but should be. |
51 | */ |
52 | |
53 | /* Wakeup dependency source arrays */ |
54 | |
55 | /* 2420-specific possible wakeup dependencies */ |
56 | |
57 | /* 2420 PM_WKDEP_MPU: CORE, DSP, WKUP */ |
58 | static struct clkdm_dep mpu_2420_wkdeps[] = { |
59 | { .clkdm_name = "core_l3_clkdm" }, |
60 | { .clkdm_name = "core_l4_clkdm" }, |
61 | { .clkdm_name = "dsp_clkdm" }, |
62 | { .clkdm_name = "wkup_clkdm" }, |
63 | { NULL }, |
64 | }; |
65 | |
66 | /* 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP */ |
67 | static struct clkdm_dep core_2420_wkdeps[] = { |
68 | { .clkdm_name = "dsp_clkdm" }, |
69 | { .clkdm_name = "gfx_clkdm" }, |
70 | { .clkdm_name = "mpu_clkdm" }, |
71 | { .clkdm_name = "wkup_clkdm" }, |
72 | { NULL }, |
73 | }; |
74 | |
75 | /* |
76 | * 2420-only clockdomains |
77 | */ |
78 | |
79 | static struct clockdomain mpu_2420_clkdm = { |
80 | .name = "mpu_clkdm" , |
81 | .pwrdm = { .name = "mpu_pwrdm" }, |
82 | .flags = CLKDM_CAN_HWSUP, |
83 | .wkdep_srcs = mpu_2420_wkdeps, |
84 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, |
85 | }; |
86 | |
87 | static struct clockdomain iva1_2420_clkdm = { |
88 | .name = "iva1_clkdm" , |
89 | .pwrdm = { .name = "dsp_pwrdm" }, |
90 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
91 | .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, |
92 | .wkdep_srcs = dsp_24xx_wkdeps, |
93 | .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, |
94 | }; |
95 | |
96 | static struct clockdomain dsp_2420_clkdm = { |
97 | .name = "dsp_clkdm" , |
98 | .pwrdm = { .name = "dsp_pwrdm" }, |
99 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
100 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, |
101 | }; |
102 | |
103 | static struct clockdomain gfx_2420_clkdm = { |
104 | .name = "gfx_clkdm" , |
105 | .pwrdm = { .name = "gfx_pwrdm" }, |
106 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
107 | .wkdep_srcs = gfx_24xx_wkdeps, |
108 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, |
109 | }; |
110 | |
111 | static struct clockdomain core_l3_2420_clkdm = { |
112 | .name = "core_l3_clkdm" , |
113 | .pwrdm = { .name = "core_pwrdm" }, |
114 | .flags = CLKDM_CAN_HWSUP, |
115 | .wkdep_srcs = core_2420_wkdeps, |
116 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, |
117 | }; |
118 | |
119 | static struct clockdomain core_l4_2420_clkdm = { |
120 | .name = "core_l4_clkdm" , |
121 | .pwrdm = { .name = "core_pwrdm" }, |
122 | .flags = CLKDM_CAN_HWSUP, |
123 | .wkdep_srcs = core_2420_wkdeps, |
124 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, |
125 | }; |
126 | |
127 | static struct clockdomain dss_2420_clkdm = { |
128 | .name = "dss_clkdm" , |
129 | .pwrdm = { .name = "core_pwrdm" }, |
130 | .flags = CLKDM_CAN_HWSUP, |
131 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, |
132 | }; |
133 | |
134 | static struct clockdomain *clockdomains_omap242x[] __initdata = { |
135 | &wkup_common_clkdm, |
136 | &mpu_2420_clkdm, |
137 | &iva1_2420_clkdm, |
138 | &dsp_2420_clkdm, |
139 | &gfx_2420_clkdm, |
140 | &core_l3_2420_clkdm, |
141 | &core_l4_2420_clkdm, |
142 | &dss_2420_clkdm, |
143 | NULL, |
144 | }; |
145 | |
146 | void __init omap242x_clockdomains_init(void) |
147 | { |
148 | if (!cpu_is_omap242x()) |
149 | return; |
150 | |
151 | clkdm_register_platform_funcs(co: &omap2_clkdm_operations); |
152 | clkdm_register_clkdms(c: clockdomains_omap242x); |
153 | clkdm_complete_init(); |
154 | } |
155 | |