| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * OMAP44xx Clock Management register bits |
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| 4 | * |
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| 5 | * Copyright (C) 2009-2012 Texas Instruments, Inc. |
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| 6 | * Copyright (C) 2009-2010 Nokia Corporation |
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| 7 | * |
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| 8 | * Paul Walmsley (paul@pwsan.com) |
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| 9 | * Rajendra Nayak (rnayak@ti.com) |
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| 10 | * Benoit Cousson (b-cousson@ti.com) |
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| 11 | * |
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| 12 | * This file is automatically generated from the OMAP hardware databases. |
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| 13 | * We respectfully ask that any modifications to this file be coordinated |
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| 14 | * with the public linux-omap@vger.kernel.org mailing list and the |
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| 15 | * authors above to ensure that the autogeneration scripts are kept |
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| 16 | * up-to-date with the file contents. |
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| 17 | */ |
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| 18 | |
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| 19 | #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H |
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| 20 | #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H |
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| 21 | |
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| 22 | #define OMAP4430_ABE_STATDEP_SHIFT 3 |
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| 23 | #define OMAP4430_CLKTRCTRL_SHIFT 0 |
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| 24 | #define OMAP4430_CLKTRCTRL_MASK (0x3 << 0) |
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| 25 | #define OMAP4430_DSS_STATDEP_SHIFT 8 |
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| 26 | #define OMAP4430_DUCATI_STATDEP_SHIFT 0 |
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| 27 | #define OMAP4430_GFX_STATDEP_SHIFT 10 |
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| 28 | #define OMAP4430_IDLEST_SHIFT 16 |
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| 29 | #define OMAP4430_IDLEST_MASK (0x3 << 16) |
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| 30 | #define OMAP4430_IVAHD_STATDEP_SHIFT 2 |
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| 31 | #define OMAP4430_L3INIT_STATDEP_SHIFT 7 |
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| 32 | #define OMAP4430_L3_1_STATDEP_SHIFT 5 |
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| 33 | #define OMAP4430_L3_2_STATDEP_SHIFT 6 |
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| 34 | #define OMAP4430_L4CFG_STATDEP_SHIFT 12 |
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| 35 | #define OMAP4430_L4PER_STATDEP_SHIFT 13 |
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| 36 | #define OMAP4430_L4SEC_STATDEP_SHIFT 14 |
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| 37 | #define OMAP4430_L4WKUP_STATDEP_SHIFT 15 |
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| 38 | #define OMAP4430_MEMIF_STATDEP_SHIFT 4 |
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| 39 | #define OMAP4430_MODULEMODE_SHIFT 0 |
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| 40 | #define OMAP4430_MODULEMODE_MASK (0x3 << 0) |
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| 41 | #define OMAP4430_TESLA_STATDEP_SHIFT 1 |
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| 42 | #endif |
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| 43 | |
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