1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * OMAP3 OPP table definitions. |
4 | * |
5 | * Copyright (C) 2009-2010 Texas Instruments Incorporated - https://www.ti.com/ |
6 | * Nishanth Menon |
7 | * Kevin Hilman |
8 | * Copyright (C) 2010-2011 Nokia Corporation. |
9 | * Eduardo Valentin |
10 | * Paul Walmsley |
11 | */ |
12 | #include <linux/module.h> |
13 | |
14 | #include "soc.h" |
15 | #include "control.h" |
16 | #include "omap_opp_data.h" |
17 | #include "pm.h" |
18 | |
19 | /* 34xx */ |
20 | |
21 | /* VDD1 */ |
22 | |
23 | #define OMAP3430_VDD_MPU_OPP1_UV 975000 |
24 | #define OMAP3430_VDD_MPU_OPP2_UV 1075000 |
25 | #define OMAP3430_VDD_MPU_OPP3_UV 1200000 |
26 | #define OMAP3430_VDD_MPU_OPP4_UV 1270000 |
27 | #define OMAP3430_VDD_MPU_OPP5_UV 1350000 |
28 | |
29 | struct omap_volt_data omap34xx_vddmpu_volt_data[] = { |
30 | VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c), |
31 | VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c), |
32 | VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18), |
33 | VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18), |
34 | VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18), |
35 | VOLT_DATA_DEFINE(0, 0, 0, 0), |
36 | }; |
37 | |
38 | /* VDD2 */ |
39 | |
40 | #define OMAP3430_VDD_CORE_OPP1_UV 975000 |
41 | #define OMAP3430_VDD_CORE_OPP2_UV 1050000 |
42 | #define OMAP3430_VDD_CORE_OPP3_UV 1150000 |
43 | |
44 | struct omap_volt_data omap34xx_vddcore_volt_data[] = { |
45 | VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c), |
46 | VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c), |
47 | VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18), |
48 | VOLT_DATA_DEFINE(0, 0, 0, 0), |
49 | }; |
50 | |
51 | /* 36xx */ |
52 | |
53 | /* VDD1 */ |
54 | |
55 | #define OMAP3630_VDD_MPU_OPP50_UV 1012500 |
56 | #define OMAP3630_VDD_MPU_OPP100_UV 1200000 |
57 | #define OMAP3630_VDD_MPU_OPP120_UV 1325000 |
58 | #define OMAP3630_VDD_MPU_OPP1G_UV 1375000 |
59 | |
60 | struct omap_volt_data omap36xx_vddmpu_volt_data[] = { |
61 | VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c), |
62 | VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16), |
63 | VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23), |
64 | VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27), |
65 | VOLT_DATA_DEFINE(0, 0, 0, 0), |
66 | }; |
67 | |
68 | /* VDD2 */ |
69 | |
70 | #define OMAP3630_VDD_CORE_OPP50_UV 1000000 |
71 | #define OMAP3630_VDD_CORE_OPP100_UV 1200000 |
72 | |
73 | struct omap_volt_data omap36xx_vddcore_volt_data[] = { |
74 | VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c), |
75 | VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16), |
76 | VOLT_DATA_DEFINE(0, 0, 0, 0), |
77 | }; |
78 | |