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| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|---|
| 2 | #ifndef __ASM_SH_PGTABLE_32_H |
| 3 | #define __ASM_SH_PGTABLE_32_H |
| 4 | |
| 5 | /* |
| 6 | * Linux PTEL encoding. |
| 7 | * |
| 8 | * Hardware and software bit definitions for the PTEL value (see below for |
| 9 | * notes on SH-X2 MMUs and 64-bit PTEs): |
| 10 | * |
| 11 | * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). |
| 12 | * |
| 13 | * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the |
| 14 | * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set, |
| 15 | * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT). |
| 16 | * |
| 17 | * In order to keep this relatively clean, do not use these for defining |
| 18 | * SH-3 specific flags until all of the other unused bits have been |
| 19 | * exhausted. |
| 20 | * |
| 21 | * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. |
| 22 | * |
| 23 | * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. |
| 24 | * Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL. |
| 25 | * |
| 26 | * - On 29 bit platforms, bits 31 to 29 are used for the space attributes |
| 27 | * and timing control which (together with bit 0) are moved into the |
| 28 | * old-style PTEA on the parts that support it. |
| 29 | * |
| 30 | * SH-X2 MMUs and extended PTEs |
| 31 | * |
| 32 | * SH-X2 supports an extended mode TLB with split data arrays due to the |
| 33 | * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and |
| 34 | * SZ bit placeholders still exist in data array 1, but are implemented as |
| 35 | * reserved bits, with the real logic existing in data array 2. |
| 36 | * |
| 37 | * The downside to this is that we can no longer fit everything in to a 32-bit |
| 38 | * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus |
| 39 | * side, this gives us quite a few spare bits to play with for future usage. |
| 40 | */ |
| 41 | /* Legacy and compat mode bits */ |
| 42 | #define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ |
| 43 | #define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ |
| 44 | #define _PAGE_DIRTY 0x004 /* D-bit : page changed */ |
| 45 | #define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ |
| 46 | #define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ |
| 47 | #define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ |
| 48 | #define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/ |
| 49 | #define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ |
| 50 | #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ |
| 51 | #define _PAGE_PROTNONE 0x200 /* software: if not present */ |
| 52 | #define _PAGE_ACCESSED 0x400 /* software: page referenced */ |
| 53 | #define _PAGE_SPECIAL 0x800 /* software: special page */ |
| 54 | |
| 55 | #define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) |
| 56 | #define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) |
| 57 | |
| 58 | /* Extended mode bits */ |
| 59 | #define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */ |
| 60 | #define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */ |
| 61 | #define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */ |
| 62 | #define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */ |
| 63 | |
| 64 | #define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */ |
| 65 | #define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */ |
| 66 | #define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */ |
| 67 | |
| 68 | #define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */ |
| 69 | #define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ |
| 70 | #define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ |
| 71 | |
| 72 | #define _PAGE_EXT_WIRED 0x4000 /* software: Wire TLB entry */ |
| 73 | |
| 74 | /* Wrapper for extended mode pgprot twiddling */ |
| 75 | #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) |
| 76 | |
| 77 | #ifdef CONFIG_X2TLB |
| 78 | #define _PAGE_PCC_MASK 0x00000000 /* No legacy PTEA support */ |
| 79 | #else |
| 80 | |
| 81 | /* software: moves to PTEA.TC (Timing Control) */ |
| 82 | #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ |
| 83 | #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ |
| 84 | |
| 85 | /* software: moves to PTEA.SA[2:0] (Space Attributes) */ |
| 86 | #define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */ |
| 87 | #define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */ |
| 88 | #define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */ |
| 89 | #define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */ |
| 90 | #define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */ |
| 91 | #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ |
| 92 | #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ |
| 93 | |
| 94 | #define _PAGE_PCC_MASK 0xe0000001 |
| 95 | |
| 96 | /* copy the ptea attributes */ |
| 97 | static inline unsigned long copy_ptea_attributes(unsigned long x) |
| 98 | { |
| 99 | return ((x >> 28) & 0xe) | (x & 0x1); |
| 100 | } |
| 101 | #endif |
| 102 | |
| 103 | /* Mask which drops unused bits from the PTEL value */ |
| 104 | #if defined(CONFIG_CPU_SH3) |
| 105 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ |
| 106 | _PAGE_SZ1 | _PAGE_HW_SHARED) |
| 107 | #elif defined(CONFIG_X2TLB) |
| 108 | /* Get rid of the legacy PR/SZ bits when using extended mode */ |
| 109 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \ |
| 110 | _PAGE_PR_MASK | _PAGE_SZ_MASK) |
| 111 | #else |
| 112 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED) |
| 113 | #endif |
| 114 | |
| 115 | #define _PAGE_FLAGS_HARDWARE_MASK (phys_addr_mask() & ~(_PAGE_CLEAR_FLAGS)) |
| 116 | |
| 117 | /* Hardware flags, page size encoding */ |
| 118 | #if !defined(CONFIG_MMU) |
| 119 | # define _PAGE_FLAGS_HARD 0ULL |
| 120 | #elif defined(CONFIG_X2TLB) |
| 121 | # if defined(CONFIG_PAGE_SIZE_4KB) |
| 122 | # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) |
| 123 | # elif defined(CONFIG_PAGE_SIZE_8KB) |
| 124 | # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1) |
| 125 | # elif defined(CONFIG_PAGE_SIZE_64KB) |
| 126 | # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2) |
| 127 | # endif |
| 128 | #else |
| 129 | # if defined(CONFIG_PAGE_SIZE_4KB) |
| 130 | # define _PAGE_FLAGS_HARD _PAGE_SZ0 |
| 131 | # elif defined(CONFIG_PAGE_SIZE_64KB) |
| 132 | # define _PAGE_FLAGS_HARD _PAGE_SZ1 |
| 133 | # endif |
| 134 | #endif |
| 135 | |
| 136 | #if defined(CONFIG_X2TLB) |
| 137 | # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) |
| 138 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2) |
| 139 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) |
| 140 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2) |
| 141 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) |
| 142 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2) |
| 143 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) |
| 144 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ3) |
| 145 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) |
| 146 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) |
| 147 | # endif |
| 148 | # define _PAGE_WIRED (_PAGE_EXT(_PAGE_EXT_WIRED)) |
| 149 | #else |
| 150 | # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) |
| 151 | # define _PAGE_SZHUGE (_PAGE_SZ1) |
| 152 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) |
| 153 | # define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) |
| 154 | # endif |
| 155 | # define _PAGE_WIRED (0) |
| 156 | #endif |
| 157 | |
| 158 | /* |
| 159 | * Stub out _PAGE_SZHUGE if we don't have a good definition for it, |
| 160 | * to make pte_mkhuge() happy. |
| 161 | */ |
| 162 | #ifndef _PAGE_SZHUGE |
| 163 | # define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) |
| 164 | #endif |
| 165 | |
| 166 | /* |
| 167 | * Mask of bits that are to be preserved across pgprot changes. |
| 168 | */ |
| 169 | #define _PAGE_CHG_MASK \ |
| 170 | (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ |
| 171 | _PAGE_DIRTY | _PAGE_SPECIAL) |
| 172 | |
| 173 | #ifndef __ASSEMBLY__ |
| 174 | |
| 175 | #if defined(CONFIG_X2TLB) /* SH-X2 TLB */ |
| 176 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ |
| 177 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) |
| 178 | |
| 179 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ |
| 180 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ |
| 181 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ |
| 182 | _PAGE_EXT_KERN_WRITE | \ |
| 183 | _PAGE_EXT_USER_READ | \ |
| 184 | _PAGE_EXT_USER_WRITE)) |
| 185 | |
| 186 | #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ |
| 187 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ |
| 188 | _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \ |
| 189 | _PAGE_EXT_KERN_READ | \ |
| 190 | _PAGE_EXT_USER_EXEC | \ |
| 191 | _PAGE_EXT_USER_READ)) |
| 192 | |
| 193 | #define PAGE_COPY PAGE_EXECREAD |
| 194 | |
| 195 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ |
| 196 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ |
| 197 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ |
| 198 | _PAGE_EXT_USER_READ)) |
| 199 | |
| 200 | #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ |
| 201 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ |
| 202 | _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ |
| 203 | _PAGE_EXT_USER_WRITE)) |
| 204 | |
| 205 | #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ |
| 206 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ |
| 207 | _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ |
| 208 | _PAGE_EXT_KERN_READ | \ |
| 209 | _PAGE_EXT_KERN_EXEC | \ |
| 210 | _PAGE_EXT_USER_WRITE | \ |
| 211 | _PAGE_EXT_USER_READ | \ |
| 212 | _PAGE_EXT_USER_EXEC)) |
| 213 | |
| 214 | #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ |
| 215 | _PAGE_DIRTY | _PAGE_ACCESSED | \ |
| 216 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ |
| 217 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ |
| 218 | _PAGE_EXT_KERN_WRITE | \ |
| 219 | _PAGE_EXT_KERN_EXEC)) |
| 220 | |
| 221 | #define PAGE_KERNEL_NOCACHE \ |
| 222 | __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ |
| 223 | _PAGE_ACCESSED | _PAGE_HW_SHARED | \ |
| 224 | _PAGE_FLAGS_HARD | \ |
| 225 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ |
| 226 | _PAGE_EXT_KERN_WRITE | \ |
| 227 | _PAGE_EXT_KERN_EXEC)) |
| 228 | |
| 229 | #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ |
| 230 | _PAGE_DIRTY | _PAGE_ACCESSED | \ |
| 231 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ |
| 232 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ |
| 233 | _PAGE_EXT_KERN_EXEC)) |
| 234 | |
| 235 | #define PAGE_KERNEL_PCC(slot, type) \ |
| 236 | __pgprot(0) |
| 237 | |
| 238 | #elif defined(CONFIG_MMU) /* SH-X TLB */ |
| 239 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ |
| 240 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) |
| 241 | |
| 242 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ |
| 243 | _PAGE_CACHABLE | _PAGE_ACCESSED | \ |
| 244 | _PAGE_FLAGS_HARD) |
| 245 | |
| 246 | #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ |
| 247 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) |
| 248 | |
| 249 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ |
| 250 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) |
| 251 | |
| 252 | #define PAGE_EXECREAD PAGE_READONLY |
| 253 | #define PAGE_RWX PAGE_SHARED |
| 254 | #define PAGE_WRITEONLY PAGE_SHARED |
| 255 | |
| 256 | #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \ |
| 257 | _PAGE_DIRTY | _PAGE_ACCESSED | \ |
| 258 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) |
| 259 | |
| 260 | #define PAGE_KERNEL_NOCACHE \ |
| 261 | __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ |
| 262 | _PAGE_ACCESSED | _PAGE_HW_SHARED | \ |
| 263 | _PAGE_FLAGS_HARD) |
| 264 | |
| 265 | #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ |
| 266 | _PAGE_DIRTY | _PAGE_ACCESSED | \ |
| 267 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) |
| 268 | |
| 269 | #define PAGE_KERNEL_PCC(slot, type) \ |
| 270 | __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ |
| 271 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ |
| 272 | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ |
| 273 | (type)) |
| 274 | #else /* no mmu */ |
| 275 | #define PAGE_NONE __pgprot(0) |
| 276 | #define PAGE_SHARED __pgprot(0) |
| 277 | #define PAGE_COPY __pgprot(0) |
| 278 | #define PAGE_EXECREAD __pgprot(0) |
| 279 | #define PAGE_RWX __pgprot(0) |
| 280 | #define PAGE_READONLY __pgprot(0) |
| 281 | #define PAGE_WRITEONLY __pgprot(0) |
| 282 | #define PAGE_KERNEL __pgprot(0) |
| 283 | #define PAGE_KERNEL_NOCACHE __pgprot(0) |
| 284 | #define PAGE_KERNEL_RO __pgprot(0) |
| 285 | |
| 286 | #define PAGE_KERNEL_PCC(slot, type) \ |
| 287 | __pgprot(0) |
| 288 | #endif |
| 289 | |
| 290 | #endif /* __ASSEMBLY__ */ |
| 291 | |
| 292 | #ifndef __ASSEMBLY__ |
| 293 | |
| 294 | /* |
| 295 | * Certain architectures need to do special things when PTEs |
| 296 | * within a page table are directly modified. Thus, the following |
| 297 | * hook is made available. |
| 298 | */ |
| 299 | #ifdef CONFIG_X2TLB |
| 300 | static inline void set_pte(pte_t *ptep, pte_t pte) |
| 301 | { |
| 302 | ptep->pte_high = pte.pte_high; |
| 303 | smp_wmb(); |
| 304 | ptep->pte_low = pte.pte_low; |
| 305 | } |
| 306 | #else |
| 307 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) |
| 308 | #endif |
| 309 | |
| 310 | /* |
| 311 | * (pmds are folded into pgds so this doesn't get actually called, |
| 312 | * but the define is needed for a generic inline function.) |
| 313 | */ |
| 314 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) |
| 315 | |
| 316 | #define PFN_PTE_SHIFT PAGE_SHIFT |
| 317 | #define pfn_pte(pfn, prot) \ |
| 318 | __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) |
| 319 | #define pfn_pmd(pfn, prot) \ |
| 320 | __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) |
| 321 | |
| 322 | #define pte_none(x) (!pte_val(x)) |
| 323 | #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) |
| 324 | |
| 325 | #define pte_clear(mm, addr, ptep) set_pte(ptep, __pte(0)) |
| 326 | |
| 327 | #define pmd_none(x) (!pmd_val(x)) |
| 328 | #define pmd_present(x) (pmd_val(x)) |
| 329 | #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) |
| 330 | #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) |
| 331 | |
| 332 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) |
| 333 | #define pte_page(x) pfn_to_page(pte_pfn(x)) |
| 334 | |
| 335 | /* |
| 336 | * The following only work if pte_present() is true. |
| 337 | * Undefined behaviour if not.. |
| 338 | */ |
| 339 | #define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT)) |
| 340 | #define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) |
| 341 | #define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) |
| 342 | #define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL) |
| 343 | |
| 344 | #ifdef CONFIG_X2TLB |
| 345 | #define pte_write(pte) \ |
| 346 | ((pte).pte_high & (_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE)) |
| 347 | #else |
| 348 | #define pte_write(pte) ((pte).pte_low & _PAGE_RW) |
| 349 | #endif |
| 350 | |
| 351 | #define PTE_BIT_FUNC(h,fn,op) \ |
| 352 | static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; } |
| 353 | |
| 354 | #ifdef CONFIG_X2TLB |
| 355 | /* |
| 356 | * We cheat a bit in the SH-X2 TLB case. As the permission bits are |
| 357 | * individually toggled (and user permissions are entirely decoupled from |
| 358 | * kernel permissions), we attempt to couple them a bit more sanely here. |
| 359 | */ |
| 360 | PTE_BIT_FUNC(high, wrprotect, &= ~(_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE)); |
| 361 | PTE_BIT_FUNC(high, mkwrite_novma, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); |
| 362 | PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); |
| 363 | #else |
| 364 | PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW); |
| 365 | PTE_BIT_FUNC(low, mkwrite_novma, |= _PAGE_RW); |
| 366 | PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE); |
| 367 | #endif |
| 368 | |
| 369 | PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); |
| 370 | PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); |
| 371 | PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); |
| 372 | PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); |
| 373 | PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL); |
| 374 | |
| 375 | /* |
| 376 | * Macro and implementation to make a page protection as uncachable. |
| 377 | */ |
| 378 | #define pgprot_writecombine(prot) \ |
| 379 | __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) |
| 380 | |
| 381 | #define pgprot_noncached pgprot_writecombine |
| 382 | |
| 383 | /* |
| 384 | * Conversion functions: convert a page and protection to a page entry, |
| 385 | * and a page entry and page directory to the page they refer to. |
| 386 | * |
| 387 | * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) |
| 388 | */ |
| 389 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) |
| 390 | |
| 391 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
| 392 | { |
| 393 | pte.pte_low &= _PAGE_CHG_MASK; |
| 394 | pte.pte_low |= pgprot_val(newprot); |
| 395 | |
| 396 | #ifdef CONFIG_X2TLB |
| 397 | pte.pte_high |= pgprot_val(newprot) >> 32; |
| 398 | #endif |
| 399 | |
| 400 | return pte; |
| 401 | } |
| 402 | |
| 403 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
| 404 | { |
| 405 | return (unsigned long)pmd_val(pmd); |
| 406 | } |
| 407 | |
| 408 | #define pmd_pfn(pmd) (__pa(pmd_val(pmd)) >> PAGE_SHIFT) |
| 409 | #define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) |
| 410 | |
| 411 | #ifdef CONFIG_X2TLB |
| 412 | #define pte_ERROR(e) \ |
| 413 | printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \ |
| 414 | &(e), (e).pte_high, (e).pte_low) |
| 415 | #define pgd_ERROR(e) \ |
| 416 | printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e)) |
| 417 | #else |
| 418 | #define pte_ERROR(e) \ |
| 419 | printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) |
| 420 | #define pgd_ERROR(e) \ |
| 421 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) |
| 422 | #endif |
| 423 | |
| 424 | /* |
| 425 | * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that |
| 426 | * are !pte_none() && !pte_present(). |
| 427 | * |
| 428 | * Constraints: |
| 429 | * _PAGE_PRESENT at bit 8 |
| 430 | * _PAGE_PROTNONE at bit 9 |
| 431 | * |
| 432 | * For the normal case, we encode the swap type and offset into the swap PTE |
| 433 | * such that bits 8 and 9 stay zero. For the 64-bit PTE case, we use the |
| 434 | * upper 32 for the swap offset and swap type, following the same approach as |
| 435 | * x86 PAE. This keeps the logic quite simple. |
| 436 | * |
| 437 | * As is evident by the Alpha code, if we ever get a 64-bit unsigned |
| 438 | * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes |
| 439 | * much cleaner.. |
| 440 | */ |
| 441 | |
| 442 | #ifdef CONFIG_X2TLB |
| 443 | /* |
| 444 | * Format of swap PTEs: |
| 445 | * |
| 446 | * 6 6 6 6 5 5 5 5 5 5 5 5 5 5 4 4 4 4 4 4 4 4 4 4 3 3 3 3 3 3 3 3 |
| 447 | * 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 |
| 448 | * <--------------------- offset ----------------------> < type -> |
| 449 | * |
| 450 | * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 |
| 451 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 452 | * <------------------- zeroes --------------------> E 0 0 0 0 0 0 |
| 453 | */ |
| 454 | #define __swp_type(x) ((x).val & 0x1f) |
| 455 | #define __swp_offset(x) ((x).val >> 5) |
| 456 | #define __swp_entry(type, offset) ((swp_entry_t){ ((type) & 0x1f) | (offset) << 5}) |
| 457 | #define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) |
| 458 | #define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) |
| 459 | |
| 460 | #else |
| 461 | /* |
| 462 | * Format of swap PTEs: |
| 463 | * |
| 464 | * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 |
| 465 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 466 | * <--------------- offset ----------------> 0 0 0 0 E < type -> 0 |
| 467 | * |
| 468 | * E is the exclusive marker that is not stored in swap entries. |
| 469 | */ |
| 470 | #define __swp_type(x) ((x).val & 0x1f) |
| 471 | #define __swp_offset(x) ((x).val >> 10) |
| 472 | #define __swp_entry(type, offset) ((swp_entry_t){((type) & 0x1f) | (offset) << 10}) |
| 473 | |
| 474 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) |
| 475 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) |
| 476 | #endif |
| 477 | |
| 478 | /* In both cases, we borrow bit 6 to store the exclusive marker in swap PTEs. */ |
| 479 | #define _PAGE_SWP_EXCLUSIVE _PAGE_USER |
| 480 | |
| 481 | static inline int pte_swp_exclusive(pte_t pte) |
| 482 | { |
| 483 | return pte.pte_low & _PAGE_SWP_EXCLUSIVE; |
| 484 | } |
| 485 | |
| 486 | PTE_BIT_FUNC(low, swp_mkexclusive, |= _PAGE_SWP_EXCLUSIVE); |
| 487 | PTE_BIT_FUNC(low, swp_clear_exclusive, &= ~_PAGE_SWP_EXCLUSIVE); |
| 488 | |
| 489 | #endif /* __ASSEMBLY__ */ |
| 490 | #endif /* __ASM_SH_PGTABLE_32_H */ |
| 491 |
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