1 | #ifndef _ASM_INTEL_DS_H |
2 | #define _ASM_INTEL_DS_H |
3 | |
4 | #include <linux/percpu-defs.h> |
5 | |
6 | #define BTS_BUFFER_SIZE (PAGE_SIZE << 4) |
7 | #define PEBS_BUFFER_SIZE (PAGE_SIZE << 4) |
8 | |
9 | /* The maximal number of PEBS events: */ |
10 | #define MAX_PEBS_EVENTS 8 |
11 | #define MAX_FIXED_PEBS_EVENTS 3 |
12 | |
13 | /* |
14 | * A debug store configuration. |
15 | * |
16 | * We only support architectures that use 64bit fields. |
17 | */ |
18 | struct debug_store { |
19 | u64 bts_buffer_base; |
20 | u64 bts_index; |
21 | u64 bts_absolute_maximum; |
22 | u64 bts_interrupt_threshold; |
23 | u64 pebs_buffer_base; |
24 | u64 pebs_index; |
25 | u64 pebs_absolute_maximum; |
26 | u64 pebs_interrupt_threshold; |
27 | u64 pebs_event_reset[MAX_PEBS_EVENTS + MAX_FIXED_PEBS_EVENTS]; |
28 | } __aligned(PAGE_SIZE); |
29 | |
30 | DECLARE_PER_CPU_PAGE_ALIGNED(struct debug_store, cpu_debug_store); |
31 | |
32 | struct debug_store_buffers { |
33 | char bts_buffer[BTS_BUFFER_SIZE]; |
34 | char pebs_buffer[PEBS_BUFFER_SIZE]; |
35 | }; |
36 | |
37 | #endif |
38 | |