1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /****************************************************************************** |
3 | * x86_emulate.h |
4 | * |
5 | * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. |
6 | * |
7 | * Copyright (c) 2005 Keir Fraser |
8 | * |
9 | * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 |
10 | */ |
11 | |
12 | #ifndef _ASM_X86_KVM_X86_EMULATE_H |
13 | #define _ASM_X86_KVM_X86_EMULATE_H |
14 | |
15 | #include <asm/desc_defs.h> |
16 | |
17 | struct x86_emulate_ctxt; |
18 | enum x86_intercept; |
19 | enum x86_intercept_stage; |
20 | |
21 | struct x86_exception { |
22 | u8 vector; |
23 | bool error_code_valid; |
24 | u16 error_code; |
25 | bool nested_page_fault; |
26 | u64 address; /* cr2 or nested page fault gpa */ |
27 | u8 async_page_fault; |
28 | }; |
29 | |
30 | /* |
31 | * This struct is used to carry enough information from the instruction |
32 | * decoder to main KVM so that a decision can be made whether the |
33 | * instruction needs to be intercepted or not. |
34 | */ |
35 | struct x86_instruction_info { |
36 | u8 intercept; /* which intercept */ |
37 | u8 rep_prefix; /* rep prefix? */ |
38 | u8 modrm_mod; /* mod part of modrm */ |
39 | u8 modrm_reg; /* index of register used */ |
40 | u8 modrm_rm; /* rm part of modrm */ |
41 | u64 src_val; /* value of source operand */ |
42 | u64 dst_val; /* value of destination operand */ |
43 | u8 src_bytes; /* size of source operand */ |
44 | u8 dst_bytes; /* size of destination operand */ |
45 | u8 ad_bytes; /* size of src/dst address */ |
46 | u64 next_rip; /* rip following the instruction */ |
47 | }; |
48 | |
49 | /* |
50 | * x86_emulate_ops: |
51 | * |
52 | * These operations represent the instruction emulator's interface to memory. |
53 | * There are two categories of operation: those that act on ordinary memory |
54 | * regions (*_std), and those that act on memory regions known to require |
55 | * special treatment or emulation (*_emulated). |
56 | * |
57 | * The emulator assumes that an instruction accesses only one 'emulated memory' |
58 | * location, that this location is the given linear faulting address (cr2), and |
59 | * that this is one of the instruction's data operands. Instruction fetches and |
60 | * stack operations are assumed never to access emulated memory. The emulator |
61 | * automatically deduces which operand of a string-move operation is accessing |
62 | * emulated memory, and assumes that the other operand accesses normal memory. |
63 | * |
64 | * NOTES: |
65 | * 1. The emulator isn't very smart about emulated vs. standard memory. |
66 | * 'Emulated memory' access addresses should be checked for sanity. |
67 | * 'Normal memory' accesses may fault, and the caller must arrange to |
68 | * detect and handle reentrancy into the emulator via recursive faults. |
69 | * Accesses may be unaligned and may cross page boundaries. |
70 | * 2. If the access fails (cannot emulate, or a standard access faults) then |
71 | * it is up to the memop to propagate the fault to the guest VM via |
72 | * some out-of-band mechanism, unknown to the emulator. The memop signals |
73 | * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will |
74 | * then immediately bail. |
75 | * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only |
76 | * cmpxchg8b_emulated need support 8-byte accesses. |
77 | * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. |
78 | */ |
79 | /* Access completed successfully: continue emulation as normal. */ |
80 | #define X86EMUL_CONTINUE 0 |
81 | /* Access is unhandleable: bail from emulation and return error to caller. */ |
82 | #define X86EMUL_UNHANDLEABLE 1 |
83 | /* Terminate emulation but return success to the caller. */ |
84 | #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ |
85 | #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ |
86 | #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ |
87 | #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ |
88 | #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ |
89 | |
90 | struct x86_emulate_ops { |
91 | /* |
92 | * read_gpr: read a general purpose register (rax - r15) |
93 | * |
94 | * @reg: gpr number. |
95 | */ |
96 | ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); |
97 | /* |
98 | * write_gpr: write a general purpose register (rax - r15) |
99 | * |
100 | * @reg: gpr number. |
101 | * @val: value to write. |
102 | */ |
103 | void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); |
104 | /* |
105 | * read_std: Read bytes of standard (non-emulated/special) memory. |
106 | * Used for descriptor reading. |
107 | * @addr: [IN ] Linear address from which to read. |
108 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. |
109 | * @bytes: [IN ] Number of bytes to read from memory. |
110 | * @system:[IN ] Whether the access is forced to be at CPL0. |
111 | */ |
112 | int (*read_std)(struct x86_emulate_ctxt *ctxt, |
113 | unsigned long addr, void *val, |
114 | unsigned int bytes, |
115 | struct x86_exception *fault, bool system); |
116 | |
117 | /* |
118 | * read_phys: Read bytes of standard (non-emulated/special) memory. |
119 | * Used for descriptor reading. |
120 | * @addr: [IN ] Physical address from which to read. |
121 | * @val: [OUT] Value read from memory. |
122 | * @bytes: [IN ] Number of bytes to read from memory. |
123 | */ |
124 | int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr, |
125 | void *val, unsigned int bytes); |
126 | |
127 | /* |
128 | * write_std: Write bytes of standard (non-emulated/special) memory. |
129 | * Used for descriptor writing. |
130 | * @addr: [IN ] Linear address to which to write. |
131 | * @val: [OUT] Value write to memory, zero-extended to 'u_long'. |
132 | * @bytes: [IN ] Number of bytes to write to memory. |
133 | * @system:[IN ] Whether the access is forced to be at CPL0. |
134 | */ |
135 | int (*write_std)(struct x86_emulate_ctxt *ctxt, |
136 | unsigned long addr, void *val, unsigned int bytes, |
137 | struct x86_exception *fault, bool system); |
138 | /* |
139 | * fetch: Read bytes of standard (non-emulated/special) memory. |
140 | * Used for instruction fetch. |
141 | * @addr: [IN ] Linear address from which to read. |
142 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. |
143 | * @bytes: [IN ] Number of bytes to read from memory. |
144 | */ |
145 | int (*fetch)(struct x86_emulate_ctxt *ctxt, |
146 | unsigned long addr, void *val, unsigned int bytes, |
147 | struct x86_exception *fault); |
148 | |
149 | /* |
150 | * read_emulated: Read bytes from emulated/special memory area. |
151 | * @addr: [IN ] Linear address from which to read. |
152 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. |
153 | * @bytes: [IN ] Number of bytes to read from memory. |
154 | */ |
155 | int (*read_emulated)(struct x86_emulate_ctxt *ctxt, |
156 | unsigned long addr, void *val, unsigned int bytes, |
157 | struct x86_exception *fault); |
158 | |
159 | /* |
160 | * write_emulated: Write bytes to emulated/special memory area. |
161 | * @addr: [IN ] Linear address to which to write. |
162 | * @val: [IN ] Value to write to memory (low-order bytes used as |
163 | * required). |
164 | * @bytes: [IN ] Number of bytes to write to memory. |
165 | */ |
166 | int (*write_emulated)(struct x86_emulate_ctxt *ctxt, |
167 | unsigned long addr, const void *val, |
168 | unsigned int bytes, |
169 | struct x86_exception *fault); |
170 | |
171 | /* |
172 | * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an |
173 | * emulated/special memory area. |
174 | * @addr: [IN ] Linear address to access. |
175 | * @old: [IN ] Value expected to be current at @addr. |
176 | * @new: [IN ] Value to write to @addr. |
177 | * @bytes: [IN ] Number of bytes to access using CMPXCHG. |
178 | */ |
179 | int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, |
180 | unsigned long addr, |
181 | const void *old, |
182 | const void *new, |
183 | unsigned int bytes, |
184 | struct x86_exception *fault); |
185 | void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); |
186 | |
187 | int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, |
188 | int size, unsigned short port, void *val, |
189 | unsigned int count); |
190 | |
191 | int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, |
192 | int size, unsigned short port, const void *val, |
193 | unsigned int count); |
194 | |
195 | bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, |
196 | struct desc_struct *desc, u32 *base3, int seg); |
197 | void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, |
198 | struct desc_struct *desc, u32 base3, int seg); |
199 | unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, |
200 | int seg); |
201 | void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
202 | void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
203 | void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
204 | void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); |
205 | ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); |
206 | int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); |
207 | int (*cpl)(struct x86_emulate_ctxt *ctxt); |
208 | int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest); |
209 | int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); |
210 | u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt); |
211 | void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase); |
212 | int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); |
213 | int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); |
214 | int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc); |
215 | int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); |
216 | void (*halt)(struct x86_emulate_ctxt *ctxt); |
217 | void (*wbinvd)(struct x86_emulate_ctxt *ctxt); |
218 | int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); |
219 | int (*intercept)(struct x86_emulate_ctxt *ctxt, |
220 | struct x86_instruction_info *info, |
221 | enum x86_intercept_stage stage); |
222 | |
223 | bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, |
224 | u32 *ecx, u32 *edx, bool check_limit); |
225 | void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); |
226 | |
227 | unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt); |
228 | void (*set_hflags)(struct x86_emulate_ctxt *ctxt, unsigned hflags); |
229 | int (*pre_leave_smm)(struct x86_emulate_ctxt *ctxt, u64 smbase); |
230 | |
231 | }; |
232 | |
233 | typedef u32 __attribute__((vector_size(16))) sse128_t; |
234 | |
235 | /* Type, address-of, and value of an instruction's operand. */ |
236 | struct operand { |
237 | enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type; |
238 | unsigned int bytes; |
239 | unsigned int count; |
240 | union { |
241 | unsigned long orig_val; |
242 | u64 orig_val64; |
243 | }; |
244 | union { |
245 | unsigned long *reg; |
246 | struct segmented_address { |
247 | ulong ea; |
248 | unsigned seg; |
249 | } mem; |
250 | unsigned xmm; |
251 | unsigned mm; |
252 | } addr; |
253 | union { |
254 | unsigned long val; |
255 | u64 val64; |
256 | char valptr[sizeof(sse128_t)]; |
257 | sse128_t vec_val; |
258 | u64 mm_val; |
259 | void *data; |
260 | }; |
261 | }; |
262 | |
263 | struct fetch_cache { |
264 | u8 data[15]; |
265 | u8 *ptr; |
266 | u8 *end; |
267 | }; |
268 | |
269 | struct read_cache { |
270 | u8 data[1024]; |
271 | unsigned long pos; |
272 | unsigned long end; |
273 | }; |
274 | |
275 | /* Execution mode, passed to the emulator. */ |
276 | enum x86emul_mode { |
277 | X86EMUL_MODE_REAL, /* Real mode. */ |
278 | X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ |
279 | X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ |
280 | X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ |
281 | X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ |
282 | }; |
283 | |
284 | /* These match some of the HF_* flags defined in kvm_host.h */ |
285 | #define X86EMUL_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ |
286 | #define X86EMUL_SMM_MASK (1 << 6) |
287 | #define X86EMUL_SMM_INSIDE_NMI_MASK (1 << 7) |
288 | |
289 | struct x86_emulate_ctxt { |
290 | const struct x86_emulate_ops *ops; |
291 | |
292 | /* Register state before/after emulation. */ |
293 | unsigned long eflags; |
294 | unsigned long eip; /* eip before instruction emulation */ |
295 | /* Emulated execution mode, represented by an X86EMUL_MODE value. */ |
296 | enum x86emul_mode mode; |
297 | |
298 | /* interruptibility state, as a result of execution of STI or MOV SS */ |
299 | int interruptibility; |
300 | |
301 | bool perm_ok; /* do not check permissions if true */ |
302 | bool ud; /* inject an #UD if host doesn't support insn */ |
303 | bool tf; /* TF value before instruction (after for syscall/sysret) */ |
304 | |
305 | bool have_exception; |
306 | struct x86_exception exception; |
307 | |
308 | /* |
309 | * decode cache |
310 | */ |
311 | |
312 | /* current opcode length in bytes */ |
313 | u8 opcode_len; |
314 | u8 b; |
315 | u8 intercept; |
316 | u8 op_bytes; |
317 | u8 ad_bytes; |
318 | struct operand src; |
319 | struct operand src2; |
320 | struct operand dst; |
321 | int (*execute)(struct x86_emulate_ctxt *ctxt); |
322 | int (*check_perm)(struct x86_emulate_ctxt *ctxt); |
323 | /* |
324 | * The following six fields are cleared together, |
325 | * the rest are initialized unconditionally in x86_decode_insn |
326 | * or elsewhere |
327 | */ |
328 | bool rip_relative; |
329 | u8 rex_prefix; |
330 | u8 lock_prefix; |
331 | u8 rep_prefix; |
332 | /* bitmaps of registers in _regs[] that can be read */ |
333 | u32 regs_valid; |
334 | /* bitmaps of registers in _regs[] that have been written */ |
335 | u32 regs_dirty; |
336 | /* modrm */ |
337 | u8 modrm; |
338 | u8 modrm_mod; |
339 | u8 modrm_reg; |
340 | u8 modrm_rm; |
341 | u8 modrm_seg; |
342 | u8 seg_override; |
343 | u64 d; |
344 | unsigned long _eip; |
345 | struct operand memop; |
346 | /* Fields above regs are cleared together. */ |
347 | unsigned long _regs[NR_VCPU_REGS]; |
348 | struct operand *memopp; |
349 | struct fetch_cache fetch; |
350 | struct read_cache io_read; |
351 | struct read_cache mem_read; |
352 | }; |
353 | |
354 | /* Repeat String Operation Prefix */ |
355 | #define REPE_PREFIX 0xf3 |
356 | #define REPNE_PREFIX 0xf2 |
357 | |
358 | /* CPUID vendors */ |
359 | #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 |
360 | #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 |
361 | #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 |
362 | |
363 | #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 |
364 | #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 |
365 | #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 |
366 | |
367 | #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948 |
368 | #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975 |
369 | #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e |
370 | |
371 | #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 |
372 | #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e |
373 | #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 |
374 | |
375 | enum x86_intercept_stage { |
376 | X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ |
377 | X86_ICPT_PRE_EXCEPT, |
378 | X86_ICPT_POST_EXCEPT, |
379 | X86_ICPT_POST_MEMACCESS, |
380 | }; |
381 | |
382 | enum x86_intercept { |
383 | x86_intercept_none, |
384 | x86_intercept_cr_read, |
385 | x86_intercept_cr_write, |
386 | x86_intercept_clts, |
387 | x86_intercept_lmsw, |
388 | x86_intercept_smsw, |
389 | x86_intercept_dr_read, |
390 | x86_intercept_dr_write, |
391 | x86_intercept_lidt, |
392 | x86_intercept_sidt, |
393 | x86_intercept_lgdt, |
394 | x86_intercept_sgdt, |
395 | x86_intercept_lldt, |
396 | x86_intercept_sldt, |
397 | x86_intercept_ltr, |
398 | x86_intercept_str, |
399 | x86_intercept_rdtsc, |
400 | x86_intercept_rdpmc, |
401 | x86_intercept_pushf, |
402 | x86_intercept_popf, |
403 | x86_intercept_cpuid, |
404 | x86_intercept_rsm, |
405 | x86_intercept_iret, |
406 | x86_intercept_intn, |
407 | x86_intercept_invd, |
408 | x86_intercept_pause, |
409 | x86_intercept_hlt, |
410 | x86_intercept_invlpg, |
411 | x86_intercept_invlpga, |
412 | x86_intercept_vmrun, |
413 | x86_intercept_vmload, |
414 | x86_intercept_vmsave, |
415 | x86_intercept_vmmcall, |
416 | x86_intercept_stgi, |
417 | x86_intercept_clgi, |
418 | x86_intercept_skinit, |
419 | x86_intercept_rdtscp, |
420 | x86_intercept_icebp, |
421 | x86_intercept_wbinvd, |
422 | x86_intercept_monitor, |
423 | x86_intercept_mwait, |
424 | x86_intercept_rdmsr, |
425 | x86_intercept_wrmsr, |
426 | x86_intercept_in, |
427 | x86_intercept_ins, |
428 | x86_intercept_out, |
429 | x86_intercept_outs, |
430 | |
431 | nr_x86_intercepts |
432 | }; |
433 | |
434 | /* Host execution mode. */ |
435 | #if defined(CONFIG_X86_32) |
436 | #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 |
437 | #elif defined(CONFIG_X86_64) |
438 | #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 |
439 | #endif |
440 | |
441 | int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len); |
442 | bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); |
443 | #define EMULATION_FAILED -1 |
444 | #define EMULATION_OK 0 |
445 | #define EMULATION_RESTART 1 |
446 | #define EMULATION_INTERCEPTED 2 |
447 | void init_decode_cache(struct x86_emulate_ctxt *ctxt); |
448 | int x86_emulate_insn(struct x86_emulate_ctxt *ctxt); |
449 | int emulator_task_switch(struct x86_emulate_ctxt *ctxt, |
450 | u16 tss_selector, int idt_index, int reason, |
451 | bool has_error_code, u32 error_code); |
452 | int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); |
453 | void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); |
454 | void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); |
455 | bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); |
456 | |
457 | #endif /* _ASM_X86_KVM_X86_EMULATE_H */ |
458 | |