1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef _ASM_X86_MICROCODE_AMD_H |
3 | #define _ASM_X86_MICROCODE_AMD_H |
4 | |
5 | #include <asm/microcode.h> |
6 | |
7 | #define UCODE_MAGIC 0x00414d44 |
8 | #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000 |
9 | #define UCODE_UCODE_TYPE 0x00000001 |
10 | |
11 | #define SECTION_HDR_SIZE 8 |
12 | #define CONTAINER_HDR_SZ 12 |
13 | |
14 | struct equiv_cpu_entry { |
15 | u32 installed_cpu; |
16 | u32 fixed_errata_mask; |
17 | u32 fixed_errata_compare; |
18 | u16 equiv_cpu; |
19 | u16 res; |
20 | } __attribute__((packed)); |
21 | |
22 | struct { |
23 | u32 ; |
24 | u32 ; |
25 | u16 ; |
26 | u8 ; |
27 | u8 ; |
28 | u32 ; |
29 | u32 ; |
30 | u32 ; |
31 | u16 ; |
32 | u8 ; |
33 | u8 ; |
34 | u8 ; |
35 | u8 [3]; |
36 | u32 [8]; |
37 | } __attribute__((packed)); |
38 | |
39 | struct microcode_amd { |
40 | struct microcode_header_amd hdr; |
41 | unsigned int mpb[0]; |
42 | }; |
43 | |
44 | #define PATCH_MAX_SIZE PAGE_SIZE |
45 | |
46 | #ifdef CONFIG_MICROCODE_AMD |
47 | extern void __init load_ucode_amd_bsp(unsigned int family); |
48 | extern void load_ucode_amd_ap(unsigned int family); |
49 | extern int __init save_microcode_in_initrd_amd(unsigned int family); |
50 | void reload_ucode_amd(void); |
51 | #else |
52 | static inline void __init load_ucode_amd_bsp(unsigned int family) {} |
53 | static inline void load_ucode_amd_ap(unsigned int family) {} |
54 | static inline int __init |
55 | save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; } |
56 | void reload_ucode_amd(void) {} |
57 | #endif |
58 | #endif /* _ASM_X86_MICROCODE_AMD_H */ |
59 | |