1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_MICROCODE_AMD_H
3#define _ASM_X86_MICROCODE_AMD_H
4
5#include <asm/microcode.h>
6
7#define UCODE_MAGIC 0x00414d44
8#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
9#define UCODE_UCODE_TYPE 0x00000001
10
11#define SECTION_HDR_SIZE 8
12#define CONTAINER_HDR_SZ 12
13
14struct equiv_cpu_entry {
15 u32 installed_cpu;
16 u32 fixed_errata_mask;
17 u32 fixed_errata_compare;
18 u16 equiv_cpu;
19 u16 res;
20} __attribute__((packed));
21
22struct microcode_header_amd {
23 u32 data_code;
24 u32 patch_id;
25 u16 mc_patch_data_id;
26 u8 mc_patch_data_len;
27 u8 init_flag;
28 u32 mc_patch_data_checksum;
29 u32 nb_dev_id;
30 u32 sb_dev_id;
31 u16 processor_rev_id;
32 u8 nb_rev_id;
33 u8 sb_rev_id;
34 u8 bios_api_rev;
35 u8 reserved1[3];
36 u32 match_reg[8];
37} __attribute__((packed));
38
39struct microcode_amd {
40 struct microcode_header_amd hdr;
41 unsigned int mpb[0];
42};
43
44#define PATCH_MAX_SIZE PAGE_SIZE
45
46#ifdef CONFIG_MICROCODE_AMD
47extern void __init load_ucode_amd_bsp(unsigned int family);
48extern void load_ucode_amd_ap(unsigned int family);
49extern int __init save_microcode_in_initrd_amd(unsigned int family);
50void reload_ucode_amd(void);
51#else
52static inline void __init load_ucode_amd_bsp(unsigned int family) {}
53static inline void load_ucode_amd_ap(unsigned int family) {}
54static inline int __init
55save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
56void reload_ucode_amd(void) {}
57#endif
58#endif /* _ASM_X86_MICROCODE_AMD_H */
59