1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support |
4 | * |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> |
6 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> |
7 | */ |
8 | #define pr_fmt(fmt) "ACPI: " fmt |
9 | |
10 | #include <linux/init.h> |
11 | #include <linux/acpi.h> |
12 | #include <linux/acpi_pmtmr.h> |
13 | #include <linux/efi.h> |
14 | #include <linux/cpumask.h> |
15 | #include <linux/export.h> |
16 | #include <linux/dmi.h> |
17 | #include <linux/irq.h> |
18 | #include <linux/slab.h> |
19 | #include <linux/memblock.h> |
20 | #include <linux/ioport.h> |
21 | #include <linux/pci.h> |
22 | #include <linux/efi-bgrt.h> |
23 | #include <linux/serial_core.h> |
24 | #include <linux/pgtable.h> |
25 | |
26 | #include <asm/e820/api.h> |
27 | #include <asm/irqdomain.h> |
28 | #include <asm/pci_x86.h> |
29 | #include <asm/io_apic.h> |
30 | #include <asm/apic.h> |
31 | #include <asm/io.h> |
32 | #include <asm/mpspec.h> |
33 | #include <asm/smp.h> |
34 | #include <asm/i8259.h> |
35 | #include <asm/setup.h> |
36 | |
37 | #include "sleep.h" /* To include x86_acpi_suspend_lowlevel */ |
38 | static int __initdata acpi_force = 0; |
39 | int acpi_disabled; |
40 | EXPORT_SYMBOL(acpi_disabled); |
41 | |
42 | #ifdef CONFIG_X86_64 |
43 | # include <asm/proto.h> |
44 | #endif /* X86 */ |
45 | |
46 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
47 | static int acpi_nobgrt; /* skip ACPI BGRT */ |
48 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
49 | EXPORT_SYMBOL(acpi_pci_disabled); |
50 | |
51 | int acpi_lapic; |
52 | int acpi_ioapic; |
53 | int acpi_strict; |
54 | int acpi_disable_cmcff; |
55 | bool acpi_int_src_ovr[NR_IRQS_LEGACY]; |
56 | |
57 | /* ACPI SCI override configuration */ |
58 | u8 acpi_sci_flags __initdata; |
59 | u32 acpi_sci_override_gsi __initdata = INVALID_ACPI_IRQ; |
60 | int acpi_skip_timer_override __initdata; |
61 | int acpi_use_timer_override __initdata; |
62 | int acpi_fix_pin2_polarity __initdata; |
63 | |
64 | #ifdef CONFIG_X86_LOCAL_APIC |
65 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; |
66 | static bool acpi_support_online_capable; |
67 | #endif |
68 | |
69 | #ifdef CONFIG_X86_64 |
70 | /* Physical address of the Multiprocessor Wakeup Structure mailbox */ |
71 | static u64 acpi_mp_wake_mailbox_paddr; |
72 | /* Virtual address of the Multiprocessor Wakeup Structure mailbox */ |
73 | static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox; |
74 | #endif |
75 | |
76 | #ifdef CONFIG_X86_IO_APIC |
77 | /* |
78 | * Locks related to IOAPIC hotplug |
79 | * Hotplug side: |
80 | * ->device_hotplug_lock |
81 | * ->acpi_ioapic_lock |
82 | * ->ioapic_lock |
83 | * Interrupt mapping side: |
84 | * ->acpi_ioapic_lock |
85 | * ->ioapic_mutex |
86 | * ->ioapic_lock |
87 | */ |
88 | static DEFINE_MUTEX(acpi_ioapic_lock); |
89 | #endif |
90 | |
91 | /* -------------------------------------------------------------------------- |
92 | Boot-time Configuration |
93 | -------------------------------------------------------------------------- */ |
94 | |
95 | /* |
96 | * The default interrupt routing model is PIC (8259). This gets |
97 | * overridden if IOAPICs are enumerated (below). |
98 | */ |
99 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
100 | |
101 | |
102 | /* |
103 | * ISA irqs by default are the first 16 gsis but can be |
104 | * any gsi as specified by an interrupt source override. |
105 | */ |
106 | static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = { |
107 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 |
108 | }; |
109 | |
110 | /* |
111 | * This is just a simple wrapper around early_memremap(), |
112 | * with sanity checks for phys == 0 and size == 0. |
113 | */ |
114 | void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) |
115 | { |
116 | |
117 | if (!phys || !size) |
118 | return NULL; |
119 | |
120 | return early_memremap(phys_addr: phys, size); |
121 | } |
122 | |
123 | void __init __acpi_unmap_table(void __iomem *map, unsigned long size) |
124 | { |
125 | if (!map || !size) |
126 | return; |
127 | |
128 | early_memunmap(addr: map, size); |
129 | } |
130 | |
131 | #ifdef CONFIG_X86_LOCAL_APIC |
132 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
133 | { |
134 | struct acpi_table_madt *madt = NULL; |
135 | |
136 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
137 | return -EINVAL; |
138 | |
139 | madt = (struct acpi_table_madt *)table; |
140 | if (!madt) { |
141 | pr_warn("Unable to map MADT\n" ); |
142 | return -ENODEV; |
143 | } |
144 | |
145 | if (madt->address) { |
146 | acpi_lapic_addr = (u64) madt->address; |
147 | |
148 | pr_debug("Local APIC address 0x%08x\n" , madt->address); |
149 | } |
150 | |
151 | if (madt->flags & ACPI_MADT_PCAT_COMPAT) |
152 | legacy_pic_pcat_compat(); |
153 | |
154 | /* ACPI 6.3 and newer support the online capable bit. */ |
155 | if (acpi_gbl_FADT.header.revision > 6 || |
156 | (acpi_gbl_FADT.header.revision == 6 && |
157 | acpi_gbl_FADT.minor_revision >= 3)) |
158 | acpi_support_online_capable = true; |
159 | |
160 | default_acpi_madt_oem_check(madt->header.oem_id, |
161 | madt->header.oem_table_id); |
162 | |
163 | return 0; |
164 | } |
165 | |
166 | /** |
167 | * acpi_register_lapic - register a local apic and generates a logic cpu number |
168 | * @id: local apic id to register |
169 | * @acpiid: ACPI id to register |
170 | * @enabled: this cpu is enabled or not |
171 | * |
172 | * Returns the logic cpu number which maps to the local apic |
173 | */ |
174 | static int acpi_register_lapic(int id, u32 acpiid, u8 enabled) |
175 | { |
176 | int cpu; |
177 | |
178 | if (id >= MAX_LOCAL_APIC) { |
179 | pr_info("skipped apicid that is too big\n" ); |
180 | return -EINVAL; |
181 | } |
182 | |
183 | if (!enabled) { |
184 | ++disabled_cpus; |
185 | return -EINVAL; |
186 | } |
187 | |
188 | cpu = generic_processor_info(apicid: id); |
189 | if (cpu >= 0) |
190 | early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid; |
191 | |
192 | return cpu; |
193 | } |
194 | |
195 | static bool __init acpi_is_processor_usable(u32 lapic_flags) |
196 | { |
197 | if (lapic_flags & ACPI_MADT_ENABLED) |
198 | return true; |
199 | |
200 | if (!acpi_support_online_capable || |
201 | (lapic_flags & ACPI_MADT_ONLINE_CAPABLE)) |
202 | return true; |
203 | |
204 | return false; |
205 | } |
206 | |
207 | static int __init |
208 | acpi_parse_x2apic(union acpi_subtable_headers *, const unsigned long end) |
209 | { |
210 | struct acpi_madt_local_x2apic *processor = NULL; |
211 | #ifdef CONFIG_X86_X2APIC |
212 | u32 apic_id; |
213 | u8 enabled; |
214 | #endif |
215 | |
216 | processor = (struct acpi_madt_local_x2apic *)header; |
217 | |
218 | if (BAD_MADT_ENTRY(processor, end)) |
219 | return -EINVAL; |
220 | |
221 | acpi_table_print_madt_entry(madt: &header->common); |
222 | |
223 | #ifdef CONFIG_X86_X2APIC |
224 | apic_id = processor->local_apic_id; |
225 | enabled = processor->lapic_flags & ACPI_MADT_ENABLED; |
226 | |
227 | /* Ignore invalid ID */ |
228 | if (apic_id == 0xffffffff) |
229 | return 0; |
230 | |
231 | /* don't register processors that cannot be onlined */ |
232 | if (!acpi_is_processor_usable(lapic_flags: processor->lapic_flags)) |
233 | return 0; |
234 | |
235 | /* |
236 | * We need to register disabled CPU as well to permit |
237 | * counting disabled CPUs. This allows us to size |
238 | * cpus_possible_map more accurately, to permit |
239 | * to not preallocating memory for all NR_CPUS |
240 | * when we use CPU hotplug. |
241 | */ |
242 | if (!apic_id_valid(apic_id)) { |
243 | if (enabled) |
244 | pr_warn("x2apic entry ignored\n" ); |
245 | return 0; |
246 | } |
247 | |
248 | acpi_register_lapic(id: apic_id, acpiid: processor->uid, enabled); |
249 | #else |
250 | pr_warn("x2apic entry ignored\n" ); |
251 | #endif |
252 | |
253 | return 0; |
254 | } |
255 | |
256 | static int __init |
257 | acpi_parse_lapic(union acpi_subtable_headers * , const unsigned long end) |
258 | { |
259 | struct acpi_madt_local_apic *processor = NULL; |
260 | |
261 | processor = (struct acpi_madt_local_apic *)header; |
262 | |
263 | if (BAD_MADT_ENTRY(processor, end)) |
264 | return -EINVAL; |
265 | |
266 | acpi_table_print_madt_entry(madt: &header->common); |
267 | |
268 | /* Ignore invalid ID */ |
269 | if (processor->id == 0xff) |
270 | return 0; |
271 | |
272 | /* don't register processors that can not be onlined */ |
273 | if (!acpi_is_processor_usable(lapic_flags: processor->lapic_flags)) |
274 | return 0; |
275 | |
276 | /* |
277 | * We need to register disabled CPU as well to permit |
278 | * counting disabled CPUs. This allows us to size |
279 | * cpus_possible_map more accurately, to permit |
280 | * to not preallocating memory for all NR_CPUS |
281 | * when we use CPU hotplug. |
282 | */ |
283 | acpi_register_lapic(id: processor->id, /* APIC ID */ |
284 | acpiid: processor->processor_id, /* ACPI ID */ |
285 | enabled: processor->lapic_flags & ACPI_MADT_ENABLED); |
286 | |
287 | return 0; |
288 | } |
289 | |
290 | static int __init |
291 | acpi_parse_sapic(union acpi_subtable_headers *, const unsigned long end) |
292 | { |
293 | struct acpi_madt_local_sapic *processor = NULL; |
294 | |
295 | processor = (struct acpi_madt_local_sapic *)header; |
296 | |
297 | if (BAD_MADT_ENTRY(processor, end)) |
298 | return -EINVAL; |
299 | |
300 | acpi_table_print_madt_entry(madt: &header->common); |
301 | |
302 | acpi_register_lapic(id: (processor->id << 8) | processor->eid,/* APIC ID */ |
303 | acpiid: processor->processor_id, /* ACPI ID */ |
304 | enabled: processor->lapic_flags & ACPI_MADT_ENABLED); |
305 | |
306 | return 0; |
307 | } |
308 | |
309 | static int __init |
310 | acpi_parse_lapic_addr_ovr(union acpi_subtable_headers * , |
311 | const unsigned long end) |
312 | { |
313 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
314 | |
315 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
316 | |
317 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) |
318 | return -EINVAL; |
319 | |
320 | acpi_table_print_madt_entry(madt: &header->common); |
321 | |
322 | acpi_lapic_addr = lapic_addr_ovr->address; |
323 | |
324 | return 0; |
325 | } |
326 | |
327 | static int __init |
328 | acpi_parse_x2apic_nmi(union acpi_subtable_headers *, |
329 | const unsigned long end) |
330 | { |
331 | struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL; |
332 | |
333 | x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header; |
334 | |
335 | if (BAD_MADT_ENTRY(x2apic_nmi, end)) |
336 | return -EINVAL; |
337 | |
338 | acpi_table_print_madt_entry(madt: &header->common); |
339 | |
340 | if (x2apic_nmi->lint != 1) |
341 | pr_warn("NMI not connected to LINT 1!\n" ); |
342 | |
343 | return 0; |
344 | } |
345 | |
346 | static int __init |
347 | acpi_parse_lapic_nmi(union acpi_subtable_headers * , const unsigned long end) |
348 | { |
349 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
350 | |
351 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
352 | |
353 | if (BAD_MADT_ENTRY(lapic_nmi, end)) |
354 | return -EINVAL; |
355 | |
356 | acpi_table_print_madt_entry(madt: &header->common); |
357 | |
358 | if (lapic_nmi->lint != 1) |
359 | pr_warn("NMI not connected to LINT 1!\n" ); |
360 | |
361 | return 0; |
362 | } |
363 | |
364 | #ifdef CONFIG_X86_64 |
365 | static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip) |
366 | { |
367 | /* |
368 | * Remap mailbox memory only for the first call to acpi_wakeup_cpu(). |
369 | * |
370 | * Wakeup of secondary CPUs is fully serialized in the core code. |
371 | * No need to protect acpi_mp_wake_mailbox from concurrent accesses. |
372 | */ |
373 | if (!acpi_mp_wake_mailbox) { |
374 | acpi_mp_wake_mailbox = memremap(offset: acpi_mp_wake_mailbox_paddr, |
375 | size: sizeof(*acpi_mp_wake_mailbox), |
376 | flags: MEMREMAP_WB); |
377 | } |
378 | |
379 | /* |
380 | * Mailbox memory is shared between the firmware and OS. Firmware will |
381 | * listen on mailbox command address, and once it receives the wakeup |
382 | * command, the CPU associated with the given apicid will be booted. |
383 | * |
384 | * The value of 'apic_id' and 'wakeup_vector' must be visible to the |
385 | * firmware before the wakeup command is visible. smp_store_release() |
386 | * ensures ordering and visibility. |
387 | */ |
388 | acpi_mp_wake_mailbox->apic_id = apicid; |
389 | acpi_mp_wake_mailbox->wakeup_vector = start_ip; |
390 | smp_store_release(&acpi_mp_wake_mailbox->command, |
391 | ACPI_MP_WAKE_COMMAND_WAKEUP); |
392 | |
393 | /* |
394 | * Wait for the CPU to wake up. |
395 | * |
396 | * The CPU being woken up is essentially in a spin loop waiting to be |
397 | * woken up. It should not take long for it wake up and acknowledge by |
398 | * zeroing out ->command. |
399 | * |
400 | * ACPI specification doesn't provide any guidance on how long kernel |
401 | * has to wait for a wake up acknowledgement. It also doesn't provide |
402 | * a way to cancel a wake up request if it takes too long. |
403 | * |
404 | * In TDX environment, the VMM has control over how long it takes to |
405 | * wake up secondary. It can postpone scheduling secondary vCPU |
406 | * indefinitely. Giving up on wake up request and reporting error opens |
407 | * possible attack vector for VMM: it can wake up a secondary CPU when |
408 | * kernel doesn't expect it. Wait until positive result of the wake up |
409 | * request. |
410 | */ |
411 | while (READ_ONCE(acpi_mp_wake_mailbox->command)) |
412 | cpu_relax(); |
413 | |
414 | return 0; |
415 | } |
416 | #endif /* CONFIG_X86_64 */ |
417 | #endif /* CONFIG_X86_LOCAL_APIC */ |
418 | |
419 | #ifdef CONFIG_X86_IO_APIC |
420 | #define MP_ISA_BUS 0 |
421 | |
422 | static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, |
423 | u8 trigger, u32 gsi); |
424 | |
425 | static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, |
426 | u32 gsi) |
427 | { |
428 | /* |
429 | * Check bus_irq boundary. |
430 | */ |
431 | if (bus_irq >= NR_IRQS_LEGACY) { |
432 | pr_warn("Invalid bus_irq %u for legacy override\n" , bus_irq); |
433 | return; |
434 | } |
435 | |
436 | /* |
437 | * TBD: This check is for faulty timer entries, where the override |
438 | * erroneously sets the trigger to level, resulting in a HUGE |
439 | * increase of timer interrupts! |
440 | */ |
441 | if ((bus_irq == 0) && (trigger == 3)) |
442 | trigger = 1; |
443 | |
444 | if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0) |
445 | return; |
446 | /* |
447 | * Reset default identity mapping if gsi is also an legacy IRQ, |
448 | * otherwise there will be more than one entry with the same GSI |
449 | * and acpi_isa_irq_to_gsi() may give wrong result. |
450 | */ |
451 | if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi) |
452 | isa_irq_to_gsi[gsi] = INVALID_ACPI_IRQ; |
453 | isa_irq_to_gsi[bus_irq] = gsi; |
454 | } |
455 | |
456 | static void mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, |
457 | int polarity) |
458 | { |
459 | #ifdef CONFIG_X86_MPPARSE |
460 | struct mpc_intsrc mp_irq; |
461 | struct pci_dev *pdev; |
462 | unsigned char number; |
463 | unsigned int devfn; |
464 | int ioapic; |
465 | u8 pin; |
466 | |
467 | if (!acpi_ioapic) |
468 | return; |
469 | if (!dev || !dev_is_pci(dev)) |
470 | return; |
471 | |
472 | pdev = to_pci_dev(dev); |
473 | number = pdev->bus->number; |
474 | devfn = pdev->devfn; |
475 | pin = pdev->pin; |
476 | /* print the entry should happen on mptable identically */ |
477 | mp_irq.type = MP_INTSRC; |
478 | mp_irq.irqtype = mp_INT; |
479 | mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | |
480 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
481 | mp_irq.srcbus = number; |
482 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); |
483 | ioapic = mp_find_ioapic(gsi); |
484 | mp_irq.dstapic = mpc_ioapic_id(ioapic); |
485 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); |
486 | |
487 | mp_save_irq(m: &mp_irq); |
488 | #endif |
489 | } |
490 | |
491 | static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, |
492 | u8 trigger, u32 gsi) |
493 | { |
494 | struct mpc_intsrc mp_irq; |
495 | int ioapic, pin; |
496 | |
497 | /* Convert 'gsi' to 'ioapic.pin'(INTIN#) */ |
498 | ioapic = mp_find_ioapic(gsi); |
499 | if (ioapic < 0) { |
500 | pr_warn("Failed to find ioapic for gsi : %u\n" , gsi); |
501 | return ioapic; |
502 | } |
503 | |
504 | pin = mp_find_ioapic_pin(ioapic, gsi); |
505 | |
506 | mp_irq.type = MP_INTSRC; |
507 | mp_irq.irqtype = mp_INT; |
508 | mp_irq.irqflag = (trigger << 2) | polarity; |
509 | mp_irq.srcbus = MP_ISA_BUS; |
510 | mp_irq.srcbusirq = bus_irq; |
511 | mp_irq.dstapic = mpc_ioapic_id(ioapic); |
512 | mp_irq.dstirq = pin; |
513 | |
514 | mp_save_irq(m: &mp_irq); |
515 | |
516 | return 0; |
517 | } |
518 | |
519 | static int __init |
520 | acpi_parse_ioapic(union acpi_subtable_headers * , const unsigned long end) |
521 | { |
522 | struct acpi_madt_io_apic *ioapic = NULL; |
523 | struct ioapic_domain_cfg cfg = { |
524 | .type = IOAPIC_DOMAIN_DYNAMIC, |
525 | .ops = &mp_ioapic_irqdomain_ops, |
526 | }; |
527 | |
528 | ioapic = (struct acpi_madt_io_apic *)header; |
529 | |
530 | if (BAD_MADT_ENTRY(ioapic, end)) |
531 | return -EINVAL; |
532 | |
533 | acpi_table_print_madt_entry(madt: &header->common); |
534 | |
535 | /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */ |
536 | if (ioapic->global_irq_base < nr_legacy_irqs()) |
537 | cfg.type = IOAPIC_DOMAIN_LEGACY; |
538 | |
539 | mp_register_ioapic(id: ioapic->id, address: ioapic->address, gsi_base: ioapic->global_irq_base, |
540 | cfg: &cfg); |
541 | |
542 | return 0; |
543 | } |
544 | |
545 | /* |
546 | * Parse Interrupt Source Override for the ACPI SCI |
547 | */ |
548 | static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi) |
549 | { |
550 | if (trigger == 0) /* compatible SCI trigger is level */ |
551 | trigger = 3; |
552 | |
553 | if (polarity == 0) /* compatible SCI polarity is low */ |
554 | polarity = 3; |
555 | |
556 | /* Command-line over-ride via acpi_sci= */ |
557 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
558 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; |
559 | |
560 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
561 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; |
562 | |
563 | if (bus_irq < NR_IRQS_LEGACY) |
564 | mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); |
565 | else |
566 | mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi); |
567 | |
568 | acpi_penalize_sci_irq(irq: bus_irq, trigger, polarity); |
569 | |
570 | /* |
571 | * stash over-ride to indicate we've been here |
572 | * and for later update of acpi_gbl_FADT |
573 | */ |
574 | acpi_sci_override_gsi = gsi; |
575 | return; |
576 | } |
577 | |
578 | static int __init |
579 | acpi_parse_int_src_ovr(union acpi_subtable_headers * , |
580 | const unsigned long end) |
581 | { |
582 | struct acpi_madt_interrupt_override *intsrc = NULL; |
583 | |
584 | intsrc = (struct acpi_madt_interrupt_override *)header; |
585 | |
586 | if (BAD_MADT_ENTRY(intsrc, end)) |
587 | return -EINVAL; |
588 | |
589 | acpi_table_print_madt_entry(madt: &header->common); |
590 | |
591 | if (intsrc->source_irq < NR_IRQS_LEGACY) |
592 | acpi_int_src_ovr[intsrc->source_irq] = true; |
593 | |
594 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
595 | acpi_sci_ioapic_setup(bus_irq: intsrc->source_irq, |
596 | polarity: intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
597 | trigger: (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, |
598 | gsi: intsrc->global_irq); |
599 | return 0; |
600 | } |
601 | |
602 | if (intsrc->source_irq == 0) { |
603 | if (acpi_skip_timer_override) { |
604 | pr_warn("BIOS IRQ0 override ignored.\n" ); |
605 | return 0; |
606 | } |
607 | |
608 | if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity |
609 | && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { |
610 | intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; |
611 | pr_warn("BIOS IRQ0 pin2 override: forcing polarity to high active.\n" ); |
612 | } |
613 | } |
614 | |
615 | mp_override_legacy_irq(bus_irq: intsrc->source_irq, |
616 | polarity: intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
617 | trigger: (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, |
618 | gsi: intsrc->global_irq); |
619 | |
620 | return 0; |
621 | } |
622 | |
623 | static int __init |
624 | acpi_parse_nmi_src(union acpi_subtable_headers * , const unsigned long end) |
625 | { |
626 | struct acpi_madt_nmi_source *nmi_src = NULL; |
627 | |
628 | nmi_src = (struct acpi_madt_nmi_source *)header; |
629 | |
630 | if (BAD_MADT_ENTRY(nmi_src, end)) |
631 | return -EINVAL; |
632 | |
633 | acpi_table_print_madt_entry(madt: &header->common); |
634 | |
635 | /* TBD: Support nimsrc entries? */ |
636 | |
637 | return 0; |
638 | } |
639 | |
640 | #endif /* CONFIG_X86_IO_APIC */ |
641 | |
642 | /* |
643 | * acpi_pic_sci_set_trigger() |
644 | * |
645 | * use ELCR to set PIC-mode trigger type for SCI |
646 | * |
647 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's |
648 | * it may require Edge Trigger -- use "acpi_sci=edge" |
649 | * |
650 | * Port 0x4d0-4d1 are ELCR1 and ELCR2, the Edge/Level Control Registers |
651 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. |
652 | * ELCR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
653 | * ELCR2 is IRQs 8-15 (IRQ 8, 13 must be 0) |
654 | */ |
655 | |
656 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
657 | { |
658 | unsigned int mask = 1 << irq; |
659 | unsigned int old, new; |
660 | |
661 | /* Real old ELCR mask */ |
662 | old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8); |
663 | |
664 | /* |
665 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
666 | * since we will set it correctly as we enable the PCI irq |
667 | * routing. |
668 | */ |
669 | new = acpi_noirq ? old : 0; |
670 | |
671 | /* |
672 | * Update SCI information in the ELCR, it isn't in the PCI |
673 | * routing tables.. |
674 | */ |
675 | switch (trigger) { |
676 | case 1: /* Edge - clear */ |
677 | new &= ~mask; |
678 | break; |
679 | case 3: /* Level - set */ |
680 | new |= mask; |
681 | break; |
682 | } |
683 | |
684 | if (old == new) |
685 | return; |
686 | |
687 | pr_warn("setting ELCR to %04x (from %04x)\n" , new, old); |
688 | outb(value: new, PIC_ELCR1); |
689 | outb(value: new >> 8, PIC_ELCR2); |
690 | } |
691 | |
692 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) |
693 | { |
694 | int rc, irq, trigger, polarity; |
695 | |
696 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { |
697 | *irqp = gsi; |
698 | return 0; |
699 | } |
700 | |
701 | rc = acpi_get_override_irq(gsi, trigger: &trigger, polarity: &polarity); |
702 | if (rc) |
703 | return rc; |
704 | |
705 | trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; |
706 | polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; |
707 | irq = acpi_register_gsi(NULL, gsi, triggering: trigger, polarity); |
708 | if (irq < 0) |
709 | return irq; |
710 | |
711 | *irqp = irq; |
712 | return 0; |
713 | } |
714 | EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); |
715 | |
716 | int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) |
717 | { |
718 | if (isa_irq < nr_legacy_irqs() && |
719 | isa_irq_to_gsi[isa_irq] != INVALID_ACPI_IRQ) { |
720 | *gsi = isa_irq_to_gsi[isa_irq]; |
721 | return 0; |
722 | } |
723 | |
724 | return -1; |
725 | } |
726 | |
727 | static int acpi_register_gsi_pic(struct device *dev, u32 gsi, |
728 | int trigger, int polarity) |
729 | { |
730 | #ifdef CONFIG_PCI |
731 | /* |
732 | * Make sure all (legacy) PCI IRQs are set as level-triggered. |
733 | */ |
734 | if (trigger == ACPI_LEVEL_SENSITIVE) |
735 | elcr_set_level_irq(irq: gsi); |
736 | #endif |
737 | |
738 | return gsi; |
739 | } |
740 | |
741 | #ifdef CONFIG_X86_LOCAL_APIC |
742 | static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, |
743 | int trigger, int polarity) |
744 | { |
745 | int irq = gsi; |
746 | #ifdef CONFIG_X86_IO_APIC |
747 | int node; |
748 | struct irq_alloc_info info; |
749 | |
750 | node = dev ? dev_to_node(dev) : NUMA_NO_NODE; |
751 | trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; |
752 | polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; |
753 | ioapic_set_alloc_attr(info: &info, node, trigger, polarity); |
754 | |
755 | mutex_lock(&acpi_ioapic_lock); |
756 | irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, info: &info); |
757 | /* Don't set up the ACPI SCI because it's already set up */ |
758 | if (irq >= 0 && enable_update_mptable && gsi != acpi_gbl_FADT.sci_interrupt) |
759 | mp_config_acpi_gsi(dev, gsi, trigger, polarity); |
760 | mutex_unlock(lock: &acpi_ioapic_lock); |
761 | #endif |
762 | |
763 | return irq; |
764 | } |
765 | |
766 | static void acpi_unregister_gsi_ioapic(u32 gsi) |
767 | { |
768 | #ifdef CONFIG_X86_IO_APIC |
769 | int irq; |
770 | |
771 | mutex_lock(&acpi_ioapic_lock); |
772 | irq = mp_map_gsi_to_irq(gsi, flags: 0, NULL); |
773 | if (irq > 0) |
774 | mp_unmap_irq(irq); |
775 | mutex_unlock(lock: &acpi_ioapic_lock); |
776 | #endif |
777 | } |
778 | #endif |
779 | |
780 | int (*__acpi_register_gsi)(struct device *dev, u32 gsi, |
781 | int trigger, int polarity) = acpi_register_gsi_pic; |
782 | void (*__acpi_unregister_gsi)(u32 gsi) = NULL; |
783 | |
784 | #ifdef CONFIG_ACPI_SLEEP |
785 | int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel; |
786 | #else |
787 | int (*acpi_suspend_lowlevel)(void); |
788 | #endif |
789 | |
790 | /* |
791 | * success: return IRQ number (>=0) |
792 | * failure: return < 0 |
793 | */ |
794 | int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) |
795 | { |
796 | return __acpi_register_gsi(dev, gsi, trigger, polarity); |
797 | } |
798 | EXPORT_SYMBOL_GPL(acpi_register_gsi); |
799 | |
800 | void acpi_unregister_gsi(u32 gsi) |
801 | { |
802 | if (__acpi_unregister_gsi) |
803 | __acpi_unregister_gsi(gsi); |
804 | } |
805 | EXPORT_SYMBOL_GPL(acpi_unregister_gsi); |
806 | |
807 | #ifdef CONFIG_X86_LOCAL_APIC |
808 | static void __init acpi_set_irq_model_ioapic(void) |
809 | { |
810 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; |
811 | __acpi_register_gsi = acpi_register_gsi_ioapic; |
812 | __acpi_unregister_gsi = acpi_unregister_gsi_ioapic; |
813 | acpi_ioapic = 1; |
814 | } |
815 | #endif |
816 | |
817 | /* |
818 | * ACPI based hotplug support for CPU |
819 | */ |
820 | #ifdef CONFIG_ACPI_HOTPLUG_CPU |
821 | #include <acpi/processor.h> |
822 | |
823 | static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) |
824 | { |
825 | #ifdef CONFIG_ACPI_NUMA |
826 | int nid; |
827 | |
828 | nid = acpi_get_node(handle); |
829 | if (nid != NUMA_NO_NODE) { |
830 | set_apicid_to_node(apicid: physid, node: nid); |
831 | numa_set_node(cpu, node: nid); |
832 | } |
833 | #endif |
834 | return 0; |
835 | } |
836 | |
837 | int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, |
838 | int *pcpu) |
839 | { |
840 | int cpu; |
841 | |
842 | cpu = acpi_register_lapic(id: physid, acpiid: acpi_id, ACPI_MADT_ENABLED); |
843 | if (cpu < 0) { |
844 | pr_info("Unable to map lapic to logical cpu number\n" ); |
845 | return cpu; |
846 | } |
847 | |
848 | acpi_processor_set_pdc(handle); |
849 | acpi_map_cpu2node(handle, cpu, physid); |
850 | |
851 | *pcpu = cpu; |
852 | return 0; |
853 | } |
854 | EXPORT_SYMBOL(acpi_map_cpu); |
855 | |
856 | int acpi_unmap_cpu(int cpu) |
857 | { |
858 | #ifdef CONFIG_ACPI_NUMA |
859 | set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE); |
860 | #endif |
861 | |
862 | per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID; |
863 | set_cpu_present(cpu, present: false); |
864 | num_processors--; |
865 | |
866 | return (0); |
867 | } |
868 | EXPORT_SYMBOL(acpi_unmap_cpu); |
869 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
870 | |
871 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
872 | { |
873 | int ret = -ENOSYS; |
874 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
875 | int ioapic_id; |
876 | u64 addr; |
877 | struct ioapic_domain_cfg cfg = { |
878 | .type = IOAPIC_DOMAIN_DYNAMIC, |
879 | .ops = &mp_ioapic_irqdomain_ops, |
880 | }; |
881 | |
882 | ioapic_id = acpi_get_ioapic_id(handle, gsi_base, phys_addr: &addr); |
883 | if (ioapic_id < 0) { |
884 | unsigned long long uid; |
885 | acpi_status status; |
886 | |
887 | status = acpi_evaluate_integer(handle, METHOD_NAME__UID, |
888 | NULL, data: &uid); |
889 | if (ACPI_FAILURE(status)) { |
890 | acpi_handle_warn(handle, "failed to get IOAPIC ID.\n" ); |
891 | return -EINVAL; |
892 | } |
893 | ioapic_id = (int)uid; |
894 | } |
895 | |
896 | mutex_lock(&acpi_ioapic_lock); |
897 | ret = mp_register_ioapic(id: ioapic_id, address: phys_addr, gsi_base, cfg: &cfg); |
898 | mutex_unlock(lock: &acpi_ioapic_lock); |
899 | #endif |
900 | |
901 | return ret; |
902 | } |
903 | EXPORT_SYMBOL(acpi_register_ioapic); |
904 | |
905 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
906 | { |
907 | int ret = -ENOSYS; |
908 | |
909 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
910 | mutex_lock(&acpi_ioapic_lock); |
911 | ret = mp_unregister_ioapic(gsi_base); |
912 | mutex_unlock(lock: &acpi_ioapic_lock); |
913 | #endif |
914 | |
915 | return ret; |
916 | } |
917 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
918 | |
919 | /** |
920 | * acpi_ioapic_registered - Check whether IOAPIC associated with @gsi_base |
921 | * has been registered |
922 | * @handle: ACPI handle of the IOAPIC device |
923 | * @gsi_base: GSI base associated with the IOAPIC |
924 | * |
925 | * Assume caller holds some type of lock to serialize acpi_ioapic_registered() |
926 | * with acpi_register_ioapic()/acpi_unregister_ioapic(). |
927 | */ |
928 | int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base) |
929 | { |
930 | int ret = 0; |
931 | |
932 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
933 | mutex_lock(&acpi_ioapic_lock); |
934 | ret = mp_ioapic_registered(gsi_base); |
935 | mutex_unlock(lock: &acpi_ioapic_lock); |
936 | #endif |
937 | |
938 | return ret; |
939 | } |
940 | |
941 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
942 | { |
943 | struct acpi_table_boot *sb = (struct acpi_table_boot *)table; |
944 | |
945 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
946 | |
947 | return 0; |
948 | } |
949 | |
950 | #ifdef CONFIG_HPET_TIMER |
951 | #include <asm/hpet.h> |
952 | |
953 | static struct resource *hpet_res __initdata; |
954 | |
955 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
956 | { |
957 | struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table; |
958 | |
959 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
960 | pr_warn("HPET timers must be located in memory.\n" ); |
961 | return -1; |
962 | } |
963 | |
964 | hpet_address = hpet_tbl->address.address; |
965 | hpet_blockid = hpet_tbl->sequence; |
966 | |
967 | /* |
968 | * Some broken BIOSes advertise HPET at 0x0. We really do not |
969 | * want to allocate a resource there. |
970 | */ |
971 | if (!hpet_address) { |
972 | pr_warn("HPET id: %#x base: %#lx is invalid\n" , hpet_tbl->id, hpet_address); |
973 | return 0; |
974 | } |
975 | #ifdef CONFIG_X86_64 |
976 | /* |
977 | * Some even more broken BIOSes advertise HPET at |
978 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add |
979 | * some noise: |
980 | */ |
981 | if (hpet_address == 0xfed0000000000000UL) { |
982 | if (!hpet_force_user) { |
983 | pr_warn("HPET id: %#x base: 0xfed0000000000000 is bogus, try hpet=force on the kernel command line to fix it up to 0xfed00000.\n" , |
984 | hpet_tbl->id); |
985 | hpet_address = 0; |
986 | return 0; |
987 | } |
988 | pr_warn("HPET id: %#x base: 0xfed0000000000000 fixed up to 0xfed00000.\n" , |
989 | hpet_tbl->id); |
990 | hpet_address >>= 32; |
991 | } |
992 | #endif |
993 | pr_info("HPET id: %#x base: %#lx\n" , hpet_tbl->id, hpet_address); |
994 | |
995 | /* |
996 | * Allocate and initialize the HPET firmware resource for adding into |
997 | * the resource tree during the lateinit timeframe. |
998 | */ |
999 | #define HPET_RESOURCE_NAME_SIZE 9 |
1000 | hpet_res = memblock_alloc(size: sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE, |
1001 | SMP_CACHE_BYTES); |
1002 | if (!hpet_res) |
1003 | panic(fmt: "%s: Failed to allocate %zu bytes\n" , __func__, |
1004 | sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); |
1005 | |
1006 | hpet_res->name = (void *)&hpet_res[1]; |
1007 | hpet_res->flags = IORESOURCE_MEM; |
1008 | snprintf(buf: (char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, fmt: "HPET %u" , |
1009 | hpet_tbl->sequence); |
1010 | |
1011 | hpet_res->start = hpet_address; |
1012 | hpet_res->end = hpet_address + (1 * 1024) - 1; |
1013 | |
1014 | return 0; |
1015 | } |
1016 | |
1017 | /* |
1018 | * hpet_insert_resource inserts the HPET resources used into the resource |
1019 | * tree. |
1020 | */ |
1021 | static __init int hpet_insert_resource(void) |
1022 | { |
1023 | if (!hpet_res) |
1024 | return 1; |
1025 | |
1026 | return insert_resource(parent: &iomem_resource, new: hpet_res); |
1027 | } |
1028 | |
1029 | late_initcall(hpet_insert_resource); |
1030 | |
1031 | #else |
1032 | #define acpi_parse_hpet NULL |
1033 | #endif |
1034 | |
1035 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1036 | { |
1037 | if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_LEGACY_DEVICES)) { |
1038 | pr_debug("no legacy devices present\n" ); |
1039 | x86_platform.legacy.devices.pnpbios = 0; |
1040 | } |
1041 | |
1042 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && |
1043 | !(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042) && |
1044 | x86_platform.legacy.i8042 != X86_LEGACY_I8042_PLATFORM_ABSENT) { |
1045 | pr_debug("i8042 controller is absent\n" ); |
1046 | x86_platform.legacy.i8042 = X86_LEGACY_I8042_FIRMWARE_ABSENT; |
1047 | } |
1048 | |
1049 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) { |
1050 | pr_debug("not registering RTC platform device\n" ); |
1051 | x86_platform.legacy.rtc = 0; |
1052 | } |
1053 | |
1054 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_VGA) { |
1055 | pr_debug("probing for VGA not safe\n" ); |
1056 | x86_platform.legacy.no_vga = 1; |
1057 | } |
1058 | |
1059 | #ifdef CONFIG_X86_PM_TIMER |
1060 | /* detect the location of the ACPI PM Timer */ |
1061 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1062 | /* FADT rev. 2 */ |
1063 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
1064 | ACPI_ADR_SPACE_SYSTEM_IO) |
1065 | return 0; |
1066 | |
1067 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
1068 | /* |
1069 | * "X" fields are optional extensions to the original V1.0 |
1070 | * fields, so we must selectively expand V1.0 fields if the |
1071 | * corresponding X field is zero. |
1072 | */ |
1073 | if (!pmtmr_ioport) |
1074 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1075 | } else { |
1076 | /* FADT rev. 1 */ |
1077 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1078 | } |
1079 | if (pmtmr_ioport) |
1080 | pr_info("PM-Timer IO Port: %#x\n" , pmtmr_ioport); |
1081 | #endif |
1082 | return 0; |
1083 | } |
1084 | |
1085 | #ifdef CONFIG_X86_LOCAL_APIC |
1086 | /* |
1087 | * Parse LAPIC entries in MADT |
1088 | * returns 0 on success, < 0 on error |
1089 | */ |
1090 | |
1091 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
1092 | { |
1093 | int count; |
1094 | |
1095 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
1096 | return -ENODEV; |
1097 | |
1098 | /* |
1099 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
1100 | * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value). |
1101 | */ |
1102 | |
1103 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
1104 | handler: acpi_parse_lapic_addr_ovr, max_entries: 0); |
1105 | if (count < 0) { |
1106 | pr_err("Error parsing LAPIC address override entry\n" ); |
1107 | return count; |
1108 | } |
1109 | |
1110 | register_lapic_address(address: acpi_lapic_addr); |
1111 | |
1112 | return count; |
1113 | } |
1114 | |
1115 | static int __init acpi_parse_madt_lapic_entries(void) |
1116 | { |
1117 | int count; |
1118 | int x2count = 0; |
1119 | int ret; |
1120 | struct acpi_subtable_proc madt_proc[2]; |
1121 | |
1122 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
1123 | return -ENODEV; |
1124 | |
1125 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_SAPIC, |
1126 | handler: acpi_parse_sapic, MAX_LOCAL_APIC); |
1127 | |
1128 | if (!count) { |
1129 | memset(madt_proc, 0, sizeof(madt_proc)); |
1130 | madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC; |
1131 | madt_proc[0].handler = acpi_parse_lapic; |
1132 | madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC; |
1133 | madt_proc[1].handler = acpi_parse_x2apic; |
1134 | ret = acpi_table_parse_entries_array(ACPI_SIG_MADT, |
1135 | table_size: sizeof(struct acpi_table_madt), |
1136 | proc: madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC); |
1137 | if (ret < 0) { |
1138 | pr_err("Error parsing LAPIC/X2APIC entries\n" ); |
1139 | return ret; |
1140 | } |
1141 | |
1142 | count = madt_proc[0].count; |
1143 | x2count = madt_proc[1].count; |
1144 | } |
1145 | if (!count && !x2count) { |
1146 | pr_err("No LAPIC entries present\n" ); |
1147 | /* TBD: Cleanup to allow fallback to MPS */ |
1148 | return -ENODEV; |
1149 | } else if (count < 0 || x2count < 0) { |
1150 | pr_err("Error parsing LAPIC entry\n" ); |
1151 | /* TBD: Cleanup to allow fallback to MPS */ |
1152 | return count; |
1153 | } |
1154 | |
1155 | x2count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_X2APIC_NMI, |
1156 | handler: acpi_parse_x2apic_nmi, max_entries: 0); |
1157 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_LOCAL_APIC_NMI, |
1158 | handler: acpi_parse_lapic_nmi, max_entries: 0); |
1159 | if (count < 0 || x2count < 0) { |
1160 | pr_err("Error parsing LAPIC NMI entry\n" ); |
1161 | /* TBD: Cleanup to allow fallback to MPS */ |
1162 | return count; |
1163 | } |
1164 | return 0; |
1165 | } |
1166 | |
1167 | #ifdef CONFIG_X86_64 |
1168 | static int __init acpi_parse_mp_wake(union acpi_subtable_headers *, |
1169 | const unsigned long end) |
1170 | { |
1171 | struct acpi_madt_multiproc_wakeup *mp_wake; |
1172 | |
1173 | if (!IS_ENABLED(CONFIG_SMP)) |
1174 | return -ENODEV; |
1175 | |
1176 | mp_wake = (struct acpi_madt_multiproc_wakeup *)header; |
1177 | if (BAD_MADT_ENTRY(mp_wake, end)) |
1178 | return -EINVAL; |
1179 | |
1180 | acpi_table_print_madt_entry(madt: &header->common); |
1181 | |
1182 | acpi_mp_wake_mailbox_paddr = mp_wake->base_address; |
1183 | |
1184 | apic_update_callback(wakeup_secondary_cpu_64, acpi_wakeup_cpu); |
1185 | |
1186 | return 0; |
1187 | } |
1188 | #endif /* CONFIG_X86_64 */ |
1189 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1190 | |
1191 | #ifdef CONFIG_X86_IO_APIC |
1192 | static void __init mp_config_acpi_legacy_irqs(void) |
1193 | { |
1194 | int i; |
1195 | struct mpc_intsrc mp_irq; |
1196 | |
1197 | #ifdef CONFIG_EISA |
1198 | /* |
1199 | * Fabricate the legacy ISA bus (bus #31). |
1200 | */ |
1201 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; |
1202 | #endif |
1203 | set_bit(MP_ISA_BUS, addr: mp_bus_not_pci); |
1204 | pr_debug("Bus #%d is ISA (nIRQs: %d)\n" , MP_ISA_BUS, nr_legacy_irqs()); |
1205 | |
1206 | /* |
1207 | * Use the default configuration for the IRQs 0-15. Unless |
1208 | * overridden by (MADT) interrupt source override entries. |
1209 | */ |
1210 | for (i = 0; i < nr_legacy_irqs(); i++) { |
1211 | int ioapic, pin; |
1212 | unsigned int dstapic; |
1213 | int idx; |
1214 | u32 gsi; |
1215 | |
1216 | /* Locate the gsi that irq i maps to. */ |
1217 | if (acpi_isa_irq_to_gsi(isa_irq: i, gsi: &gsi)) |
1218 | continue; |
1219 | |
1220 | /* |
1221 | * Locate the IOAPIC that manages the ISA IRQ. |
1222 | */ |
1223 | ioapic = mp_find_ioapic(gsi); |
1224 | if (ioapic < 0) |
1225 | continue; |
1226 | pin = mp_find_ioapic_pin(ioapic, gsi); |
1227 | dstapic = mpc_ioapic_id(ioapic); |
1228 | |
1229 | for (idx = 0; idx < mp_irq_entries; idx++) { |
1230 | struct mpc_intsrc *irq = mp_irqs + idx; |
1231 | |
1232 | /* Do we already have a mapping for this ISA IRQ? */ |
1233 | if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) |
1234 | break; |
1235 | |
1236 | /* Do we already have a mapping for this IOAPIC pin */ |
1237 | if (irq->dstapic == dstapic && irq->dstirq == pin) |
1238 | break; |
1239 | } |
1240 | |
1241 | if (idx != mp_irq_entries) { |
1242 | pr_debug("ACPI: IRQ%d used by override.\n" , i); |
1243 | continue; /* IRQ already used */ |
1244 | } |
1245 | |
1246 | mp_irq.type = MP_INTSRC; |
1247 | mp_irq.irqflag = 0; /* Conforming */ |
1248 | mp_irq.srcbus = MP_ISA_BUS; |
1249 | mp_irq.dstapic = dstapic; |
1250 | mp_irq.irqtype = mp_INT; |
1251 | mp_irq.srcbusirq = i; /* Identity mapped */ |
1252 | mp_irq.dstirq = pin; |
1253 | |
1254 | mp_save_irq(m: &mp_irq); |
1255 | } |
1256 | } |
1257 | |
1258 | /* |
1259 | * Parse IOAPIC related entries in MADT |
1260 | * returns 0 on success, < 0 on error |
1261 | */ |
1262 | static int __init acpi_parse_madt_ioapic_entries(void) |
1263 | { |
1264 | int count; |
1265 | |
1266 | /* |
1267 | * ACPI interpreter is required to complete interrupt setup, |
1268 | * so if it is off, don't enumerate the io-apics with ACPI. |
1269 | * If MPS is present, it will handle them, |
1270 | * otherwise the system will stay in PIC mode |
1271 | */ |
1272 | if (acpi_disabled || acpi_noirq) |
1273 | return -ENODEV; |
1274 | |
1275 | if (!boot_cpu_has(X86_FEATURE_APIC)) |
1276 | return -ENODEV; |
1277 | |
1278 | /* |
1279 | * if "noapic" boot option, don't look for IO-APICs |
1280 | */ |
1281 | if (ioapic_is_disabled) { |
1282 | pr_info("Skipping IOAPIC probe due to 'noapic' option.\n" ); |
1283 | return -ENODEV; |
1284 | } |
1285 | |
1286 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_IO_APIC, handler: acpi_parse_ioapic, |
1287 | MAX_IO_APICS); |
1288 | if (!count) { |
1289 | pr_err("No IOAPIC entries present\n" ); |
1290 | return -ENODEV; |
1291 | } else if (count < 0) { |
1292 | pr_err("Error parsing IOAPIC entry\n" ); |
1293 | return count; |
1294 | } |
1295 | |
1296 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, |
1297 | handler: acpi_parse_int_src_ovr, max_entries: nr_irqs); |
1298 | if (count < 0) { |
1299 | pr_err("Error parsing interrupt source overrides entry\n" ); |
1300 | /* TBD: Cleanup to allow fallback to MPS */ |
1301 | return count; |
1302 | } |
1303 | |
1304 | /* |
1305 | * If BIOS did not supply an INT_SRC_OVR for the SCI |
1306 | * pretend we got one so we can set the SCI flags. |
1307 | * But ignore setting up SCI on hardware reduced platforms. |
1308 | */ |
1309 | if (acpi_sci_override_gsi == INVALID_ACPI_IRQ && !acpi_gbl_reduced_hardware) |
1310 | acpi_sci_ioapic_setup(bus_irq: acpi_gbl_FADT.sci_interrupt, polarity: 0, trigger: 0, |
1311 | gsi: acpi_gbl_FADT.sci_interrupt); |
1312 | |
1313 | /* Fill in identity legacy mappings where no override */ |
1314 | mp_config_acpi_legacy_irqs(); |
1315 | |
1316 | count = acpi_table_parse_madt(id: ACPI_MADT_TYPE_NMI_SOURCE, |
1317 | handler: acpi_parse_nmi_src, max_entries: nr_irqs); |
1318 | if (count < 0) { |
1319 | pr_err("Error parsing NMI SRC entry\n" ); |
1320 | /* TBD: Cleanup to allow fallback to MPS */ |
1321 | return count; |
1322 | } |
1323 | |
1324 | return 0; |
1325 | } |
1326 | #else |
1327 | static inline int acpi_parse_madt_ioapic_entries(void) |
1328 | { |
1329 | return -1; |
1330 | } |
1331 | #endif /* !CONFIG_X86_IO_APIC */ |
1332 | |
1333 | static void __init early_acpi_process_madt(void) |
1334 | { |
1335 | #ifdef CONFIG_X86_LOCAL_APIC |
1336 | int error; |
1337 | |
1338 | if (!acpi_table_parse(ACPI_SIG_MADT, handler: acpi_parse_madt)) { |
1339 | |
1340 | /* |
1341 | * Parse MADT LAPIC entries |
1342 | */ |
1343 | error = early_acpi_parse_madt_lapic_addr_ovr(); |
1344 | if (!error) { |
1345 | acpi_lapic = 1; |
1346 | smp_found_config = 1; |
1347 | } |
1348 | if (error == -EINVAL) { |
1349 | /* |
1350 | * Dell Precision Workstation 410, 610 come here. |
1351 | */ |
1352 | pr_err("Invalid BIOS MADT, disabling ACPI\n" ); |
1353 | disable_acpi(); |
1354 | } |
1355 | } |
1356 | #endif |
1357 | } |
1358 | |
1359 | static void __init acpi_process_madt(void) |
1360 | { |
1361 | #ifdef CONFIG_X86_LOCAL_APIC |
1362 | int error; |
1363 | |
1364 | if (!acpi_table_parse(ACPI_SIG_MADT, handler: acpi_parse_madt)) { |
1365 | |
1366 | /* |
1367 | * Parse MADT LAPIC entries |
1368 | */ |
1369 | error = acpi_parse_madt_lapic_entries(); |
1370 | if (!error) { |
1371 | acpi_lapic = 1; |
1372 | |
1373 | /* |
1374 | * Parse MADT IO-APIC entries |
1375 | */ |
1376 | mutex_lock(&acpi_ioapic_lock); |
1377 | error = acpi_parse_madt_ioapic_entries(); |
1378 | mutex_unlock(lock: &acpi_ioapic_lock); |
1379 | if (!error) { |
1380 | acpi_set_irq_model_ioapic(); |
1381 | |
1382 | smp_found_config = 1; |
1383 | } |
1384 | |
1385 | #ifdef CONFIG_X86_64 |
1386 | /* |
1387 | * Parse MADT MP Wake entry. |
1388 | */ |
1389 | acpi_table_parse_madt(id: ACPI_MADT_TYPE_MULTIPROC_WAKEUP, |
1390 | handler: acpi_parse_mp_wake, max_entries: 1); |
1391 | #endif |
1392 | } |
1393 | if (error == -EINVAL) { |
1394 | /* |
1395 | * Dell Precision Workstation 410, 610 come here. |
1396 | */ |
1397 | pr_err("Invalid BIOS MADT, disabling ACPI\n" ); |
1398 | disable_acpi(); |
1399 | } |
1400 | } else { |
1401 | /* |
1402 | * ACPI found no MADT, and so ACPI wants UP PIC mode. |
1403 | * In the event an MPS table was found, forget it. |
1404 | * Boot with "acpi=off" to use MPS on such a system. |
1405 | */ |
1406 | if (smp_found_config) { |
1407 | pr_warn("No APIC-table, disabling MPS\n" ); |
1408 | smp_found_config = 0; |
1409 | } |
1410 | } |
1411 | |
1412 | /* |
1413 | * ACPI supports both logical (e.g. Hyper-Threading) and physical |
1414 | * processors, where MPS only supports physical. |
1415 | */ |
1416 | if (acpi_lapic && acpi_ioapic) |
1417 | pr_info("Using ACPI (MADT) for SMP configuration information\n" ); |
1418 | else if (acpi_lapic) |
1419 | pr_info("Using ACPI for processor (LAPIC) configuration information\n" ); |
1420 | #endif |
1421 | return; |
1422 | } |
1423 | |
1424 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
1425 | { |
1426 | if (!acpi_force) { |
1427 | pr_notice("%s detected: force use of acpi=noirq\n" , d->ident); |
1428 | acpi_noirq_set(); |
1429 | } |
1430 | return 0; |
1431 | } |
1432 | |
1433 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
1434 | { |
1435 | if (!acpi_force) { |
1436 | pr_notice("%s detected: force use of pci=noacpi\n" , d->ident); |
1437 | acpi_disable_pci(); |
1438 | } |
1439 | return 0; |
1440 | } |
1441 | |
1442 | static int __init disable_acpi_xsdt(const struct dmi_system_id *d) |
1443 | { |
1444 | if (!acpi_force) { |
1445 | pr_notice("%s detected: force use of acpi=rsdt\n" , d->ident); |
1446 | acpi_gbl_do_not_use_xsdt = TRUE; |
1447 | } else { |
1448 | pr_notice("Warning: DMI blacklist says broken, but acpi XSDT forced\n" ); |
1449 | } |
1450 | return 0; |
1451 | } |
1452 | |
1453 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
1454 | { |
1455 | if (!acpi_force) { |
1456 | pr_notice("%s detected: acpi off\n" , d->ident); |
1457 | disable_acpi(); |
1458 | } else { |
1459 | pr_notice("Warning: DMI blacklist says broken, but acpi forced\n" ); |
1460 | } |
1461 | return 0; |
1462 | } |
1463 | |
1464 | /* |
1465 | * Force ignoring BIOS IRQ0 override |
1466 | */ |
1467 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) |
1468 | { |
1469 | if (!acpi_skip_timer_override) { |
1470 | pr_notice("%s detected: Ignoring BIOS IRQ0 override\n" , |
1471 | d->ident); |
1472 | acpi_skip_timer_override = 1; |
1473 | } |
1474 | return 0; |
1475 | } |
1476 | |
1477 | /* |
1478 | * ACPI offers an alternative platform interface model that removes |
1479 | * ACPI hardware requirements for platforms that do not implement |
1480 | * the PC Architecture. |
1481 | * |
1482 | * We initialize the Hardware-reduced ACPI model here: |
1483 | */ |
1484 | void __init acpi_generic_reduced_hw_init(void) |
1485 | { |
1486 | /* |
1487 | * Override x86_init functions and bypass legacy PIC in |
1488 | * hardware reduced ACPI mode. |
1489 | */ |
1490 | x86_init.timers.timer_init = x86_init_noop; |
1491 | x86_init.irqs.pre_vector_init = x86_init_noop; |
1492 | legacy_pic = &null_legacy_pic; |
1493 | } |
1494 | |
1495 | static void __init acpi_reduced_hw_init(void) |
1496 | { |
1497 | if (acpi_gbl_reduced_hardware) |
1498 | x86_init.acpi.reduced_hw_early_init(); |
1499 | } |
1500 | |
1501 | /* |
1502 | * If your system is blacklisted here, but you find that acpi=force |
1503 | * works for you, please contact linux-acpi@vger.kernel.org |
1504 | */ |
1505 | static const struct dmi_system_id acpi_dmi_table[] __initconst = { |
1506 | /* |
1507 | * Boxes that need ACPI disabled |
1508 | */ |
1509 | { |
1510 | .callback = dmi_disable_acpi, |
1511 | .ident = "IBM Thinkpad" , |
1512 | .matches = { |
1513 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM" ), |
1514 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G" ), |
1515 | }, |
1516 | }, |
1517 | |
1518 | /* |
1519 | * Boxes that need ACPI PCI IRQ routing disabled |
1520 | */ |
1521 | { |
1522 | .callback = disable_acpi_irq, |
1523 | .ident = "ASUS A7V" , |
1524 | .matches = { |
1525 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC" ), |
1526 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>" ), |
1527 | /* newer BIOS, Revision 1011, does work */ |
1528 | DMI_MATCH(DMI_BIOS_VERSION, |
1529 | "ASUS A7V ACPI BIOS Revision 1007" ), |
1530 | }, |
1531 | }, |
1532 | { |
1533 | /* |
1534 | * Latest BIOS for IBM 600E (1.16) has bad pcinum |
1535 | * for LPC bridge, which is needed for the PCI |
1536 | * interrupt links to work. DSDT fix is in bug 5966. |
1537 | * 2645, 2646 model numbers are shared with 600/600E/600X |
1538 | */ |
1539 | .callback = disable_acpi_irq, |
1540 | .ident = "IBM Thinkpad 600 Series 2645" , |
1541 | .matches = { |
1542 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM" ), |
1543 | DMI_MATCH(DMI_BOARD_NAME, "2645" ), |
1544 | }, |
1545 | }, |
1546 | { |
1547 | .callback = disable_acpi_irq, |
1548 | .ident = "IBM Thinkpad 600 Series 2646" , |
1549 | .matches = { |
1550 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM" ), |
1551 | DMI_MATCH(DMI_BOARD_NAME, "2646" ), |
1552 | }, |
1553 | }, |
1554 | /* |
1555 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled |
1556 | */ |
1557 | { /* _BBN 0 bug */ |
1558 | .callback = disable_acpi_pci, |
1559 | .ident = "ASUS PR-DLS" , |
1560 | .matches = { |
1561 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC." ), |
1562 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS" ), |
1563 | DMI_MATCH(DMI_BIOS_VERSION, |
1564 | "ASUS PR-DLS ACPI BIOS Revision 1010" ), |
1565 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003" ) |
1566 | }, |
1567 | }, |
1568 | { |
1569 | .callback = disable_acpi_pci, |
1570 | .ident = "Acer TravelMate 36x Laptop" , |
1571 | .matches = { |
1572 | DMI_MATCH(DMI_SYS_VENDOR, "Acer" ), |
1573 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360" ), |
1574 | }, |
1575 | }, |
1576 | /* |
1577 | * Boxes that need ACPI XSDT use disabled due to corrupted tables |
1578 | */ |
1579 | { |
1580 | .callback = disable_acpi_xsdt, |
1581 | .ident = "Advantech DAC-BJ01" , |
1582 | .matches = { |
1583 | DMI_MATCH(DMI_SYS_VENDOR, "NEC" ), |
1584 | DMI_MATCH(DMI_PRODUCT_NAME, "Bearlake CRB Board" ), |
1585 | DMI_MATCH(DMI_BIOS_VERSION, "V1.12" ), |
1586 | DMI_MATCH(DMI_BIOS_DATE, "02/01/2011" ), |
1587 | }, |
1588 | }, |
1589 | {} |
1590 | }; |
1591 | |
1592 | /* second table for DMI checks that should run after early-quirks */ |
1593 | static const struct dmi_system_id acpi_dmi_table_late[] __initconst = { |
1594 | /* |
1595 | * HP laptops which use a DSDT reporting as HP/SB400/10000, |
1596 | * which includes some code which overrides all temperature |
1597 | * trip points to 16C if the INTIN2 input of the I/O APIC |
1598 | * is enabled. This input is incorrectly designated the |
1599 | * ISA IRQ 0 via an interrupt source override even though |
1600 | * it is wired to the output of the master 8259A and INTIN0 |
1601 | * is not connected at all. Force ignoring BIOS IRQ0 |
1602 | * override in that cases. |
1603 | */ |
1604 | { |
1605 | .callback = dmi_ignore_irq0_timer_override, |
1606 | .ident = "HP nx6115 laptop" , |
1607 | .matches = { |
1608 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard" ), |
1609 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115" ), |
1610 | }, |
1611 | }, |
1612 | { |
1613 | .callback = dmi_ignore_irq0_timer_override, |
1614 | .ident = "HP NX6125 laptop" , |
1615 | .matches = { |
1616 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard" ), |
1617 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125" ), |
1618 | }, |
1619 | }, |
1620 | { |
1621 | .callback = dmi_ignore_irq0_timer_override, |
1622 | .ident = "HP NX6325 laptop" , |
1623 | .matches = { |
1624 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard" ), |
1625 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325" ), |
1626 | }, |
1627 | }, |
1628 | { |
1629 | .callback = dmi_ignore_irq0_timer_override, |
1630 | .ident = "HP 6715b laptop" , |
1631 | .matches = { |
1632 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard" ), |
1633 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b" ), |
1634 | }, |
1635 | }, |
1636 | { |
1637 | .callback = dmi_ignore_irq0_timer_override, |
1638 | .ident = "FUJITSU SIEMENS" , |
1639 | .matches = { |
1640 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS" ), |
1641 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030" ), |
1642 | }, |
1643 | }, |
1644 | {} |
1645 | }; |
1646 | |
1647 | /* |
1648 | * acpi_boot_table_init() and acpi_boot_init() |
1649 | * called from setup_arch(), always. |
1650 | * 1. checksums all tables |
1651 | * 2. enumerates lapics |
1652 | * 3. enumerates io-apics |
1653 | * |
1654 | * acpi_table_init() is separate to allow reading SRAT without |
1655 | * other side effects. |
1656 | * |
1657 | * side effects of acpi_boot_init: |
1658 | * acpi_lapic = 1 if LAPIC found |
1659 | * acpi_ioapic = 1 if IOAPIC found |
1660 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; |
1661 | * if acpi_blacklisted() acpi_disabled = 1; |
1662 | * acpi_irq_model=... |
1663 | * ... |
1664 | */ |
1665 | |
1666 | void __init acpi_boot_table_init(void) |
1667 | { |
1668 | dmi_check_system(list: acpi_dmi_table); |
1669 | |
1670 | /* |
1671 | * If acpi_disabled, bail out |
1672 | */ |
1673 | if (acpi_disabled) |
1674 | return; |
1675 | |
1676 | /* |
1677 | * Initialize the ACPI boot-time table parser. |
1678 | */ |
1679 | if (acpi_locate_initial_tables()) |
1680 | disable_acpi(); |
1681 | else |
1682 | acpi_reserve_initial_tables(); |
1683 | } |
1684 | |
1685 | int __init early_acpi_boot_init(void) |
1686 | { |
1687 | if (acpi_disabled) |
1688 | return 1; |
1689 | |
1690 | acpi_table_init_complete(); |
1691 | |
1692 | acpi_table_parse(ACPI_SIG_BOOT, handler: acpi_parse_sbf); |
1693 | |
1694 | /* |
1695 | * blacklist may disable ACPI entirely |
1696 | */ |
1697 | if (acpi_blacklisted()) { |
1698 | if (acpi_force) { |
1699 | pr_warn("acpi=force override\n" ); |
1700 | } else { |
1701 | pr_warn("Disabling ACPI support\n" ); |
1702 | disable_acpi(); |
1703 | return 1; |
1704 | } |
1705 | } |
1706 | |
1707 | /* |
1708 | * Process the Multiple APIC Description Table (MADT), if present |
1709 | */ |
1710 | early_acpi_process_madt(); |
1711 | |
1712 | /* |
1713 | * Hardware-reduced ACPI mode initialization: |
1714 | */ |
1715 | acpi_reduced_hw_init(); |
1716 | |
1717 | return 0; |
1718 | } |
1719 | |
1720 | int __init acpi_boot_init(void) |
1721 | { |
1722 | /* those are executed after early-quirks are executed */ |
1723 | dmi_check_system(list: acpi_dmi_table_late); |
1724 | |
1725 | /* |
1726 | * If acpi_disabled, bail out |
1727 | */ |
1728 | if (acpi_disabled) |
1729 | return 1; |
1730 | |
1731 | acpi_table_parse(ACPI_SIG_BOOT, handler: acpi_parse_sbf); |
1732 | |
1733 | /* |
1734 | * set sci_int and PM timer address |
1735 | */ |
1736 | acpi_table_parse(ACPI_SIG_FADT, handler: acpi_parse_fadt); |
1737 | |
1738 | /* |
1739 | * Process the Multiple APIC Description Table (MADT), if present |
1740 | */ |
1741 | acpi_process_madt(); |
1742 | |
1743 | acpi_table_parse(ACPI_SIG_HPET, handler: acpi_parse_hpet); |
1744 | if (IS_ENABLED(CONFIG_ACPI_BGRT) && !acpi_nobgrt) |
1745 | acpi_table_parse(ACPI_SIG_BGRT, handler: acpi_parse_bgrt); |
1746 | |
1747 | if (!acpi_noirq) |
1748 | x86_init.pci.init = pci_acpi_init; |
1749 | |
1750 | /* Do not enable ACPI SPCR console by default */ |
1751 | acpi_parse_spcr(enable_earlycon: earlycon_acpi_spcr_enable, enable_console: false); |
1752 | return 0; |
1753 | } |
1754 | |
1755 | static int __init parse_acpi(char *arg) |
1756 | { |
1757 | if (!arg) |
1758 | return -EINVAL; |
1759 | |
1760 | /* "acpi=off" disables both ACPI table parsing and interpreter */ |
1761 | if (strcmp(arg, "off" ) == 0) { |
1762 | disable_acpi(); |
1763 | } |
1764 | /* acpi=force to over-ride black-list */ |
1765 | else if (strcmp(arg, "force" ) == 0) { |
1766 | acpi_force = 1; |
1767 | acpi_disabled = 0; |
1768 | } |
1769 | /* acpi=strict disables out-of-spec workarounds */ |
1770 | else if (strcmp(arg, "strict" ) == 0) { |
1771 | acpi_strict = 1; |
1772 | } |
1773 | /* acpi=rsdt use RSDT instead of XSDT */ |
1774 | else if (strcmp(arg, "rsdt" ) == 0) { |
1775 | acpi_gbl_do_not_use_xsdt = TRUE; |
1776 | } |
1777 | /* "acpi=noirq" disables ACPI interrupt routing */ |
1778 | else if (strcmp(arg, "noirq" ) == 0) { |
1779 | acpi_noirq_set(); |
1780 | } |
1781 | /* "acpi=copy_dsdt" copies DSDT */ |
1782 | else if (strcmp(arg, "copy_dsdt" ) == 0) { |
1783 | acpi_gbl_copy_dsdt_locally = 1; |
1784 | } |
1785 | /* "acpi=nocmcff" disables FF mode for corrected errors */ |
1786 | else if (strcmp(arg, "nocmcff" ) == 0) { |
1787 | acpi_disable_cmcff = 1; |
1788 | } else { |
1789 | /* Core will printk when we return error. */ |
1790 | return -EINVAL; |
1791 | } |
1792 | return 0; |
1793 | } |
1794 | early_param("acpi" , parse_acpi); |
1795 | |
1796 | static int __init parse_acpi_bgrt(char *arg) |
1797 | { |
1798 | acpi_nobgrt = true; |
1799 | return 0; |
1800 | } |
1801 | early_param("bgrt_disable" , parse_acpi_bgrt); |
1802 | |
1803 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ |
1804 | static int __init parse_pci(char *arg) |
1805 | { |
1806 | if (arg && strcmp(arg, "noacpi" ) == 0) |
1807 | acpi_disable_pci(); |
1808 | return 0; |
1809 | } |
1810 | early_param("pci" , parse_pci); |
1811 | |
1812 | int __init acpi_mps_check(void) |
1813 | { |
1814 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) |
1815 | /* mptable code is not built-in*/ |
1816 | if (acpi_disabled || acpi_noirq) { |
1817 | pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n" ); |
1818 | return 1; |
1819 | } |
1820 | #endif |
1821 | return 0; |
1822 | } |
1823 | |
1824 | #ifdef CONFIG_X86_IO_APIC |
1825 | static int __init parse_acpi_skip_timer_override(char *arg) |
1826 | { |
1827 | acpi_skip_timer_override = 1; |
1828 | return 0; |
1829 | } |
1830 | early_param("acpi_skip_timer_override" , parse_acpi_skip_timer_override); |
1831 | |
1832 | static int __init parse_acpi_use_timer_override(char *arg) |
1833 | { |
1834 | acpi_use_timer_override = 1; |
1835 | return 0; |
1836 | } |
1837 | early_param("acpi_use_timer_override" , parse_acpi_use_timer_override); |
1838 | #endif /* CONFIG_X86_IO_APIC */ |
1839 | |
1840 | static int __init setup_acpi_sci(char *s) |
1841 | { |
1842 | if (!s) |
1843 | return -EINVAL; |
1844 | if (!strcmp(s, "edge" )) |
1845 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1846 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); |
1847 | else if (!strcmp(s, "level" )) |
1848 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1849 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); |
1850 | else if (!strcmp(s, "high" )) |
1851 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1852 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); |
1853 | else if (!strcmp(s, "low" )) |
1854 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1855 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); |
1856 | else |
1857 | return -EINVAL; |
1858 | return 0; |
1859 | } |
1860 | early_param("acpi_sci" , setup_acpi_sci); |
1861 | |
1862 | int __acpi_acquire_global_lock(unsigned int *lock) |
1863 | { |
1864 | unsigned int old, new, val; |
1865 | |
1866 | old = READ_ONCE(*lock); |
1867 | do { |
1868 | val = (old >> 1) & 0x1; |
1869 | new = (old & ~0x3) + 2 + val; |
1870 | } while (!try_cmpxchg(lock, &old, new)); |
1871 | |
1872 | if (val) |
1873 | return 0; |
1874 | |
1875 | return -1; |
1876 | } |
1877 | |
1878 | int __acpi_release_global_lock(unsigned int *lock) |
1879 | { |
1880 | unsigned int old, new; |
1881 | |
1882 | old = READ_ONCE(*lock); |
1883 | do { |
1884 | new = old & ~0x3; |
1885 | } while (!try_cmpxchg(lock, &old, new)); |
1886 | return old & 0x1; |
1887 | } |
1888 | |
1889 | void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size) |
1890 | { |
1891 | e820__range_add(start: addr, size, type: E820_TYPE_NVS); |
1892 | e820__update_table_print(); |
1893 | } |
1894 | |
1895 | void x86_default_set_root_pointer(u64 addr) |
1896 | { |
1897 | boot_params.acpi_rsdp_addr = addr; |
1898 | } |
1899 | |
1900 | u64 x86_default_get_root_pointer(void) |
1901 | { |
1902 | return boot_params.acpi_rsdp_addr; |
1903 | } |
1904 | |