1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
8 */
9
10.text
11#include <linux/export.h>
12#include <linux/threads.h>
13#include <linux/init.h>
14#include <linux/linkage.h>
15#include <asm/segment.h>
16#include <asm/page_types.h>
17#include <asm/pgtable_types.h>
18#include <asm/cache.h>
19#include <asm/thread_info.h>
20#include <asm/asm-offsets.h>
21#include <asm/setup.h>
22#include <asm/processor-flags.h>
23#include <asm/msr-index.h>
24#include <asm/cpufeatures.h>
25#include <asm/percpu.h>
26#include <asm/nops.h>
27#include <asm/nospec-branch.h>
28#include <asm/bootparam.h>
29#include <asm/pgtable_32.h>
30
31/* Physical address */
32#define pa(X) ((X) - __PAGE_OFFSET)
33
34/*
35 * References to members of the new_cpu_data structure.
36 */
37
38#define X86 new_cpu_data+CPUINFO_x86
39#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
40#define X86_MODEL new_cpu_data+CPUINFO_x86_model
41#define X86_STEPPING new_cpu_data+CPUINFO_x86_stepping
42#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
43#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
44#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
45#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
46
47
48#define SIZEOF_PTREGS 17*4
49
50/*
51 * Worst-case size of the kernel mapping we need to make:
52 * a relocatable kernel can live anywhere in lowmem, so we need to be able
53 * to map all of lowmem.
54 */
55KERNEL_PAGES = LOWMEM_PAGES
56
57INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
58RESERVE_BRK(pagetables, INIT_MAP_SIZE)
59
60/*
61 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
62 * %esi points to the real-mode code as a 32-bit pointer.
63 * CS and DS must be 4 GB flat segments, but we don't depend on
64 * any particular GDT layout, because we load our own as soon as we
65 * can.
66 */
67__HEAD
68SYM_CODE_START(startup_32)
69 movl pa(initial_stack),%ecx
70
71/*
72 * Set segments to known values.
73 */
74 lgdt pa(boot_gdt_descr)
75 movl $(__BOOT_DS),%eax
76 movl %eax,%ds
77 movl %eax,%es
78 movl %eax,%fs
79 movl %eax,%gs
80 movl %eax,%ss
81 leal -__PAGE_OFFSET(%ecx),%esp
82
83/*
84 * Clear BSS first so that there are no surprises...
85 */
86 cld
87 xorl %eax,%eax
88 movl $pa(__bss_start),%edi
89 movl $pa(__bss_stop),%ecx
90 subl %edi,%ecx
91 shrl $2,%ecx
92 rep ; stosl
93/*
94 * Copy bootup parameters out of the way.
95 * Note: %esi still has the pointer to the real-mode data.
96 * With the kexec as boot loader, parameter segment might be loaded beyond
97 * kernel image and might not even be addressable by early boot page tables.
98 * (kexec on panic case). Hence copy out the parameters before initializing
99 * page tables.
100 */
101 movl $pa(boot_params),%edi
102 movl $(PARAM_SIZE/4),%ecx
103 cld
104 rep
105 movsl
106 movl pa(boot_params) + NEW_CL_POINTER,%esi
107 andl %esi,%esi
108 jz 1f # No command line
109 movl $pa(boot_command_line),%edi
110 movl $(COMMAND_LINE_SIZE/4),%ecx
111 rep
112 movsl
1131:
114
115#ifdef CONFIG_OLPC
116 /* save OFW's pgdir table for later use when calling into OFW */
117 movl %cr3, %eax
118 movl %eax, pa(olpc_ofw_pgd)
119#endif
120
121 /* Create early pagetables. */
122 call mk_early_pgtbl_32
123
124 /* Do early initialization of the fixmap area */
125 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
126#ifdef CONFIG_X86_PAE
127#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
128 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
129#else
130 movl %eax,pa(initial_page_table+0xffc)
131#endif
132
133 jmp .Ldefault_entry
134SYM_CODE_END(startup_32)
135
136/*
137 * Non-boot CPU entry point; entered from trampoline.S
138 * We can't lgdt here, because lgdt itself uses a data segment, but
139 * we know the trampoline has already loaded the boot_gdt for us.
140 *
141 * If cpu hotplug is not supported then this code can go in init section
142 * which will be freed later
143 */
144SYM_FUNC_START(startup_32_smp)
145 cld
146 movl $(__BOOT_DS),%eax
147 movl %eax,%ds
148 movl %eax,%es
149 movl %eax,%fs
150 movl %eax,%gs
151 movl pa(initial_stack),%ecx
152 movl %eax,%ss
153 leal -__PAGE_OFFSET(%ecx),%esp
154
155.Ldefault_entry:
156 movl $(CR0_STATE & ~X86_CR0_PG),%eax
157 movl %eax,%cr0
158
159/*
160 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
161 * bits like NT set. This would confuse the debugger if this code is traced. So
162 * initialize them properly now before switching to protected mode. That means
163 * DF in particular (even though we have cleared it earlier after copying the
164 * command line) because GCC expects it.
165 */
166 pushl $0
167 popfl
168
169/*
170 * New page tables may be in 4Mbyte page mode and may be using the global pages.
171 *
172 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
173 * if and only if CPUID exists and has flags other than the FPU flag set.
174 */
175 movl $-1,pa(X86_CPUID) # preset CPUID level
176 movl $X86_EFLAGS_ID,%ecx
177 pushl %ecx
178 popfl # set EFLAGS=ID
179 pushfl
180 popl %eax # get EFLAGS
181 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set?
182 jz .Lenable_paging # hw disallowed setting of ID bit
183 # which means no CPUID and no CR4
184
185 xorl %eax,%eax
186 cpuid
187 movl %eax,pa(X86_CPUID) # save largest std CPUID function
188
189 movl $1,%eax
190 cpuid
191 andl $~1,%edx # Ignore CPUID.FPU
192 jz .Lenable_paging # No flags or only CPUID.FPU = no CR4
193
194 movl pa(mmu_cr4_features),%eax
195 movl %eax,%cr4
196
197 testb $X86_CR4_PAE, %al # check if PAE is enabled
198 jz .Lenable_paging
199
200 /* Check if extended functions are implemented */
201 movl $0x80000000, %eax
202 cpuid
203 /* Value must be in the range 0x80000001 to 0x8000ffff */
204 subl $0x80000001, %eax
205 cmpl $(0x8000ffff-0x80000001), %eax
206 ja .Lenable_paging
207
208 /* Clear bogus XD_DISABLE bits */
209 call verify_cpu
210
211 mov $0x80000001, %eax
212 cpuid
213 /* Execute Disable bit supported? */
214 btl $(X86_FEATURE_NX & 31), %edx
215 jnc .Lenable_paging
216
217 /* Setup EFER (Extended Feature Enable Register) */
218 movl $MSR_EFER, %ecx
219 rdmsr
220
221 btsl $_EFER_NX, %eax
222 /* Make changes effective */
223 wrmsr
224
225.Lenable_paging:
226
227/*
228 * Enable paging
229 */
230 movl $pa(initial_page_table), %eax
231 movl %eax,%cr3 /* set the page table pointer.. */
232 movl $CR0_STATE,%eax
233 movl %eax,%cr0 /* ..and set paging (PG) bit */
234 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
2351:
236 /* Shift the stack pointer to a virtual address */
237 addl $__PAGE_OFFSET, %esp
238
239/*
240 * Check if it is 486
241 */
242 movb $4,X86 # at least 486
243 cmpl $-1,X86_CPUID
244 je .Lis486
245
246 /* get vendor info */
247 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
248 cpuid
249 movl %eax,X86_CPUID # save CPUID level
250 movl %ebx,X86_VENDOR_ID # lo 4 chars
251 movl %edx,X86_VENDOR_ID+4 # next 4 chars
252 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
253
254 orl %eax,%eax # do we have processor info as well?
255 je .Lis486
256
257 movl $1,%eax # Use the CPUID instruction to get CPU type
258 cpuid
259 movb %al,%cl # save reg for future use
260 andb $0x0f,%ah # mask processor family
261 movb %ah,X86
262 andb $0xf0,%al # mask model
263 shrb $4,%al
264 movb %al,X86_MODEL
265 andb $0x0f,%cl # mask mask revision
266 movb %cl,X86_STEPPING
267 movl %edx,X86_CAPABILITY
268
269.Lis486:
270 movl $0x50022,%ecx # set AM, WP, NE and MP
271 movl %cr0,%eax
272 andl $0x80000011,%eax # Save PG,PE,ET
273 orl %ecx,%eax
274 movl %eax,%cr0
275
276 lgdt early_gdt_descr
277 ljmp $(__KERNEL_CS),$1f
2781: movl $(__KERNEL_DS),%eax # reload all the segment registers
279 movl %eax,%ss # after changing gdt.
280
281 movl $(__USER_DS),%eax # DS/ES contains default USER segment
282 movl %eax,%ds
283 movl %eax,%es
284
285 movl $(__KERNEL_PERCPU), %eax
286 movl %eax,%fs # set this cpu's percpu
287
288 xorl %eax,%eax
289 movl %eax,%gs # clear possible garbage in %gs
290
291 xorl %eax,%eax # Clear LDT
292 lldt %ax
293
294 call *(initial_code)
2951: jmp 1b
296SYM_FUNC_END(startup_32_smp)
297
298#include "verify_cpu.S"
299
300__INIT
301SYM_FUNC_START(early_idt_handler_array)
302 # 36(%esp) %eflags
303 # 32(%esp) %cs
304 # 28(%esp) %eip
305 # 24(%rsp) error code
306 i = 0
307 .rept NUM_EXCEPTION_VECTORS
308 .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0
309 pushl $0 # Dummy error code, to make stack frame uniform
310 .endif
311 pushl $i # 20(%esp) Vector number
312 jmp early_idt_handler_common
313 i = i + 1
314 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
315 .endr
316SYM_FUNC_END(early_idt_handler_array)
317
318SYM_CODE_START_LOCAL(early_idt_handler_common)
319 /*
320 * The stack is the hardware frame, an error code or zero, and the
321 * vector number.
322 */
323 cld
324
325 incl %ss:early_recursion_flag
326
327 /* The vector number is in pt_regs->gs */
328
329 cld
330 pushl %fs /* pt_regs->fs (__fsh varies by model) */
331 pushl %es /* pt_regs->es (__esh varies by model) */
332 pushl %ds /* pt_regs->ds (__dsh varies by model) */
333 pushl %eax /* pt_regs->ax */
334 pushl %ebp /* pt_regs->bp */
335 pushl %edi /* pt_regs->di */
336 pushl %esi /* pt_regs->si */
337 pushl %edx /* pt_regs->dx */
338 pushl %ecx /* pt_regs->cx */
339 pushl %ebx /* pt_regs->bx */
340
341 /* Fix up DS and ES */
342 movl $(__KERNEL_DS), %ecx
343 movl %ecx, %ds
344 movl %ecx, %es
345
346 /* Load the vector number into EDX */
347 movl PT_GS(%esp), %edx
348
349 /* Load GS into pt_regs->gs (and maybe clobber __gsh) */
350 movw %gs, PT_GS(%esp)
351
352 movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */
353 call early_fixup_exception
354
355 popl %ebx /* pt_regs->bx */
356 popl %ecx /* pt_regs->cx */
357 popl %edx /* pt_regs->dx */
358 popl %esi /* pt_regs->si */
359 popl %edi /* pt_regs->di */
360 popl %ebp /* pt_regs->bp */
361 popl %eax /* pt_regs->ax */
362 popl %ds /* pt_regs->ds (always ignores __dsh) */
363 popl %es /* pt_regs->es (always ignores __esh) */
364 popl %fs /* pt_regs->fs (always ignores __fsh) */
365 popl %gs /* pt_regs->gs (always ignores __gsh) */
366 decl %ss:early_recursion_flag
367 addl $4, %esp /* pop pt_regs->orig_ax */
368 iret
369SYM_CODE_END(early_idt_handler_common)
370
371/* This is the default interrupt "handler" :-) */
372SYM_FUNC_START(early_ignore_irq)
373 cld
374#ifdef CONFIG_PRINTK
375 pushl %eax
376 pushl %ecx
377 pushl %edx
378 pushl %es
379 pushl %ds
380 movl $(__KERNEL_DS),%eax
381 movl %eax,%ds
382 movl %eax,%es
383 cmpl $2,early_recursion_flag
384 je hlt_loop
385 incl early_recursion_flag
386 pushl 16(%esp)
387 pushl 24(%esp)
388 pushl 32(%esp)
389 pushl 40(%esp)
390 pushl $int_msg
391 call _printk
392
393 call dump_stack
394
395 addl $(5*4),%esp
396 popl %ds
397 popl %es
398 popl %edx
399 popl %ecx
400 popl %eax
401#endif
402 iret
403
404hlt_loop:
405 hlt
406 jmp hlt_loop
407SYM_FUNC_END(early_ignore_irq)
408
409__INITDATA
410 .align 4
411SYM_DATA(early_recursion_flag, .long 0)
412
413__REFDATA
414 .align 4
415SYM_DATA(initial_code, .long i386_start_kernel)
416
417#ifdef CONFIG_PAGE_TABLE_ISOLATION
418#define PGD_ALIGN (2 * PAGE_SIZE)
419#define PTI_USER_PGD_FILL 1024
420#else
421#define PGD_ALIGN (PAGE_SIZE)
422#define PTI_USER_PGD_FILL 0
423#endif
424/*
425 * BSS section
426 */
427__PAGE_ALIGNED_BSS
428 .align PGD_ALIGN
429#ifdef CONFIG_X86_PAE
430.globl initial_pg_pmd
431initial_pg_pmd:
432 .fill 1024*KPMDS,4,0
433#else
434.globl initial_page_table
435initial_page_table:
436 .fill 1024,4,0
437#endif
438 .align PGD_ALIGN
439initial_pg_fixmap:
440 .fill 1024,4,0
441.globl swapper_pg_dir
442 .align PGD_ALIGN
443swapper_pg_dir:
444 .fill 1024,4,0
445 .fill PTI_USER_PGD_FILL,4,0
446.globl empty_zero_page
447empty_zero_page:
448 .fill 4096,1,0
449EXPORT_SYMBOL(empty_zero_page)
450
451/*
452 * This starts the data section.
453 */
454#ifdef CONFIG_X86_PAE
455__PAGE_ALIGNED_DATA
456 /* Page-aligned for the benefit of paravirt? */
457 .align PGD_ALIGN
458SYM_DATA_START(initial_page_table)
459 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
460# if KPMDS == 3
461 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
462 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
463 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
464# elif KPMDS == 2
465 .long 0,0
466 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
467 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
468# elif KPMDS == 1
469 .long 0,0
470 .long 0,0
471 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
472# else
473# error "Kernel PMDs should be 1, 2 or 3"
474# endif
475 .align PAGE_SIZE /* needs to be page-sized too */
476
477#ifdef CONFIG_PAGE_TABLE_ISOLATION
478 /*
479 * PTI needs another page so sync_initial_pagetable() works correctly
480 * and does not scribble over the data which is placed behind the
481 * actual initial_page_table. See clone_pgd_range().
482 */
483 .fill 1024, 4, 0
484#endif
485
486SYM_DATA_END(initial_page_table)
487#endif
488
489.data
490.balign 4
491/*
492 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder
493 * reliably detect the end of the stack.
494 */
495SYM_DATA(initial_stack,
496 .long init_thread_union + THREAD_SIZE -
497 SIZEOF_PTREGS - TOP_OF_KERNEL_STACK_PADDING)
498
499__INITRODATA
500int_msg:
501 .asciz "Unknown interrupt or fault at: %p %p %p\n"
502
503#include "../../x86/xen/xen-head.S"
504
505/*
506 * The IDT and GDT 'descriptors' are a strange 48-bit object
507 * only used by the lidt and lgdt instructions. They are not
508 * like usual segment descriptors - they consist of a 16-bit
509 * segment size, and 32-bit linear address value:
510 */
511
512 .data
513 ALIGN
514# early boot GDT descriptor (must use 1:1 address mapping)
515 .word 0 # 32 bit align gdt_desc.address
516SYM_DATA_START_LOCAL(boot_gdt_descr)
517 .word __BOOT_DS+7
518 .long boot_gdt - __PAGE_OFFSET
519SYM_DATA_END(boot_gdt_descr)
520
521# boot GDT descriptor (later on used by CPU#0):
522 .word 0 # 32 bit align gdt_desc.address
523SYM_DATA_START(early_gdt_descr)
524 .word GDT_ENTRIES*8-1
525 .long gdt_page /* Overwritten for secondary CPUs */
526SYM_DATA_END(early_gdt_descr)
527
528/*
529 * The boot_gdt must mirror the equivalent in setup.S and is
530 * used only for booting.
531 */
532 .align L1_CACHE_BYTES
533SYM_DATA_START(boot_gdt)
534 .fill GDT_ENTRY_BOOT_CS,8,0
535 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
536 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
537SYM_DATA_END(boot_gdt)
538

source code of linux/arch/x86/kernel/head_32.S