1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
10 * Handle hardware traps and faults.
11 */
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15#include <linux/context_tracking.h>
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
21#include <linux/kdebug.h>
22#include <linux/kgdb.h>
23#include <linux/kernel.h>
24#include <linux/export.h>
25#include <linux/ptrace.h>
26#include <linux/uprobes.h>
27#include <linux/string.h>
28#include <linux/delay.h>
29#include <linux/errno.h>
30#include <linux/kexec.h>
31#include <linux/sched.h>
32#include <linux/sched/task_stack.h>
33#include <linux/timer.h>
34#include <linux/init.h>
35#include <linux/bug.h>
36#include <linux/nmi.h>
37#include <linux/mm.h>
38#include <linux/smp.h>
39#include <linux/io.h>
40
41#if defined(CONFIG_EDAC)
42#include <linux/edac.h>
43#endif
44
45#include <asm/stacktrace.h>
46#include <asm/processor.h>
47#include <asm/debugreg.h>
48#include <linux/atomic.h>
49#include <asm/text-patching.h>
50#include <asm/ftrace.h>
51#include <asm/traps.h>
52#include <asm/desc.h>
53#include <asm/fpu/internal.h>
54#include <asm/cpu_entry_area.h>
55#include <asm/mce.h>
56#include <asm/fixmap.h>
57#include <asm/mach_traps.h>
58#include <asm/alternative.h>
59#include <asm/fpu/xstate.h>
60#include <asm/trace/mpx.h>
61#include <asm/mpx.h>
62#include <asm/vm86.h>
63#include <asm/umip.h>
64
65#ifdef CONFIG_X86_64
66#include <asm/x86_init.h>
67#include <asm/pgalloc.h>
68#include <asm/proto.h>
69#else
70#include <asm/processor-flags.h>
71#include <asm/setup.h>
72#include <asm/proto.h>
73#endif
74
75DECLARE_BITMAP(system_vectors, NR_VECTORS);
76
77static inline void cond_local_irq_enable(struct pt_regs *regs)
78{
79 if (regs->flags & X86_EFLAGS_IF)
80 local_irq_enable();
81}
82
83static inline void cond_local_irq_disable(struct pt_regs *regs)
84{
85 if (regs->flags & X86_EFLAGS_IF)
86 local_irq_disable();
87}
88
89/*
90 * In IST context, we explicitly disable preemption. This serves two
91 * purposes: it makes it much less likely that we would accidentally
92 * schedule in IST context and it will force a warning if we somehow
93 * manage to schedule by accident.
94 */
95void ist_enter(struct pt_regs *regs)
96{
97 if (user_mode(regs)) {
98 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
99 } else {
100 /*
101 * We might have interrupted pretty much anything. In
102 * fact, if we're a machine check, we can even interrupt
103 * NMI processing. We don't want in_nmi() to return true,
104 * but we need to notify RCU.
105 */
106 rcu_nmi_enter();
107 }
108
109 preempt_disable();
110
111 /* This code is a bit fragile. Test it. */
112 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
113}
114NOKPROBE_SYMBOL(ist_enter);
115
116void ist_exit(struct pt_regs *regs)
117{
118 preempt_enable_no_resched();
119
120 if (!user_mode(regs))
121 rcu_nmi_exit();
122}
123
124/**
125 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
126 * @regs: regs passed to the IST exception handler
127 *
128 * IST exception handlers normally cannot schedule. As a special
129 * exception, if the exception interrupted userspace code (i.e.
130 * user_mode(regs) would return true) and the exception was not
131 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
132 * begins a non-atomic section within an ist_enter()/ist_exit() region.
133 * Callers are responsible for enabling interrupts themselves inside
134 * the non-atomic section, and callers must call ist_end_non_atomic()
135 * before ist_exit().
136 */
137void ist_begin_non_atomic(struct pt_regs *regs)
138{
139 BUG_ON(!user_mode(regs));
140
141 /*
142 * Sanity check: we need to be on the normal thread stack. This
143 * will catch asm bugs and any attempt to use ist_preempt_enable
144 * from double_fault.
145 */
146 BUG_ON(!on_thread_stack());
147
148 preempt_enable_no_resched();
149}
150
151/**
152 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
153 *
154 * Ends a non-atomic section started with ist_begin_non_atomic().
155 */
156void ist_end_non_atomic(void)
157{
158 preempt_disable();
159}
160
161int is_valid_bugaddr(unsigned long addr)
162{
163 unsigned short ud;
164
165 if (addr < TASK_SIZE_MAX)
166 return 0;
167
168 if (probe_kernel_address((unsigned short *)addr, ud))
169 return 0;
170
171 return ud == INSN_UD0 || ud == INSN_UD2;
172}
173
174int fixup_bug(struct pt_regs *regs, int trapnr)
175{
176 if (trapnr != X86_TRAP_UD)
177 return 0;
178
179 switch (report_bug(regs->ip, regs)) {
180 case BUG_TRAP_TYPE_NONE:
181 case BUG_TRAP_TYPE_BUG:
182 break;
183
184 case BUG_TRAP_TYPE_WARN:
185 regs->ip += LEN_UD2;
186 return 1;
187 }
188
189 return 0;
190}
191
192static nokprobe_inline int
193do_trap_no_signal(struct task_struct *tsk, int trapnr, const char *str,
194 struct pt_regs *regs, long error_code)
195{
196 if (v8086_mode(regs)) {
197 /*
198 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
199 * On nmi (interrupt 2), do_trap should not be called.
200 */
201 if (trapnr < X86_TRAP_UD) {
202 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
203 error_code, trapnr))
204 return 0;
205 }
206 } else if (!user_mode(regs)) {
207 if (fixup_exception(regs, trapnr, error_code, 0))
208 return 0;
209
210 tsk->thread.error_code = error_code;
211 tsk->thread.trap_nr = trapnr;
212 die(str, regs, error_code);
213 }
214
215 /*
216 * We want error_code and trap_nr set for userspace faults and
217 * kernelspace faults which result in die(), but not
218 * kernelspace faults which are fixed up. die() gives the
219 * process no chance to handle the signal and notice the
220 * kernel fault information, so that won't result in polluting
221 * the information about previously queued, but not yet
222 * delivered, faults. See also do_general_protection below.
223 */
224 tsk->thread.error_code = error_code;
225 tsk->thread.trap_nr = trapnr;
226
227 return -1;
228}
229
230static void show_signal(struct task_struct *tsk, int signr,
231 const char *type, const char *desc,
232 struct pt_regs *regs, long error_code)
233{
234 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
235 printk_ratelimit()) {
236 pr_info("%s[%d] %s%s ip:%lx sp:%lx error:%lx",
237 tsk->comm, task_pid_nr(tsk), type, desc,
238 regs->ip, regs->sp, error_code);
239 print_vma_addr(KERN_CONT " in ", regs->ip);
240 pr_cont("\n");
241 }
242}
243
244static void
245do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
246 long error_code, int sicode, void __user *addr)
247{
248 struct task_struct *tsk = current;
249
250
251 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
252 return;
253
254 show_signal(tsk, signr, "trap ", str, regs, error_code);
255
256 if (!sicode)
257 force_sig(signr, tsk);
258 else
259 force_sig_fault(signr, sicode, addr, tsk);
260}
261NOKPROBE_SYMBOL(do_trap);
262
263static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
264 unsigned long trapnr, int signr, int sicode, void __user *addr)
265{
266 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
267
268 /*
269 * WARN*()s end up here; fix them up before we call the
270 * notifier chain.
271 */
272 if (!user_mode(regs) && fixup_bug(regs, trapnr))
273 return;
274
275 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
276 NOTIFY_STOP) {
277 cond_local_irq_enable(regs);
278 do_trap(trapnr, signr, str, regs, error_code, sicode, addr);
279 }
280}
281
282#define IP ((void __user *)uprobe_get_trap_addr(regs))
283#define DO_ERROR(trapnr, signr, sicode, addr, str, name) \
284dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
285{ \
286 do_error_trap(regs, error_code, str, trapnr, signr, sicode, addr); \
287}
288
289DO_ERROR(X86_TRAP_DE, SIGFPE, FPE_INTDIV, IP, "divide error", divide_error)
290DO_ERROR(X86_TRAP_OF, SIGSEGV, 0, NULL, "overflow", overflow)
291DO_ERROR(X86_TRAP_UD, SIGILL, ILL_ILLOPN, IP, "invalid opcode", invalid_op)
292DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, 0, NULL, "coprocessor segment overrun", coprocessor_segment_overrun)
293DO_ERROR(X86_TRAP_TS, SIGSEGV, 0, NULL, "invalid TSS", invalid_TSS)
294DO_ERROR(X86_TRAP_NP, SIGBUS, 0, NULL, "segment not present", segment_not_present)
295DO_ERROR(X86_TRAP_SS, SIGBUS, 0, NULL, "stack segment", stack_segment)
296DO_ERROR(X86_TRAP_AC, SIGBUS, BUS_ADRALN, NULL, "alignment check", alignment_check)
297#undef IP
298
299#ifdef CONFIG_VMAP_STACK
300__visible void __noreturn handle_stack_overflow(const char *message,
301 struct pt_regs *regs,
302 unsigned long fault_address)
303{
304 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
305 (void *)fault_address, current->stack,
306 (char *)current->stack + THREAD_SIZE - 1);
307 die(message, regs, 0);
308
309 /* Be absolutely certain we don't return. */
310 panic("%s", message);
311}
312#endif
313
314#ifdef CONFIG_X86_64
315/* Runs on IST stack */
316dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
317{
318 static const char str[] = "double fault";
319 struct task_struct *tsk = current;
320#ifdef CONFIG_VMAP_STACK
321 unsigned long cr2;
322#endif
323
324#ifdef CONFIG_X86_ESPFIX64
325 extern unsigned char native_irq_return_iret[];
326
327 /*
328 * If IRET takes a non-IST fault on the espfix64 stack, then we
329 * end up promoting it to a doublefault. In that case, take
330 * advantage of the fact that we're not using the normal (TSS.sp0)
331 * stack right now. We can write a fake #GP(0) frame at TSS.sp0
332 * and then modify our own IRET frame so that, when we return,
333 * we land directly at the #GP(0) vector with the stack already
334 * set up according to its expectations.
335 *
336 * The net result is that our #GP handler will think that we
337 * entered from usermode with the bad user context.
338 *
339 * No need for ist_enter here because we don't use RCU.
340 */
341 if (((long)regs->sp >> P4D_SHIFT) == ESPFIX_PGD_ENTRY &&
342 regs->cs == __KERNEL_CS &&
343 regs->ip == (unsigned long)native_irq_return_iret)
344 {
345 struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
346
347 /*
348 * regs->sp points to the failing IRET frame on the
349 * ESPFIX64 stack. Copy it to the entry stack. This fills
350 * in gpregs->ss through gpregs->ip.
351 *
352 */
353 memmove(&gpregs->ip, (void *)regs->sp, 5*8);
354 gpregs->orig_ax = 0; /* Missing (lost) #GP error code */
355
356 /*
357 * Adjust our frame so that we return straight to the #GP
358 * vector with the expected RSP value. This is safe because
359 * we won't enable interupts or schedule before we invoke
360 * general_protection, so nothing will clobber the stack
361 * frame we just set up.
362 *
363 * We will enter general_protection with kernel GSBASE,
364 * which is what the stub expects, given that the faulting
365 * RIP will be the IRET instruction.
366 */
367 regs->ip = (unsigned long)general_protection;
368 regs->sp = (unsigned long)&gpregs->orig_ax;
369
370 return;
371 }
372#endif
373
374 ist_enter(regs);
375 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
376
377 tsk->thread.error_code = error_code;
378 tsk->thread.trap_nr = X86_TRAP_DF;
379
380#ifdef CONFIG_VMAP_STACK
381 /*
382 * If we overflow the stack into a guard page, the CPU will fail
383 * to deliver #PF and will send #DF instead. Similarly, if we
384 * take any non-IST exception while too close to the bottom of
385 * the stack, the processor will get a page fault while
386 * delivering the exception and will generate a double fault.
387 *
388 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
389 * Page-Fault Exception (#PF):
390 *
391 * Processors update CR2 whenever a page fault is detected. If a
392 * second page fault occurs while an earlier page fault is being
393 * delivered, the faulting linear address of the second fault will
394 * overwrite the contents of CR2 (replacing the previous
395 * address). These updates to CR2 occur even if the page fault
396 * results in a double fault or occurs during the delivery of a
397 * double fault.
398 *
399 * The logic below has a small possibility of incorrectly diagnosing
400 * some errors as stack overflows. For example, if the IDT or GDT
401 * gets corrupted such that #GP delivery fails due to a bad descriptor
402 * causing #GP and we hit this condition while CR2 coincidentally
403 * points to the stack guard page, we'll think we overflowed the
404 * stack. Given that we're going to panic one way or another
405 * if this happens, this isn't necessarily worth fixing.
406 *
407 * If necessary, we could improve the test by only diagnosing
408 * a stack overflow if the saved RSP points within 47 bytes of
409 * the bottom of the stack: if RSP == tsk_stack + 48 and we
410 * take an exception, the stack is already aligned and there
411 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
412 * possible error code, so a stack overflow would *not* double
413 * fault. With any less space left, exception delivery could
414 * fail, and, as a practical matter, we've overflowed the
415 * stack even if the actual trigger for the double fault was
416 * something else.
417 */
418 cr2 = read_cr2();
419 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
420 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
421#endif
422
423#ifdef CONFIG_DOUBLEFAULT
424 df_debug(regs, error_code);
425#endif
426 /*
427 * This is always a kernel trap and never fixable (and thus must
428 * never return).
429 */
430 for (;;)
431 die(str, regs, error_code);
432}
433#endif
434
435dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
436{
437 const struct mpx_bndcsr *bndcsr;
438
439 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
440 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
441 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
442 return;
443 cond_local_irq_enable(regs);
444
445 if (!user_mode(regs))
446 die("bounds", regs, error_code);
447
448 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
449 /* The exception is not from Intel MPX */
450 goto exit_trap;
451 }
452
453 /*
454 * We need to look at BNDSTATUS to resolve this exception.
455 * A NULL here might mean that it is in its 'init state',
456 * which is all zeros which indicates MPX was not
457 * responsible for the exception.
458 */
459 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
460 if (!bndcsr)
461 goto exit_trap;
462
463 trace_bounds_exception_mpx(bndcsr);
464 /*
465 * The error code field of the BNDSTATUS register communicates status
466 * information of a bound range exception #BR or operation involving
467 * bound directory.
468 */
469 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
470 case 2: /* Bound directory has invalid entry. */
471 if (mpx_handle_bd_fault())
472 goto exit_trap;
473 break; /* Success, it was handled */
474 case 1: /* Bound violation. */
475 {
476 struct task_struct *tsk = current;
477 struct mpx_fault_info mpx;
478
479 if (mpx_fault_info(&mpx, regs)) {
480 /*
481 * We failed to decode the MPX instruction. Act as if
482 * the exception was not caused by MPX.
483 */
484 goto exit_trap;
485 }
486 /*
487 * Success, we decoded the instruction and retrieved
488 * an 'mpx' containing the address being accessed
489 * which caused the exception. This information
490 * allows and application to possibly handle the
491 * #BR exception itself.
492 */
493 if (!do_trap_no_signal(tsk, X86_TRAP_BR, "bounds", regs,
494 error_code))
495 break;
496
497 show_signal(tsk, SIGSEGV, "trap ", "bounds", regs, error_code);
498
499 force_sig_bnderr(mpx.addr, mpx.lower, mpx.upper);
500 break;
501 }
502 case 0: /* No exception caused by Intel MPX operations. */
503 goto exit_trap;
504 default:
505 die("bounds", regs, error_code);
506 }
507
508 return;
509
510exit_trap:
511 /*
512 * This path out is for all the cases where we could not
513 * handle the exception in some way (like allocating a
514 * table or telling userspace about it. We will also end
515 * up here if the kernel has MPX turned off at compile
516 * time..
517 */
518 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, 0, NULL);
519}
520
521dotraplinkage void
522do_general_protection(struct pt_regs *regs, long error_code)
523{
524 const char *desc = "general protection fault";
525 struct task_struct *tsk;
526
527 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
528 cond_local_irq_enable(regs);
529
530 if (static_cpu_has(X86_FEATURE_UMIP)) {
531 if (user_mode(regs) && fixup_umip_exception(regs))
532 return;
533 }
534
535 if (v8086_mode(regs)) {
536 local_irq_enable();
537 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
538 return;
539 }
540
541 tsk = current;
542 if (!user_mode(regs)) {
543 if (fixup_exception(regs, X86_TRAP_GP, error_code, 0))
544 return;
545
546 tsk->thread.error_code = error_code;
547 tsk->thread.trap_nr = X86_TRAP_GP;
548
549 /*
550 * To be potentially processing a kprobe fault and to
551 * trust the result from kprobe_running(), we have to
552 * be non-preemptible.
553 */
554 if (!preemptible() && kprobe_running() &&
555 kprobe_fault_handler(regs, X86_TRAP_GP))
556 return;
557
558 if (notify_die(DIE_GPF, desc, regs, error_code,
559 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
560 die(desc, regs, error_code);
561 return;
562 }
563
564 tsk->thread.error_code = error_code;
565 tsk->thread.trap_nr = X86_TRAP_GP;
566
567 show_signal(tsk, SIGSEGV, "", desc, regs, error_code);
568
569 force_sig(SIGSEGV, tsk);
570}
571NOKPROBE_SYMBOL(do_general_protection);
572
573dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
574{
575#ifdef CONFIG_DYNAMIC_FTRACE
576 /*
577 * ftrace must be first, everything else may cause a recursive crash.
578 * See note by declaration of modifying_ftrace_code in ftrace.c
579 */
580 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
581 ftrace_int3_handler(regs))
582 return;
583#endif
584 if (poke_int3_handler(regs))
585 return;
586
587 /*
588 * Use ist_enter despite the fact that we don't use an IST stack.
589 * We can be called from a kprobe in non-CONTEXT_KERNEL kernel
590 * mode or even during context tracking state changes.
591 *
592 * This means that we can't schedule. That's okay.
593 */
594 ist_enter(regs);
595 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
596#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
597 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
598 SIGTRAP) == NOTIFY_STOP)
599 goto exit;
600#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
601
602#ifdef CONFIG_KPROBES
603 if (kprobe_int3_handler(regs))
604 goto exit;
605#endif
606
607 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
608 SIGTRAP) == NOTIFY_STOP)
609 goto exit;
610
611 cond_local_irq_enable(regs);
612 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, 0, NULL);
613 cond_local_irq_disable(regs);
614
615exit:
616 ist_exit(regs);
617}
618NOKPROBE_SYMBOL(do_int3);
619
620#ifdef CONFIG_X86_64
621/*
622 * Help handler running on a per-cpu (IST or entry trampoline) stack
623 * to switch to the normal thread stack if the interrupted code was in
624 * user mode. The actual stack switch is done in entry_64.S
625 */
626asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
627{
628 struct pt_regs *regs = (struct pt_regs *)this_cpu_read(cpu_current_top_of_stack) - 1;
629 if (regs != eregs)
630 *regs = *eregs;
631 return regs;
632}
633NOKPROBE_SYMBOL(sync_regs);
634
635struct bad_iret_stack {
636 void *error_entry_ret;
637 struct pt_regs regs;
638};
639
640asmlinkage __visible notrace
641struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
642{
643 /*
644 * This is called from entry_64.S early in handling a fault
645 * caused by a bad iret to user mode. To handle the fault
646 * correctly, we want to move our stack frame to where it would
647 * be had we entered directly on the entry stack (rather than
648 * just below the IRET frame) and we want to pretend that the
649 * exception came from the IRET target.
650 */
651 struct bad_iret_stack *new_stack =
652 (struct bad_iret_stack *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
653
654 /* Copy the IRET target to the new stack. */
655 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
656
657 /* Copy the remainder of the stack from the current stack. */
658 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
659
660 BUG_ON(!user_mode(&new_stack->regs));
661 return new_stack;
662}
663NOKPROBE_SYMBOL(fixup_bad_iret);
664#endif
665
666static bool is_sysenter_singlestep(struct pt_regs *regs)
667{
668 /*
669 * We don't try for precision here. If we're anywhere in the region of
670 * code that can be single-stepped in the SYSENTER entry path, then
671 * assume that this is a useless single-step trap due to SYSENTER
672 * being invoked with TF set. (We don't know in advance exactly
673 * which instructions will be hit because BTF could plausibly
674 * be set.)
675 */
676#ifdef CONFIG_X86_32
677 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
678 (unsigned long)__end_SYSENTER_singlestep_region -
679 (unsigned long)__begin_SYSENTER_singlestep_region;
680#elif defined(CONFIG_IA32_EMULATION)
681 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
682 (unsigned long)__end_entry_SYSENTER_compat -
683 (unsigned long)entry_SYSENTER_compat;
684#else
685 return false;
686#endif
687}
688
689/*
690 * Our handling of the processor debug registers is non-trivial.
691 * We do not clear them on entry and exit from the kernel. Therefore
692 * it is possible to get a watchpoint trap here from inside the kernel.
693 * However, the code in ./ptrace.c has ensured that the user can
694 * only set watchpoints on userspace addresses. Therefore the in-kernel
695 * watchpoint trap can only occur in code which is reading/writing
696 * from user space. Such code must not hold kernel locks (since it
697 * can equally take a page fault), therefore it is safe to call
698 * force_sig_info even though that claims and releases locks.
699 *
700 * Code in ./signal.c ensures that the debug control register
701 * is restored before we deliver any signal, and therefore that
702 * user code runs with the correct debug control register even though
703 * we clear it here.
704 *
705 * Being careful here means that we don't have to be as careful in a
706 * lot of more complicated places (task switching can be a bit lazy
707 * about restoring all the debug state, and ptrace doesn't have to
708 * find every occurrence of the TF bit that could be saved away even
709 * by user code)
710 *
711 * May run on IST stack.
712 */
713dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
714{
715 struct task_struct *tsk = current;
716 int user_icebp = 0;
717 unsigned long dr6;
718 int si_code;
719
720 ist_enter(regs);
721
722 get_debugreg(dr6, 6);
723 /*
724 * The Intel SDM says:
725 *
726 * Certain debug exceptions may clear bits 0-3. The remaining
727 * contents of the DR6 register are never cleared by the
728 * processor. To avoid confusion in identifying debug
729 * exceptions, debug handlers should clear the register before
730 * returning to the interrupted task.
731 *
732 * Keep it simple: clear DR6 immediately.
733 */
734 set_debugreg(0, 6);
735
736 /* Filter out all the reserved bits which are preset to 1 */
737 dr6 &= ~DR6_RESERVED;
738
739 /*
740 * The SDM says "The processor clears the BTF flag when it
741 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
742 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
743 */
744 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
745
746 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
747 is_sysenter_singlestep(regs))) {
748 dr6 &= ~DR_STEP;
749 if (!dr6)
750 goto exit;
751 /*
752 * else we might have gotten a single-step trap and hit a
753 * watchpoint at the same time, in which case we should fall
754 * through and handle the watchpoint.
755 */
756 }
757
758 /*
759 * If dr6 has no reason to give us about the origin of this trap,
760 * then it's very likely the result of an icebp/int01 trap.
761 * User wants a sigtrap for that.
762 */
763 if (!dr6 && user_mode(regs))
764 user_icebp = 1;
765
766 /* Store the virtualized DR6 value */
767 tsk->thread.debugreg6 = dr6;
768
769#ifdef CONFIG_KPROBES
770 if (kprobe_debug_handler(regs))
771 goto exit;
772#endif
773
774 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
775 SIGTRAP) == NOTIFY_STOP)
776 goto exit;
777
778 /*
779 * Let others (NMI) know that the debug stack is in use
780 * as we may switch to the interrupt stack.
781 */
782 debug_stack_usage_inc();
783
784 /* It's safe to allow irq's after DR6 has been saved */
785 cond_local_irq_enable(regs);
786
787 if (v8086_mode(regs)) {
788 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
789 X86_TRAP_DB);
790 cond_local_irq_disable(regs);
791 debug_stack_usage_dec();
792 goto exit;
793 }
794
795 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
796 /*
797 * Historical junk that used to handle SYSENTER single-stepping.
798 * This should be unreachable now. If we survive for a while
799 * without anyone hitting this warning, we'll turn this into
800 * an oops.
801 */
802 tsk->thread.debugreg6 &= ~DR_STEP;
803 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
804 regs->flags &= ~X86_EFLAGS_TF;
805 }
806 si_code = get_si_code(tsk->thread.debugreg6);
807 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
808 send_sigtrap(tsk, regs, error_code, si_code);
809 cond_local_irq_disable(regs);
810 debug_stack_usage_dec();
811
812exit:
813 ist_exit(regs);
814}
815NOKPROBE_SYMBOL(do_debug);
816
817/*
818 * Note that we play around with the 'TS' bit in an attempt to get
819 * the correct behaviour even in the presence of the asynchronous
820 * IRQ13 behaviour
821 */
822static void math_error(struct pt_regs *regs, int error_code, int trapnr)
823{
824 struct task_struct *task = current;
825 struct fpu *fpu = &task->thread.fpu;
826 int si_code;
827 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
828 "simd exception";
829
830 cond_local_irq_enable(regs);
831
832 if (!user_mode(regs)) {
833 if (fixup_exception(regs, trapnr, error_code, 0))
834 return;
835
836 task->thread.error_code = error_code;
837 task->thread.trap_nr = trapnr;
838
839 if (notify_die(DIE_TRAP, str, regs, error_code,
840 trapnr, SIGFPE) != NOTIFY_STOP)
841 die(str, regs, error_code);
842 return;
843 }
844
845 /*
846 * Save the info for the exception handler and clear the error.
847 */
848 fpu__save(fpu);
849
850 task->thread.trap_nr = trapnr;
851 task->thread.error_code = error_code;
852
853 si_code = fpu__exception_code(fpu, trapnr);
854 /* Retry when we get spurious exceptions: */
855 if (!si_code)
856 return;
857
858 force_sig_fault(SIGFPE, si_code,
859 (void __user *)uprobe_get_trap_addr(regs), task);
860}
861
862dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
863{
864 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
865 math_error(regs, error_code, X86_TRAP_MF);
866}
867
868dotraplinkage void
869do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
870{
871 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
872 math_error(regs, error_code, X86_TRAP_XF);
873}
874
875dotraplinkage void
876do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
877{
878 cond_local_irq_enable(regs);
879}
880
881dotraplinkage void
882do_device_not_available(struct pt_regs *regs, long error_code)
883{
884 unsigned long cr0 = read_cr0();
885
886 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
887
888#ifdef CONFIG_MATH_EMULATION
889 if (!boot_cpu_has(X86_FEATURE_FPU) && (cr0 & X86_CR0_EM)) {
890 struct math_emu_info info = { };
891
892 cond_local_irq_enable(regs);
893
894 info.regs = regs;
895 math_emulate(&info);
896 return;
897 }
898#endif
899
900 /* This should not happen. */
901 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
902 /* Try to fix it up and carry on. */
903 write_cr0(cr0 & ~X86_CR0_TS);
904 } else {
905 /*
906 * Something terrible happened, and we're better off trying
907 * to kill the task than getting stuck in a never-ending
908 * loop of #NM faults.
909 */
910 die("unexpected #NM exception", regs, error_code);
911 }
912}
913NOKPROBE_SYMBOL(do_device_not_available);
914
915#ifdef CONFIG_X86_32
916dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
917{
918 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
919 local_irq_enable();
920
921 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
922 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
923 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
924 ILL_BADSTK, (void __user *)NULL);
925 }
926}
927#endif
928
929void __init trap_init(void)
930{
931 /* Init cpu_entry_area before IST entries are set up */
932 setup_cpu_entry_areas();
933
934 idt_setup_traps();
935
936 /*
937 * Set the IDT descriptor to a fixed read-only location, so that the
938 * "sidt" instruction will not leak the location of the kernel, and
939 * to defend the IDT against arbitrary memory write vulnerabilities.
940 * It will be reloaded in cpu_init() */
941 cea_set_pte(CPU_ENTRY_AREA_RO_IDT_VADDR, __pa_symbol(idt_table),
942 PAGE_KERNEL_RO);
943 idt_descr.address = CPU_ENTRY_AREA_RO_IDT;
944
945 /*
946 * Should be a barrier for any external CPU state:
947 */
948 cpu_init();
949
950 idt_setup_ist_traps();
951
952 x86_init.irqs.trap_init();
953
954 idt_setup_debugidt_traps();
955}
956