1#include <linux/gfp.h>
2#include <linux/initrd.h>
3#include <linux/ioport.h>
4#include <linux/swap.h>
5#include <linux/memblock.h>
6#include <linux/swapfile.h>
7#include <linux/swapops.h>
8
9#include <asm/set_memory.h>
10#include <asm/e820/api.h>
11#include <asm/init.h>
12#include <asm/page.h>
13#include <asm/page_types.h>
14#include <asm/sections.h>
15#include <asm/setup.h>
16#include <asm/tlbflush.h>
17#include <asm/tlb.h>
18#include <asm/proto.h>
19#include <asm/dma.h> /* for MAX_DMA_PFN */
20#include <asm/microcode.h>
21#include <asm/kaslr.h>
22#include <asm/hypervisor.h>
23#include <asm/cpufeature.h>
24#include <asm/pti.h>
25
26/*
27 * We need to define the tracepoints somewhere, and tlb.c
28 * is only compied when SMP=y.
29 */
30#define CREATE_TRACE_POINTS
31#include <trace/events/tlb.h>
32
33#include "mm_internal.h"
34
35/*
36 * Tables translating between page_cache_type_t and pte encoding.
37 *
38 * The default values are defined statically as minimal supported mode;
39 * WC and WT fall back to UC-. pat_init() updates these values to support
40 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
41 * for the details. Note, __early_ioremap() used during early boot-time
42 * takes pgprot_t (pte encoding) and does not use these tables.
43 *
44 * Index into __cachemode2pte_tbl[] is the cachemode.
45 *
46 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
47 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
48 */
49uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
50 [_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
51 [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
52 [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
53 [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
54 [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
55 [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
56};
57EXPORT_SYMBOL(__cachemode2pte_tbl);
58
59uint8_t __pte2cachemode_tbl[8] = {
60 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
61 [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
62 [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
63 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
64 [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
65 [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
66 [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
67 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
68};
69EXPORT_SYMBOL(__pte2cachemode_tbl);
70
71static unsigned long __initdata pgt_buf_start;
72static unsigned long __initdata pgt_buf_end;
73static unsigned long __initdata pgt_buf_top;
74
75static unsigned long min_pfn_mapped;
76
77static bool __initdata can_use_brk_pgt = true;
78
79/*
80 * Pages returned are already directly mapped.
81 *
82 * Changing that is likely to break Xen, see commit:
83 *
84 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
85 *
86 * for detailed information.
87 */
88__ref void *alloc_low_pages(unsigned int num)
89{
90 unsigned long pfn;
91 int i;
92
93 if (after_bootmem) {
94 unsigned int order;
95
96 order = get_order((unsigned long)num << PAGE_SHIFT);
97 return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order);
98 }
99
100 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
101 unsigned long ret = 0;
102
103 if (min_pfn_mapped < max_pfn_mapped) {
104 ret = memblock_find_in_range(
105 min_pfn_mapped << PAGE_SHIFT,
106 max_pfn_mapped << PAGE_SHIFT,
107 PAGE_SIZE * num , PAGE_SIZE);
108 }
109 if (ret)
110 memblock_reserve(ret, PAGE_SIZE * num);
111 else if (can_use_brk_pgt)
112 ret = __pa(extend_brk(PAGE_SIZE * num, PAGE_SIZE));
113
114 if (!ret)
115 panic("alloc_low_pages: can not alloc memory");
116
117 pfn = ret >> PAGE_SHIFT;
118 } else {
119 pfn = pgt_buf_end;
120 pgt_buf_end += num;
121 printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n",
122 pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1);
123 }
124
125 for (i = 0; i < num; i++) {
126 void *adr;
127
128 adr = __va((pfn + i) << PAGE_SHIFT);
129 clear_page(adr);
130 }
131
132 return __va(pfn << PAGE_SHIFT);
133}
134
135/*
136 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
137 * With KASLR memory randomization, depending on the machine e820 memory
138 * and the PUD alignment. We may need twice more pages when KASLR memory
139 * randomization is enabled.
140 */
141#ifndef CONFIG_RANDOMIZE_MEMORY
142#define INIT_PGD_PAGE_COUNT 6
143#else
144#define INIT_PGD_PAGE_COUNT 12
145#endif
146#define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
147RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
148void __init early_alloc_pgt_buf(void)
149{
150 unsigned long tables = INIT_PGT_BUF_SIZE;
151 phys_addr_t base;
152
153 base = __pa(extend_brk(tables, PAGE_SIZE));
154
155 pgt_buf_start = base >> PAGE_SHIFT;
156 pgt_buf_end = pgt_buf_start;
157 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
158}
159
160int after_bootmem;
161
162early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
163
164struct map_range {
165 unsigned long start;
166 unsigned long end;
167 unsigned page_size_mask;
168};
169
170static int page_size_mask;
171
172static void __init probe_page_size_mask(void)
173{
174 /*
175 * For pagealloc debugging, identity mapping will use small pages.
176 * This will simplify cpa(), which otherwise needs to support splitting
177 * large pages into small in interrupt context, etc.
178 */
179 if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled())
180 page_size_mask |= 1 << PG_LEVEL_2M;
181 else
182 direct_gbpages = 0;
183
184 /* Enable PSE if available */
185 if (boot_cpu_has(X86_FEATURE_PSE))
186 cr4_set_bits_and_update_boot(X86_CR4_PSE);
187
188 /* Enable PGE if available */
189 __supported_pte_mask &= ~_PAGE_GLOBAL;
190 if (boot_cpu_has(X86_FEATURE_PGE)) {
191 cr4_set_bits_and_update_boot(X86_CR4_PGE);
192 __supported_pte_mask |= _PAGE_GLOBAL;
193 }
194
195 /* By the default is everything supported: */
196 __default_kernel_pte_mask = __supported_pte_mask;
197 /* Except when with PTI where the kernel is mostly non-Global: */
198 if (cpu_feature_enabled(X86_FEATURE_PTI))
199 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
200
201 /* Enable 1 GB linear kernel mappings if available: */
202 if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
203 printk(KERN_INFO "Using GB pages for direct mapping\n");
204 page_size_mask |= 1 << PG_LEVEL_1G;
205 } else {
206 direct_gbpages = 0;
207 }
208}
209
210static void setup_pcid(void)
211{
212 if (!IS_ENABLED(CONFIG_X86_64))
213 return;
214
215 if (!boot_cpu_has(X86_FEATURE_PCID))
216 return;
217
218 if (boot_cpu_has(X86_FEATURE_PGE)) {
219 /*
220 * This can't be cr4_set_bits_and_update_boot() -- the
221 * trampoline code can't handle CR4.PCIDE and it wouldn't
222 * do any good anyway. Despite the name,
223 * cr4_set_bits_and_update_boot() doesn't actually cause
224 * the bits in question to remain set all the way through
225 * the secondary boot asm.
226 *
227 * Instead, we brute-force it and set CR4.PCIDE manually in
228 * start_secondary().
229 */
230 cr4_set_bits(X86_CR4_PCIDE);
231
232 /*
233 * INVPCID's single-context modes (2/3) only work if we set
234 * X86_CR4_PCIDE, *and* we INVPCID support. It's unusable
235 * on systems that have X86_CR4_PCIDE clear, or that have
236 * no INVPCID support at all.
237 */
238 if (boot_cpu_has(X86_FEATURE_INVPCID))
239 setup_force_cpu_cap(X86_FEATURE_INVPCID_SINGLE);
240 } else {
241 /*
242 * flush_tlb_all(), as currently implemented, won't work if
243 * PCID is on but PGE is not. Since that combination
244 * doesn't exist on real hardware, there's no reason to try
245 * to fully support it, but it's polite to avoid corrupting
246 * data if we're on an improperly configured VM.
247 */
248 setup_clear_cpu_cap(X86_FEATURE_PCID);
249 }
250}
251
252#ifdef CONFIG_X86_32
253#define NR_RANGE_MR 3
254#else /* CONFIG_X86_64 */
255#define NR_RANGE_MR 5
256#endif
257
258static int __meminit save_mr(struct map_range *mr, int nr_range,
259 unsigned long start_pfn, unsigned long end_pfn,
260 unsigned long page_size_mask)
261{
262 if (start_pfn < end_pfn) {
263 if (nr_range >= NR_RANGE_MR)
264 panic("run out of range for init_memory_mapping\n");
265 mr[nr_range].start = start_pfn<<PAGE_SHIFT;
266 mr[nr_range].end = end_pfn<<PAGE_SHIFT;
267 mr[nr_range].page_size_mask = page_size_mask;
268 nr_range++;
269 }
270
271 return nr_range;
272}
273
274/*
275 * adjust the page_size_mask for small range to go with
276 * big page size instead small one if nearby are ram too.
277 */
278static void __ref adjust_range_page_size_mask(struct map_range *mr,
279 int nr_range)
280{
281 int i;
282
283 for (i = 0; i < nr_range; i++) {
284 if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
285 !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
286 unsigned long start = round_down(mr[i].start, PMD_SIZE);
287 unsigned long end = round_up(mr[i].end, PMD_SIZE);
288
289#ifdef CONFIG_X86_32
290 if ((end >> PAGE_SHIFT) > max_low_pfn)
291 continue;
292#endif
293
294 if (memblock_is_region_memory(start, end - start))
295 mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
296 }
297 if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
298 !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
299 unsigned long start = round_down(mr[i].start, PUD_SIZE);
300 unsigned long end = round_up(mr[i].end, PUD_SIZE);
301
302 if (memblock_is_region_memory(start, end - start))
303 mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
304 }
305 }
306}
307
308static const char *page_size_string(struct map_range *mr)
309{
310 static const char str_1g[] = "1G";
311 static const char str_2m[] = "2M";
312 static const char str_4m[] = "4M";
313 static const char str_4k[] = "4k";
314
315 if (mr->page_size_mask & (1<<PG_LEVEL_1G))
316 return str_1g;
317 /*
318 * 32-bit without PAE has a 4M large page size.
319 * PG_LEVEL_2M is misnamed, but we can at least
320 * print out the right size in the string.
321 */
322 if (IS_ENABLED(CONFIG_X86_32) &&
323 !IS_ENABLED(CONFIG_X86_PAE) &&
324 mr->page_size_mask & (1<<PG_LEVEL_2M))
325 return str_4m;
326
327 if (mr->page_size_mask & (1<<PG_LEVEL_2M))
328 return str_2m;
329
330 return str_4k;
331}
332
333static int __meminit split_mem_range(struct map_range *mr, int nr_range,
334 unsigned long start,
335 unsigned long end)
336{
337 unsigned long start_pfn, end_pfn, limit_pfn;
338 unsigned long pfn;
339 int i;
340
341 limit_pfn = PFN_DOWN(end);
342
343 /* head if not big page alignment ? */
344 pfn = start_pfn = PFN_DOWN(start);
345#ifdef CONFIG_X86_32
346 /*
347 * Don't use a large page for the first 2/4MB of memory
348 * because there are often fixed size MTRRs in there
349 * and overlapping MTRRs into large pages can cause
350 * slowdowns.
351 */
352 if (pfn == 0)
353 end_pfn = PFN_DOWN(PMD_SIZE);
354 else
355 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
356#else /* CONFIG_X86_64 */
357 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
358#endif
359 if (end_pfn > limit_pfn)
360 end_pfn = limit_pfn;
361 if (start_pfn < end_pfn) {
362 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
363 pfn = end_pfn;
364 }
365
366 /* big page (2M) range */
367 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
368#ifdef CONFIG_X86_32
369 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
370#else /* CONFIG_X86_64 */
371 end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
372 if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
373 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
374#endif
375
376 if (start_pfn < end_pfn) {
377 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
378 page_size_mask & (1<<PG_LEVEL_2M));
379 pfn = end_pfn;
380 }
381
382#ifdef CONFIG_X86_64
383 /* big page (1G) range */
384 start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
385 end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
386 if (start_pfn < end_pfn) {
387 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
388 page_size_mask &
389 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
390 pfn = end_pfn;
391 }
392
393 /* tail is not big page (1G) alignment */
394 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
395 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
396 if (start_pfn < end_pfn) {
397 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
398 page_size_mask & (1<<PG_LEVEL_2M));
399 pfn = end_pfn;
400 }
401#endif
402
403 /* tail is not big page (2M) alignment */
404 start_pfn = pfn;
405 end_pfn = limit_pfn;
406 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
407
408 if (!after_bootmem)
409 adjust_range_page_size_mask(mr, nr_range);
410
411 /* try to merge same page size and continuous */
412 for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
413 unsigned long old_start;
414 if (mr[i].end != mr[i+1].start ||
415 mr[i].page_size_mask != mr[i+1].page_size_mask)
416 continue;
417 /* move it */
418 old_start = mr[i].start;
419 memmove(&mr[i], &mr[i+1],
420 (nr_range - 1 - i) * sizeof(struct map_range));
421 mr[i--].start = old_start;
422 nr_range--;
423 }
424
425 for (i = 0; i < nr_range; i++)
426 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
427 mr[i].start, mr[i].end - 1,
428 page_size_string(&mr[i]));
429
430 return nr_range;
431}
432
433struct range pfn_mapped[E820_MAX_ENTRIES];
434int nr_pfn_mapped;
435
436static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
437{
438 nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES,
439 nr_pfn_mapped, start_pfn, end_pfn);
440 nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES);
441
442 max_pfn_mapped = max(max_pfn_mapped, end_pfn);
443
444 if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
445 max_low_pfn_mapped = max(max_low_pfn_mapped,
446 min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
447}
448
449bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
450{
451 int i;
452
453 for (i = 0; i < nr_pfn_mapped; i++)
454 if ((start_pfn >= pfn_mapped[i].start) &&
455 (end_pfn <= pfn_mapped[i].end))
456 return true;
457
458 return false;
459}
460
461/*
462 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
463 * This runs before bootmem is initialized and gets pages directly from
464 * the physical memory. To access them they are temporarily mapped.
465 */
466unsigned long __ref init_memory_mapping(unsigned long start,
467 unsigned long end)
468{
469 struct map_range mr[NR_RANGE_MR];
470 unsigned long ret = 0;
471 int nr_range, i;
472
473 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
474 start, end - 1);
475
476 memset(mr, 0, sizeof(mr));
477 nr_range = split_mem_range(mr, 0, start, end);
478
479 for (i = 0; i < nr_range; i++)
480 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
481 mr[i].page_size_mask);
482
483 add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
484
485 return ret >> PAGE_SHIFT;
486}
487
488/*
489 * We need to iterate through the E820 memory map and create direct mappings
490 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
491 * create direct mappings for all pfns from [0 to max_low_pfn) and
492 * [4GB to max_pfn) because of possible memory holes in high addresses
493 * that cannot be marked as UC by fixed/variable range MTRRs.
494 * Depending on the alignment of E820 ranges, this may possibly result
495 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
496 *
497 * init_mem_mapping() calls init_range_memory_mapping() with big range.
498 * That range would have hole in the middle or ends, and only ram parts
499 * will be mapped in init_range_memory_mapping().
500 */
501static unsigned long __init init_range_memory_mapping(
502 unsigned long r_start,
503 unsigned long r_end)
504{
505 unsigned long start_pfn, end_pfn;
506 unsigned long mapped_ram_size = 0;
507 int i;
508
509 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
510 u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
511 u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
512 if (start >= end)
513 continue;
514
515 /*
516 * if it is overlapping with brk pgt, we need to
517 * alloc pgt buf from memblock instead.
518 */
519 can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
520 min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
521 init_memory_mapping(start, end);
522 mapped_ram_size += end - start;
523 can_use_brk_pgt = true;
524 }
525
526 return mapped_ram_size;
527}
528
529static unsigned long __init get_new_step_size(unsigned long step_size)
530{
531 /*
532 * Initial mapped size is PMD_SIZE (2M).
533 * We can not set step_size to be PUD_SIZE (1G) yet.
534 * In worse case, when we cross the 1G boundary, and
535 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
536 * to map 1G range with PTE. Hence we use one less than the
537 * difference of page table level shifts.
538 *
539 * Don't need to worry about overflow in the top-down case, on 32bit,
540 * when step_size is 0, round_down() returns 0 for start, and that
541 * turns it into 0x100000000ULL.
542 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
543 * needs to be taken into consideration by the code below.
544 */
545 return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
546}
547
548/**
549 * memory_map_top_down - Map [map_start, map_end) top down
550 * @map_start: start address of the target memory range
551 * @map_end: end address of the target memory range
552 *
553 * This function will setup direct mapping for memory range
554 * [map_start, map_end) in top-down. That said, the page tables
555 * will be allocated at the end of the memory, and we map the
556 * memory in top-down.
557 */
558static void __init memory_map_top_down(unsigned long map_start,
559 unsigned long map_end)
560{
561 unsigned long real_end, start, last_start;
562 unsigned long step_size;
563 unsigned long addr;
564 unsigned long mapped_ram_size = 0;
565
566 /* xen has big range in reserved near end of ram, skip it at first.*/
567 addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
568 real_end = addr + PMD_SIZE;
569
570 /* step_size need to be small so pgt_buf from BRK could cover it */
571 step_size = PMD_SIZE;
572 max_pfn_mapped = 0; /* will get exact value next */
573 min_pfn_mapped = real_end >> PAGE_SHIFT;
574 last_start = start = real_end;
575
576 /*
577 * We start from the top (end of memory) and go to the bottom.
578 * The memblock_find_in_range() gets us a block of RAM from the
579 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
580 * for page table.
581 */
582 while (last_start > map_start) {
583 if (last_start > step_size) {
584 start = round_down(last_start - 1, step_size);
585 if (start < map_start)
586 start = map_start;
587 } else
588 start = map_start;
589 mapped_ram_size += init_range_memory_mapping(start,
590 last_start);
591 last_start = start;
592 min_pfn_mapped = last_start >> PAGE_SHIFT;
593 if (mapped_ram_size >= step_size)
594 step_size = get_new_step_size(step_size);
595 }
596
597 if (real_end < map_end)
598 init_range_memory_mapping(real_end, map_end);
599}
600
601/**
602 * memory_map_bottom_up - Map [map_start, map_end) bottom up
603 * @map_start: start address of the target memory range
604 * @map_end: end address of the target memory range
605 *
606 * This function will setup direct mapping for memory range
607 * [map_start, map_end) in bottom-up. Since we have limited the
608 * bottom-up allocation above the kernel, the page tables will
609 * be allocated just above the kernel and we map the memory
610 * in [map_start, map_end) in bottom-up.
611 */
612static void __init memory_map_bottom_up(unsigned long map_start,
613 unsigned long map_end)
614{
615 unsigned long next, start;
616 unsigned long mapped_ram_size = 0;
617 /* step_size need to be small so pgt_buf from BRK could cover it */
618 unsigned long step_size = PMD_SIZE;
619
620 start = map_start;
621 min_pfn_mapped = start >> PAGE_SHIFT;
622
623 /*
624 * We start from the bottom (@map_start) and go to the top (@map_end).
625 * The memblock_find_in_range() gets us a block of RAM from the
626 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
627 * for page table.
628 */
629 while (start < map_end) {
630 if (step_size && map_end - start > step_size) {
631 next = round_up(start + 1, step_size);
632 if (next > map_end)
633 next = map_end;
634 } else {
635 next = map_end;
636 }
637
638 mapped_ram_size += init_range_memory_mapping(start, next);
639 start = next;
640
641 if (mapped_ram_size >= step_size)
642 step_size = get_new_step_size(step_size);
643 }
644}
645
646void __init init_mem_mapping(void)
647{
648 unsigned long end;
649
650 pti_check_boottime_disable();
651 probe_page_size_mask();
652 setup_pcid();
653
654#ifdef CONFIG_X86_64
655 end = max_pfn << PAGE_SHIFT;
656#else
657 end = max_low_pfn << PAGE_SHIFT;
658#endif
659
660 /* the ISA range is always mapped regardless of memory holes */
661 init_memory_mapping(0, ISA_END_ADDRESS);
662
663 /* Init the trampoline, possibly with KASLR memory offset */
664 init_trampoline();
665
666 /*
667 * If the allocation is in bottom-up direction, we setup direct mapping
668 * in bottom-up, otherwise we setup direct mapping in top-down.
669 */
670 if (memblock_bottom_up()) {
671 unsigned long kernel_end = __pa_symbol(_end);
672
673 /*
674 * we need two separate calls here. This is because we want to
675 * allocate page tables above the kernel. So we first map
676 * [kernel_end, end) to make memory above the kernel be mapped
677 * as soon as possible. And then use page tables allocated above
678 * the kernel to map [ISA_END_ADDRESS, kernel_end).
679 */
680 memory_map_bottom_up(kernel_end, end);
681 memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
682 } else {
683 memory_map_top_down(ISA_END_ADDRESS, end);
684 }
685
686#ifdef CONFIG_X86_64
687 if (max_pfn > max_low_pfn) {
688 /* can we preseve max_low_pfn ?*/
689 max_low_pfn = max_pfn;
690 }
691#else
692 early_ioremap_page_table_range_init();
693#endif
694
695 load_cr3(swapper_pg_dir);
696 __flush_tlb_all();
697
698 x86_init.hyper.init_mem_mapping();
699
700 early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
701}
702
703/*
704 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
705 * is valid. The argument is a physical page number.
706 *
707 * On x86, access has to be given to the first megabyte of RAM because that
708 * area traditionally contains BIOS code and data regions used by X, dosemu,
709 * and similar apps. Since they map the entire memory range, the whole range
710 * must be allowed (for mapping), but any areas that would otherwise be
711 * disallowed are flagged as being "zero filled" instead of rejected.
712 * Access has to be given to non-kernel-ram areas as well, these contain the
713 * PCI mmio resources as well as potential bios/acpi data regions.
714 */
715int devmem_is_allowed(unsigned long pagenr)
716{
717 if (region_intersects(PFN_PHYS(pagenr), PAGE_SIZE,
718 IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE)
719 != REGION_DISJOINT) {
720 /*
721 * For disallowed memory regions in the low 1MB range,
722 * request that the page be shown as all zeros.
723 */
724 if (pagenr < 256)
725 return 2;
726
727 return 0;
728 }
729
730 /*
731 * This must follow RAM test, since System RAM is considered a
732 * restricted resource under CONFIG_STRICT_IOMEM.
733 */
734 if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
735 /* Low 1MB bypasses iomem restrictions. */
736 if (pagenr < 256)
737 return 1;
738
739 return 0;
740 }
741
742 return 1;
743}
744
745void free_init_pages(const char *what, unsigned long begin, unsigned long end)
746{
747 unsigned long begin_aligned, end_aligned;
748
749 /* Make sure boundaries are page aligned */
750 begin_aligned = PAGE_ALIGN(begin);
751 end_aligned = end & PAGE_MASK;
752
753 if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
754 begin = begin_aligned;
755 end = end_aligned;
756 }
757
758 if (begin >= end)
759 return;
760
761 /*
762 * If debugging page accesses then do not free this memory but
763 * mark them not present - any buggy init-section access will
764 * create a kernel page fault:
765 */
766 if (debug_pagealloc_enabled()) {
767 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
768 begin, end - 1);
769 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
770 } else {
771 /*
772 * We just marked the kernel text read only above, now that
773 * we are going to free part of that, we need to make that
774 * writeable and non-executable first.
775 */
776 set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
777 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
778
779 free_reserved_area((void *)begin, (void *)end,
780 POISON_FREE_INITMEM, what);
781 }
782}
783
784/*
785 * begin/end can be in the direct map or the "high kernel mapping"
786 * used for the kernel image only. free_init_pages() will do the
787 * right thing for either kind of address.
788 */
789void free_kernel_image_pages(void *begin, void *end)
790{
791 unsigned long begin_ul = (unsigned long)begin;
792 unsigned long end_ul = (unsigned long)end;
793 unsigned long len_pages = (end_ul - begin_ul) >> PAGE_SHIFT;
794
795
796 free_init_pages("unused kernel image", begin_ul, end_ul);
797
798 /*
799 * PTI maps some of the kernel into userspace. For performance,
800 * this includes some kernel areas that do not contain secrets.
801 * Those areas might be adjacent to the parts of the kernel image
802 * being freed, which may contain secrets. Remove the "high kernel
803 * image mapping" for these freed areas, ensuring they are not even
804 * potentially vulnerable to Meltdown regardless of the specific
805 * optimizations PTI is currently using.
806 *
807 * The "noalias" prevents unmapping the direct map alias which is
808 * needed to access the freed pages.
809 *
810 * This is only valid for 64bit kernels. 32bit has only one mapping
811 * which can't be treated in this way for obvious reasons.
812 */
813 if (IS_ENABLED(CONFIG_X86_64) && cpu_feature_enabled(X86_FEATURE_PTI))
814 set_memory_np_noalias(begin_ul, len_pages);
815}
816
817void __weak mem_encrypt_free_decrypted_mem(void) { }
818
819void __ref free_initmem(void)
820{
821 e820__reallocate_tables();
822
823 mem_encrypt_free_decrypted_mem();
824
825 free_kernel_image_pages(&__init_begin, &__init_end);
826}
827
828#ifdef CONFIG_BLK_DEV_INITRD
829void __init free_initrd_mem(unsigned long start, unsigned long end)
830{
831 /*
832 * end could be not aligned, and We can not align that,
833 * decompresser could be confused by aligned initrd_end
834 * We already reserve the end partial page before in
835 * - i386_start_kernel()
836 * - x86_64_start_kernel()
837 * - relocate_initrd()
838 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
839 */
840 free_init_pages("initrd", start, PAGE_ALIGN(end));
841}
842#endif
843
844/*
845 * Calculate the precise size of the DMA zone (first 16 MB of RAM),
846 * and pass it to the MM layer - to help it set zone watermarks more
847 * accurately.
848 *
849 * Done on 64-bit systems only for the time being, although 32-bit systems
850 * might benefit from this as well.
851 */
852void __init memblock_find_dma_reserve(void)
853{
854#ifdef CONFIG_X86_64
855 u64 nr_pages = 0, nr_free_pages = 0;
856 unsigned long start_pfn, end_pfn;
857 phys_addr_t start_addr, end_addr;
858 int i;
859 u64 u;
860
861 /*
862 * Iterate over all memory ranges (free and reserved ones alike),
863 * to calculate the total number of pages in the first 16 MB of RAM:
864 */
865 nr_pages = 0;
866 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
867 start_pfn = min(start_pfn, MAX_DMA_PFN);
868 end_pfn = min(end_pfn, MAX_DMA_PFN);
869
870 nr_pages += end_pfn - start_pfn;
871 }
872
873 /*
874 * Iterate over free memory ranges to calculate the number of free
875 * pages in the DMA zone, while not counting potential partial
876 * pages at the beginning or the end of the range:
877 */
878 nr_free_pages = 0;
879 for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &start_addr, &end_addr, NULL) {
880 start_pfn = min_t(unsigned long, PFN_UP(start_addr), MAX_DMA_PFN);
881 end_pfn = min_t(unsigned long, PFN_DOWN(end_addr), MAX_DMA_PFN);
882
883 if (start_pfn < end_pfn)
884 nr_free_pages += end_pfn - start_pfn;
885 }
886
887 set_dma_reserve(nr_pages - nr_free_pages);
888#endif
889}
890
891void __init zone_sizes_init(void)
892{
893 unsigned long max_zone_pfns[MAX_NR_ZONES];
894
895 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
896
897#ifdef CONFIG_ZONE_DMA
898 max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
899#endif
900#ifdef CONFIG_ZONE_DMA32
901 max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
902#endif
903 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
904#ifdef CONFIG_HIGHMEM
905 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
906#endif
907
908 free_area_init_nodes(max_zone_pfns);
909}
910
911__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
912 .loaded_mm = &init_mm,
913 .next_asid = 1,
914 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
915};
916EXPORT_PER_CPU_SYMBOL(cpu_tlbstate);
917
918void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
919{
920 /* entry 0 MUST be WB (hardwired to speed up translations) */
921 BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
922
923 __cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
924 __pte2cachemode_tbl[entry] = cache;
925}
926
927#ifdef CONFIG_SWAP
928unsigned long max_swapfile_size(void)
929{
930 unsigned long pages;
931
932 pages = generic_max_swapfile_size();
933
934 if (boot_cpu_has_bug(X86_BUG_L1TF) && l1tf_mitigation != L1TF_MITIGATION_OFF) {
935 /* Limit the swap file size to MAX_PA/2 for L1TF workaround */
936 unsigned long long l1tf_limit = l1tf_pfn_limit();
937 /*
938 * We encode swap offsets also with 3 bits below those for pfn
939 * which makes the usable limit higher.
940 */
941#if CONFIG_PGTABLE_LEVELS > 2
942 l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
943#endif
944 pages = min_t(unsigned long long, l1tf_limit, pages);
945 }
946 return pages;
947}
948#endif
949