1/*
2 * Handle caching attributes in page tables (PAT)
3 *
4 * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
5 * Suresh B Siddha <suresh.b.siddha@intel.com>
6 *
7 * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen.
8 */
9
10#include <linux/seq_file.h>
11#include <linux/memblock.h>
12#include <linux/debugfs.h>
13#include <linux/ioport.h>
14#include <linux/kernel.h>
15#include <linux/pfn_t.h>
16#include <linux/slab.h>
17#include <linux/mm.h>
18#include <linux/fs.h>
19#include <linux/rbtree.h>
20
21#include <asm/cacheflush.h>
22#include <asm/processor.h>
23#include <asm/tlbflush.h>
24#include <asm/x86_init.h>
25#include <asm/pgtable.h>
26#include <asm/fcntl.h>
27#include <asm/e820/api.h>
28#include <asm/mtrr.h>
29#include <asm/page.h>
30#include <asm/msr.h>
31#include <asm/pat.h>
32#include <asm/io.h>
33
34#include "pat_internal.h"
35#include "mm_internal.h"
36
37#undef pr_fmt
38#define pr_fmt(fmt) "" fmt
39
40static bool __read_mostly boot_cpu_done;
41static bool __read_mostly pat_disabled = !IS_ENABLED(CONFIG_X86_PAT);
42static bool __read_mostly pat_initialized;
43static bool __read_mostly init_cm_done;
44
45void pat_disable(const char *reason)
46{
47 if (pat_disabled)
48 return;
49
50 if (boot_cpu_done) {
51 WARN_ONCE(1, "x86/PAT: PAT cannot be disabled after initialization\n");
52 return;
53 }
54
55 pat_disabled = true;
56 pr_info("x86/PAT: %s\n", reason);
57}
58
59static int __init nopat(char *str)
60{
61 pat_disable("PAT support disabled.");
62 return 0;
63}
64early_param("nopat", nopat);
65
66bool pat_enabled(void)
67{
68 return pat_initialized;
69}
70EXPORT_SYMBOL_GPL(pat_enabled);
71
72int pat_debug_enable;
73
74static int __init pat_debug_setup(char *str)
75{
76 pat_debug_enable = 1;
77 return 0;
78}
79__setup("debugpat", pat_debug_setup);
80
81#ifdef CONFIG_X86_PAT
82/*
83 * X86 PAT uses page flags arch_1 and uncached together to keep track of
84 * memory type of pages that have backing page struct.
85 *
86 * X86 PAT supports 4 different memory types:
87 * - _PAGE_CACHE_MODE_WB
88 * - _PAGE_CACHE_MODE_WC
89 * - _PAGE_CACHE_MODE_UC_MINUS
90 * - _PAGE_CACHE_MODE_WT
91 *
92 * _PAGE_CACHE_MODE_WB is the default type.
93 */
94
95#define _PGMT_WB 0
96#define _PGMT_WC (1UL << PG_arch_1)
97#define _PGMT_UC_MINUS (1UL << PG_uncached)
98#define _PGMT_WT (1UL << PG_uncached | 1UL << PG_arch_1)
99#define _PGMT_MASK (1UL << PG_uncached | 1UL << PG_arch_1)
100#define _PGMT_CLEAR_MASK (~_PGMT_MASK)
101
102static inline enum page_cache_mode get_page_memtype(struct page *pg)
103{
104 unsigned long pg_flags = pg->flags & _PGMT_MASK;
105
106 if (pg_flags == _PGMT_WB)
107 return _PAGE_CACHE_MODE_WB;
108 else if (pg_flags == _PGMT_WC)
109 return _PAGE_CACHE_MODE_WC;
110 else if (pg_flags == _PGMT_UC_MINUS)
111 return _PAGE_CACHE_MODE_UC_MINUS;
112 else
113 return _PAGE_CACHE_MODE_WT;
114}
115
116static inline void set_page_memtype(struct page *pg,
117 enum page_cache_mode memtype)
118{
119 unsigned long memtype_flags;
120 unsigned long old_flags;
121 unsigned long new_flags;
122
123 switch (memtype) {
124 case _PAGE_CACHE_MODE_WC:
125 memtype_flags = _PGMT_WC;
126 break;
127 case _PAGE_CACHE_MODE_UC_MINUS:
128 memtype_flags = _PGMT_UC_MINUS;
129 break;
130 case _PAGE_CACHE_MODE_WT:
131 memtype_flags = _PGMT_WT;
132 break;
133 case _PAGE_CACHE_MODE_WB:
134 default:
135 memtype_flags = _PGMT_WB;
136 break;
137 }
138
139 do {
140 old_flags = pg->flags;
141 new_flags = (old_flags & _PGMT_CLEAR_MASK) | memtype_flags;
142 } while (cmpxchg(&pg->flags, old_flags, new_flags) != old_flags);
143}
144#else
145static inline enum page_cache_mode get_page_memtype(struct page *pg)
146{
147 return -1;
148}
149static inline void set_page_memtype(struct page *pg,
150 enum page_cache_mode memtype)
151{
152}
153#endif
154
155enum {
156 PAT_UC = 0, /* uncached */
157 PAT_WC = 1, /* Write combining */
158 PAT_WT = 4, /* Write Through */
159 PAT_WP = 5, /* Write Protected */
160 PAT_WB = 6, /* Write Back (default) */
161 PAT_UC_MINUS = 7, /* UC, but can be overridden by MTRR */
162};
163
164#define CM(c) (_PAGE_CACHE_MODE_ ## c)
165
166static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg)
167{
168 enum page_cache_mode cache;
169 char *cache_mode;
170
171 switch (pat_val) {
172 case PAT_UC: cache = CM(UC); cache_mode = "UC "; break;
173 case PAT_WC: cache = CM(WC); cache_mode = "WC "; break;
174 case PAT_WT: cache = CM(WT); cache_mode = "WT "; break;
175 case PAT_WP: cache = CM(WP); cache_mode = "WP "; break;
176 case PAT_WB: cache = CM(WB); cache_mode = "WB "; break;
177 case PAT_UC_MINUS: cache = CM(UC_MINUS); cache_mode = "UC- "; break;
178 default: cache = CM(WB); cache_mode = "WB "; break;
179 }
180
181 memcpy(msg, cache_mode, 4);
182
183 return cache;
184}
185
186#undef CM
187
188/*
189 * Update the cache mode to pgprot translation tables according to PAT
190 * configuration.
191 * Using lower indices is preferred, so we start with highest index.
192 */
193static void __init_cache_modes(u64 pat)
194{
195 enum page_cache_mode cache;
196 char pat_msg[33];
197 int i;
198
199 pat_msg[32] = 0;
200 for (i = 7; i >= 0; i--) {
201 cache = pat_get_cache_mode((pat >> (i * 8)) & 7,
202 pat_msg + 4 * i);
203 update_cache_mode_entry(i, cache);
204 }
205 pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg);
206
207 init_cm_done = true;
208}
209
210#define PAT(x, y) ((u64)PAT_ ## y << ((x)*8))
211
212static void pat_bsp_init(u64 pat)
213{
214 u64 tmp_pat;
215
216 if (!boot_cpu_has(X86_FEATURE_PAT)) {
217 pat_disable("PAT not supported by CPU.");
218 return;
219 }
220
221 rdmsrl(MSR_IA32_CR_PAT, tmp_pat);
222 if (!tmp_pat) {
223 pat_disable("PAT MSR is 0, disabled.");
224 return;
225 }
226
227 wrmsrl(MSR_IA32_CR_PAT, pat);
228 pat_initialized = true;
229
230 __init_cache_modes(pat);
231}
232
233static void pat_ap_init(u64 pat)
234{
235 if (!boot_cpu_has(X86_FEATURE_PAT)) {
236 /*
237 * If this happens we are on a secondary CPU, but switched to
238 * PAT on the boot CPU. We have no way to undo PAT.
239 */
240 panic("x86/PAT: PAT enabled, but not supported by secondary CPU\n");
241 }
242
243 wrmsrl(MSR_IA32_CR_PAT, pat);
244}
245
246void init_cache_modes(void)
247{
248 u64 pat = 0;
249
250 if (init_cm_done)
251 return;
252
253 if (boot_cpu_has(X86_FEATURE_PAT)) {
254 /*
255 * CPU supports PAT. Set PAT table to be consistent with
256 * PAT MSR. This case supports "nopat" boot option, and
257 * virtual machine environments which support PAT without
258 * MTRRs. In specific, Xen has unique setup to PAT MSR.
259 *
260 * If PAT MSR returns 0, it is considered invalid and emulates
261 * as No PAT.
262 */
263 rdmsrl(MSR_IA32_CR_PAT, pat);
264 }
265
266 if (!pat) {
267 /*
268 * No PAT. Emulate the PAT table that corresponds to the two
269 * cache bits, PWT (Write Through) and PCD (Cache Disable).
270 * This setup is also the same as the BIOS default setup.
271 *
272 * PTE encoding:
273 *
274 * PCD
275 * |PWT PAT
276 * || slot
277 * 00 0 WB : _PAGE_CACHE_MODE_WB
278 * 01 1 WT : _PAGE_CACHE_MODE_WT
279 * 10 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
280 * 11 3 UC : _PAGE_CACHE_MODE_UC
281 *
282 * NOTE: When WC or WP is used, it is redirected to UC- per
283 * the default setup in __cachemode2pte_tbl[].
284 */
285 pat = PAT(0, WB) | PAT(1, WT) | PAT(2, UC_MINUS) | PAT(3, UC) |
286 PAT(4, WB) | PAT(5, WT) | PAT(6, UC_MINUS) | PAT(7, UC);
287 }
288
289 __init_cache_modes(pat);
290}
291
292/**
293 * pat_init - Initialize PAT MSR and PAT table
294 *
295 * This function initializes PAT MSR and PAT table with an OS-defined value
296 * to enable additional cache attributes, WC, WT and WP.
297 *
298 * This function must be called on all CPUs using the specific sequence of
299 * operations defined in Intel SDM. mtrr_rendezvous_handler() provides this
300 * procedure for PAT.
301 */
302void pat_init(void)
303{
304 u64 pat;
305 struct cpuinfo_x86 *c = &boot_cpu_data;
306
307 if (pat_disabled)
308 return;
309
310 if ((c->x86_vendor == X86_VENDOR_INTEL) &&
311 (((c->x86 == 0x6) && (c->x86_model <= 0xd)) ||
312 ((c->x86 == 0xf) && (c->x86_model <= 0x6)))) {
313 /*
314 * PAT support with the lower four entries. Intel Pentium 2,
315 * 3, M, and 4 are affected by PAT errata, which makes the
316 * upper four entries unusable. To be on the safe side, we don't
317 * use those.
318 *
319 * PTE encoding:
320 * PAT
321 * |PCD
322 * ||PWT PAT
323 * ||| slot
324 * 000 0 WB : _PAGE_CACHE_MODE_WB
325 * 001 1 WC : _PAGE_CACHE_MODE_WC
326 * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
327 * 011 3 UC : _PAGE_CACHE_MODE_UC
328 * PAT bit unused
329 *
330 * NOTE: When WT or WP is used, it is redirected to UC- per
331 * the default setup in __cachemode2pte_tbl[].
332 */
333 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
334 PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
335 } else {
336 /*
337 * Full PAT support. We put WT in slot 7 to improve
338 * robustness in the presence of errata that might cause
339 * the high PAT bit to be ignored. This way, a buggy slot 7
340 * access will hit slot 3, and slot 3 is UC, so at worst
341 * we lose performance without causing a correctness issue.
342 * Pentium 4 erratum N46 is an example for such an erratum,
343 * although we try not to use PAT at all on affected CPUs.
344 *
345 * PTE encoding:
346 * PAT
347 * |PCD
348 * ||PWT PAT
349 * ||| slot
350 * 000 0 WB : _PAGE_CACHE_MODE_WB
351 * 001 1 WC : _PAGE_CACHE_MODE_WC
352 * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
353 * 011 3 UC : _PAGE_CACHE_MODE_UC
354 * 100 4 WB : Reserved
355 * 101 5 WP : _PAGE_CACHE_MODE_WP
356 * 110 6 UC-: Reserved
357 * 111 7 WT : _PAGE_CACHE_MODE_WT
358 *
359 * The reserved slots are unused, but mapped to their
360 * corresponding types in the presence of PAT errata.
361 */
362 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
363 PAT(4, WB) | PAT(5, WP) | PAT(6, UC_MINUS) | PAT(7, WT);
364 }
365
366 if (!boot_cpu_done) {
367 pat_bsp_init(pat);
368 boot_cpu_done = true;
369 } else {
370 pat_ap_init(pat);
371 }
372}
373
374#undef PAT
375
376static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */
377
378/*
379 * Does intersection of PAT memory type and MTRR memory type and returns
380 * the resulting memory type as PAT understands it.
381 * (Type in pat and mtrr will not have same value)
382 * The intersection is based on "Effective Memory Type" tables in IA-32
383 * SDM vol 3a
384 */
385static unsigned long pat_x_mtrr_type(u64 start, u64 end,
386 enum page_cache_mode req_type)
387{
388 /*
389 * Look for MTRR hint to get the effective type in case where PAT
390 * request is for WB.
391 */
392 if (req_type == _PAGE_CACHE_MODE_WB) {
393 u8 mtrr_type, uniform;
394
395 mtrr_type = mtrr_type_lookup(start, end, &uniform);
396 if (mtrr_type != MTRR_TYPE_WRBACK)
397 return _PAGE_CACHE_MODE_UC_MINUS;
398
399 return _PAGE_CACHE_MODE_WB;
400 }
401
402 return req_type;
403}
404
405struct pagerange_state {
406 unsigned long cur_pfn;
407 int ram;
408 int not_ram;
409};
410
411static int
412pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg)
413{
414 struct pagerange_state *state = arg;
415
416 state->not_ram |= initial_pfn > state->cur_pfn;
417 state->ram |= total_nr_pages > 0;
418 state->cur_pfn = initial_pfn + total_nr_pages;
419
420 return state->ram && state->not_ram;
421}
422
423static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end)
424{
425 int ret = 0;
426 unsigned long start_pfn = start >> PAGE_SHIFT;
427 unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
428 struct pagerange_state state = {start_pfn, 0, 0};
429
430 /*
431 * For legacy reasons, physical address range in the legacy ISA
432 * region is tracked as non-RAM. This will allow users of
433 * /dev/mem to map portions of legacy ISA region, even when
434 * some of those portions are listed(or not even listed) with
435 * different e820 types(RAM/reserved/..)
436 */
437 if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT)
438 start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT;
439
440 if (start_pfn < end_pfn) {
441 ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn,
442 &state, pagerange_is_ram_callback);
443 }
444
445 return (ret > 0) ? -1 : (state.ram ? 1 : 0);
446}
447
448/*
449 * For RAM pages, we use page flags to mark the pages with appropriate type.
450 * The page flags are limited to four types, WB (default), WC, WT and UC-.
451 * WP request fails with -EINVAL, and UC gets redirected to UC-. Setting
452 * a new memory type is only allowed for a page mapped with the default WB
453 * type.
454 *
455 * Here we do two passes:
456 * - Find the memtype of all the pages in the range, look for any conflicts.
457 * - In case of no conflicts, set the new memtype for pages in the range.
458 */
459static int reserve_ram_pages_type(u64 start, u64 end,
460 enum page_cache_mode req_type,
461 enum page_cache_mode *new_type)
462{
463 struct page *page;
464 u64 pfn;
465
466 if (req_type == _PAGE_CACHE_MODE_WP) {
467 if (new_type)
468 *new_type = _PAGE_CACHE_MODE_UC_MINUS;
469 return -EINVAL;
470 }
471
472 if (req_type == _PAGE_CACHE_MODE_UC) {
473 /* We do not support strong UC */
474 WARN_ON_ONCE(1);
475 req_type = _PAGE_CACHE_MODE_UC_MINUS;
476 }
477
478 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
479 enum page_cache_mode type;
480
481 page = pfn_to_page(pfn);
482 type = get_page_memtype(page);
483 if (type != _PAGE_CACHE_MODE_WB) {
484 pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n",
485 start, end - 1, type, req_type);
486 if (new_type)
487 *new_type = type;
488
489 return -EBUSY;
490 }
491 }
492
493 if (new_type)
494 *new_type = req_type;
495
496 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
497 page = pfn_to_page(pfn);
498 set_page_memtype(page, req_type);
499 }
500 return 0;
501}
502
503static int free_ram_pages_type(u64 start, u64 end)
504{
505 struct page *page;
506 u64 pfn;
507
508 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
509 page = pfn_to_page(pfn);
510 set_page_memtype(page, _PAGE_CACHE_MODE_WB);
511 }
512 return 0;
513}
514
515static u64 sanitize_phys(u64 address)
516{
517 /*
518 * When changing the memtype for pages containing poison allow
519 * for a "decoy" virtual address (bit 63 clear) passed to
520 * set_memory_X(). __pa() on a "decoy" address results in a
521 * physical address with bit 63 set.
522 *
523 * Decoy addresses are not present for 32-bit builds, see
524 * set_mce_nospec().
525 */
526 if (IS_ENABLED(CONFIG_X86_64))
527 return address & __PHYSICAL_MASK;
528 return address;
529}
530
531/*
532 * req_type typically has one of the:
533 * - _PAGE_CACHE_MODE_WB
534 * - _PAGE_CACHE_MODE_WC
535 * - _PAGE_CACHE_MODE_UC_MINUS
536 * - _PAGE_CACHE_MODE_UC
537 * - _PAGE_CACHE_MODE_WT
538 *
539 * If new_type is NULL, function will return an error if it cannot reserve the
540 * region with req_type. If new_type is non-NULL, function will return
541 * available type in new_type in case of no error. In case of any error
542 * it will return a negative return value.
543 */
544int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type,
545 enum page_cache_mode *new_type)
546{
547 struct memtype *new;
548 enum page_cache_mode actual_type;
549 int is_range_ram;
550 int err = 0;
551
552 start = sanitize_phys(start);
553 end = sanitize_phys(end);
554 if (start >= end) {
555 WARN(1, "%s failed: [mem %#010Lx-%#010Lx], req %s\n", __func__,
556 start, end - 1, cattr_name(req_type));
557 return -EINVAL;
558 }
559
560 if (!pat_enabled()) {
561 /* This is identical to page table setting without PAT */
562 if (new_type)
563 *new_type = req_type;
564 return 0;
565 }
566
567 /* Low ISA region is always mapped WB in page table. No need to track */
568 if (x86_platform.is_untracked_pat_range(start, end)) {
569 if (new_type)
570 *new_type = _PAGE_CACHE_MODE_WB;
571 return 0;
572 }
573
574 /*
575 * Call mtrr_lookup to get the type hint. This is an
576 * optimization for /dev/mem mmap'ers into WB memory (BIOS
577 * tools and ACPI tools). Use WB request for WB memory and use
578 * UC_MINUS otherwise.
579 */
580 actual_type = pat_x_mtrr_type(start, end, req_type);
581
582 if (new_type)
583 *new_type = actual_type;
584
585 is_range_ram = pat_pagerange_is_ram(start, end);
586 if (is_range_ram == 1) {
587
588 err = reserve_ram_pages_type(start, end, req_type, new_type);
589
590 return err;
591 } else if (is_range_ram < 0) {
592 return -EINVAL;
593 }
594
595 new = kzalloc(sizeof(struct memtype), GFP_KERNEL);
596 if (!new)
597 return -ENOMEM;
598
599 new->start = start;
600 new->end = end;
601 new->type = actual_type;
602
603 spin_lock(&memtype_lock);
604
605 err = rbt_memtype_check_insert(new, new_type);
606 if (err) {
607 pr_info("x86/PAT: reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n",
608 start, end - 1,
609 cattr_name(new->type), cattr_name(req_type));
610 kfree(new);
611 spin_unlock(&memtype_lock);
612
613 return err;
614 }
615
616 spin_unlock(&memtype_lock);
617
618 dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n",
619 start, end - 1, cattr_name(new->type), cattr_name(req_type),
620 new_type ? cattr_name(*new_type) : "-");
621
622 return err;
623}
624
625int free_memtype(u64 start, u64 end)
626{
627 int err = -EINVAL;
628 int is_range_ram;
629 struct memtype *entry;
630
631 if (!pat_enabled())
632 return 0;
633
634 start = sanitize_phys(start);
635 end = sanitize_phys(end);
636
637 /* Low ISA region is always mapped WB. No need to track */
638 if (x86_platform.is_untracked_pat_range(start, end))
639 return 0;
640
641 is_range_ram = pat_pagerange_is_ram(start, end);
642 if (is_range_ram == 1) {
643
644 err = free_ram_pages_type(start, end);
645
646 return err;
647 } else if (is_range_ram < 0) {
648 return -EINVAL;
649 }
650
651 spin_lock(&memtype_lock);
652 entry = rbt_memtype_erase(start, end);
653 spin_unlock(&memtype_lock);
654
655 if (IS_ERR(entry)) {
656 pr_info("x86/PAT: %s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n",
657 current->comm, current->pid, start, end - 1);
658 return -EINVAL;
659 }
660
661 kfree(entry);
662
663 dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1);
664
665 return 0;
666}
667
668
669/**
670 * lookup_memtype - Looksup the memory type for a physical address
671 * @paddr: physical address of which memory type needs to be looked up
672 *
673 * Only to be called when PAT is enabled
674 *
675 * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS
676 * or _PAGE_CACHE_MODE_WT.
677 */
678static enum page_cache_mode lookup_memtype(u64 paddr)
679{
680 enum page_cache_mode rettype = _PAGE_CACHE_MODE_WB;
681 struct memtype *entry;
682
683 if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE))
684 return rettype;
685
686 if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {
687 struct page *page;
688
689 page = pfn_to_page(paddr >> PAGE_SHIFT);
690 return get_page_memtype(page);
691 }
692
693 spin_lock(&memtype_lock);
694
695 entry = rbt_memtype_lookup(paddr);
696 if (entry != NULL)
697 rettype = entry->type;
698 else
699 rettype = _PAGE_CACHE_MODE_UC_MINUS;
700
701 spin_unlock(&memtype_lock);
702 return rettype;
703}
704
705/**
706 * pat_pfn_immune_to_uc_mtrr - Check whether the PAT memory type
707 * of @pfn cannot be overridden by UC MTRR memory type.
708 *
709 * Only to be called when PAT is enabled.
710 *
711 * Returns true, if the PAT memory type of @pfn is UC, UC-, or WC.
712 * Returns false in other cases.
713 */
714bool pat_pfn_immune_to_uc_mtrr(unsigned long pfn)
715{
716 enum page_cache_mode cm = lookup_memtype(PFN_PHYS(pfn));
717
718 return cm == _PAGE_CACHE_MODE_UC ||
719 cm == _PAGE_CACHE_MODE_UC_MINUS ||
720 cm == _PAGE_CACHE_MODE_WC;
721}
722EXPORT_SYMBOL_GPL(pat_pfn_immune_to_uc_mtrr);
723
724/**
725 * io_reserve_memtype - Request a memory type mapping for a region of memory
726 * @start: start (physical address) of the region
727 * @end: end (physical address) of the region
728 * @type: A pointer to memtype, with requested type. On success, requested
729 * or any other compatible type that was available for the region is returned
730 *
731 * On success, returns 0
732 * On failure, returns non-zero
733 */
734int io_reserve_memtype(resource_size_t start, resource_size_t end,
735 enum page_cache_mode *type)
736{
737 resource_size_t size = end - start;
738 enum page_cache_mode req_type = *type;
739 enum page_cache_mode new_type;
740 int ret;
741
742 WARN_ON_ONCE(iomem_map_sanity_check(start, size));
743
744 ret = reserve_memtype(start, end, req_type, &new_type);
745 if (ret)
746 goto out_err;
747
748 if (!is_new_memtype_allowed(start, size, req_type, new_type))
749 goto out_free;
750
751 if (kernel_map_sync_memtype(start, size, new_type) < 0)
752 goto out_free;
753
754 *type = new_type;
755 return 0;
756
757out_free:
758 free_memtype(start, end);
759 ret = -EBUSY;
760out_err:
761 return ret;
762}
763
764/**
765 * io_free_memtype - Release a memory type mapping for a region of memory
766 * @start: start (physical address) of the region
767 * @end: end (physical address) of the region
768 */
769void io_free_memtype(resource_size_t start, resource_size_t end)
770{
771 free_memtype(start, end);
772}
773
774int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size)
775{
776 enum page_cache_mode type = _PAGE_CACHE_MODE_WC;
777
778 return io_reserve_memtype(start, start + size, &type);
779}
780EXPORT_SYMBOL(arch_io_reserve_memtype_wc);
781
782void arch_io_free_memtype_wc(resource_size_t start, resource_size_t size)
783{
784 io_free_memtype(start, start + size);
785}
786EXPORT_SYMBOL(arch_io_free_memtype_wc);
787
788pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
789 unsigned long size, pgprot_t vma_prot)
790{
791 if (!phys_mem_access_encrypted(pfn << PAGE_SHIFT, size))
792 vma_prot = pgprot_decrypted(vma_prot);
793
794 return vma_prot;
795}
796
797#ifdef CONFIG_STRICT_DEVMEM
798/* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM */
799static inline int range_is_allowed(unsigned long pfn, unsigned long size)
800{
801 return 1;
802}
803#else
804/* This check is needed to avoid cache aliasing when PAT is enabled */
805static inline int range_is_allowed(unsigned long pfn, unsigned long size)
806{
807 u64 from = ((u64)pfn) << PAGE_SHIFT;
808 u64 to = from + size;
809 u64 cursor = from;
810
811 if (!pat_enabled())
812 return 1;
813
814 while (cursor < to) {
815 if (!devmem_is_allowed(pfn))
816 return 0;
817 cursor += PAGE_SIZE;
818 pfn++;
819 }
820 return 1;
821}
822#endif /* CONFIG_STRICT_DEVMEM */
823
824int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
825 unsigned long size, pgprot_t *vma_prot)
826{
827 enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB;
828
829 if (!range_is_allowed(pfn, size))
830 return 0;
831
832 if (file->f_flags & O_DSYNC)
833 pcm = _PAGE_CACHE_MODE_UC_MINUS;
834
835 *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) |
836 cachemode2protval(pcm));
837 return 1;
838}
839
840/*
841 * Change the memory type for the physial address range in kernel identity
842 * mapping space if that range is a part of identity map.
843 */
844int kernel_map_sync_memtype(u64 base, unsigned long size,
845 enum page_cache_mode pcm)
846{
847 unsigned long id_sz;
848
849 if (base > __pa(high_memory-1))
850 return 0;
851
852 /*
853 * some areas in the middle of the kernel identity range
854 * are not mapped, like the PCI space.
855 */
856 if (!page_is_ram(base >> PAGE_SHIFT))
857 return 0;
858
859 id_sz = (__pa(high_memory-1) <= base + size) ?
860 __pa(high_memory) - base :
861 size;
862
863 if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) < 0) {
864 pr_info("x86/PAT: %s:%d ioremap_change_attr failed %s for [mem %#010Lx-%#010Lx]\n",
865 current->comm, current->pid,
866 cattr_name(pcm),
867 base, (unsigned long long)(base + size-1));
868 return -EINVAL;
869 }
870 return 0;
871}
872
873/*
874 * Internal interface to reserve a range of physical memory with prot.
875 * Reserved non RAM regions only and after successful reserve_memtype,
876 * this func also keeps identity mapping (if any) in sync with this new prot.
877 */
878static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
879 int strict_prot)
880{
881 int is_ram = 0;
882 int ret;
883 enum page_cache_mode want_pcm = pgprot2cachemode(*vma_prot);
884 enum page_cache_mode pcm = want_pcm;
885
886 is_ram = pat_pagerange_is_ram(paddr, paddr + size);
887
888 /*
889 * reserve_pfn_range() for RAM pages. We do not refcount to keep
890 * track of number of mappings of RAM pages. We can assert that
891 * the type requested matches the type of first page in the range.
892 */
893 if (is_ram) {
894 if (!pat_enabled())
895 return 0;
896
897 pcm = lookup_memtype(paddr);
898 if (want_pcm != pcm) {
899 pr_warn("x86/PAT: %s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n",
900 current->comm, current->pid,
901 cattr_name(want_pcm),
902 (unsigned long long)paddr,
903 (unsigned long long)(paddr + size - 1),
904 cattr_name(pcm));
905 *vma_prot = __pgprot((pgprot_val(*vma_prot) &
906 (~_PAGE_CACHE_MASK)) |
907 cachemode2protval(pcm));
908 }
909 return 0;
910 }
911
912 ret = reserve_memtype(paddr, paddr + size, want_pcm, &pcm);
913 if (ret)
914 return ret;
915
916 if (pcm != want_pcm) {
917 if (strict_prot ||
918 !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) {
919 free_memtype(paddr, paddr + size);
920 pr_err("x86/PAT: %s:%d map pfn expected mapping type %s for [mem %#010Lx-%#010Lx], got %s\n",
921 current->comm, current->pid,
922 cattr_name(want_pcm),
923 (unsigned long long)paddr,
924 (unsigned long long)(paddr + size - 1),
925 cattr_name(pcm));
926 return -EINVAL;
927 }
928 /*
929 * We allow returning different type than the one requested in
930 * non strict case.
931 */
932 *vma_prot = __pgprot((pgprot_val(*vma_prot) &
933 (~_PAGE_CACHE_MASK)) |
934 cachemode2protval(pcm));
935 }
936
937 if (kernel_map_sync_memtype(paddr, size, pcm) < 0) {
938 free_memtype(paddr, paddr + size);
939 return -EINVAL;
940 }
941 return 0;
942}
943
944/*
945 * Internal interface to free a range of physical memory.
946 * Frees non RAM regions only.
947 */
948static void free_pfn_range(u64 paddr, unsigned long size)
949{
950 int is_ram;
951
952 is_ram = pat_pagerange_is_ram(paddr, paddr + size);
953 if (is_ram == 0)
954 free_memtype(paddr, paddr + size);
955}
956
957/*
958 * track_pfn_copy is called when vma that is covering the pfnmap gets
959 * copied through copy_page_range().
960 *
961 * If the vma has a linear pfn mapping for the entire range, we get the prot
962 * from pte and reserve the entire vma range with single reserve_pfn_range call.
963 */
964int track_pfn_copy(struct vm_area_struct *vma)
965{
966 resource_size_t paddr;
967 unsigned long prot;
968 unsigned long vma_size = vma->vm_end - vma->vm_start;
969 pgprot_t pgprot;
970
971 if (vma->vm_flags & VM_PAT) {
972 /*
973 * reserve the whole chunk covered by vma. We need the
974 * starting address and protection from pte.
975 */
976 if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
977 WARN_ON_ONCE(1);
978 return -EINVAL;
979 }
980 pgprot = __pgprot(prot);
981 return reserve_pfn_range(paddr, vma_size, &pgprot, 1);
982 }
983
984 return 0;
985}
986
987/*
988 * prot is passed in as a parameter for the new mapping. If the vma has
989 * a linear pfn mapping for the entire range, or no vma is provided,
990 * reserve the entire pfn + size range with single reserve_pfn_range
991 * call.
992 */
993int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
994 unsigned long pfn, unsigned long addr, unsigned long size)
995{
996 resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT;
997 enum page_cache_mode pcm;
998
999 /* reserve the whole chunk starting from paddr */
1000 if (!vma || (addr == vma->vm_start
1001 && size == (vma->vm_end - vma->vm_start))) {
1002 int ret;
1003
1004 ret = reserve_pfn_range(paddr, size, prot, 0);
1005 if (ret == 0 && vma)
1006 vma->vm_flags |= VM_PAT;
1007 return ret;
1008 }
1009
1010 if (!pat_enabled())
1011 return 0;
1012
1013 /*
1014 * For anything smaller than the vma size we set prot based on the
1015 * lookup.
1016 */
1017 pcm = lookup_memtype(paddr);
1018
1019 /* Check memtype for the remaining pages */
1020 while (size > PAGE_SIZE) {
1021 size -= PAGE_SIZE;
1022 paddr += PAGE_SIZE;
1023 if (pcm != lookup_memtype(paddr))
1024 return -EINVAL;
1025 }
1026
1027 *prot = __pgprot((pgprot_val(*prot) & (~_PAGE_CACHE_MASK)) |
1028 cachemode2protval(pcm));
1029
1030 return 0;
1031}
1032
1033void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, pfn_t pfn)
1034{
1035 enum page_cache_mode pcm;
1036
1037 if (!pat_enabled())
1038 return;
1039
1040 /* Set prot based on lookup */
1041 pcm = lookup_memtype(pfn_t_to_phys(pfn));
1042 *prot = __pgprot((pgprot_val(*prot) & (~_PAGE_CACHE_MASK)) |
1043 cachemode2protval(pcm));
1044}
1045
1046/*
1047 * untrack_pfn is called while unmapping a pfnmap for a region.
1048 * untrack can be called for a specific region indicated by pfn and size or
1049 * can be for the entire vma (in which case pfn, size are zero).
1050 */
1051void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1052 unsigned long size)
1053{
1054 resource_size_t paddr;
1055 unsigned long prot;
1056
1057 if (vma && !(vma->vm_flags & VM_PAT))
1058 return;
1059
1060 /* free the chunk starting from pfn or the whole chunk */
1061 paddr = (resource_size_t)pfn << PAGE_SHIFT;
1062 if (!paddr && !size) {
1063 if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
1064 WARN_ON_ONCE(1);
1065 return;
1066 }
1067
1068 size = vma->vm_end - vma->vm_start;
1069 }
1070 free_pfn_range(paddr, size);
1071 if (vma)
1072 vma->vm_flags &= ~VM_PAT;
1073}
1074
1075/*
1076 * untrack_pfn_moved is called, while mremapping a pfnmap for a new region,
1077 * with the old vma after its pfnmap page table has been removed. The new
1078 * vma has a new pfnmap to the same pfn & cache type with VM_PAT set.
1079 */
1080void untrack_pfn_moved(struct vm_area_struct *vma)
1081{
1082 vma->vm_flags &= ~VM_PAT;
1083}
1084
1085pgprot_t pgprot_writecombine(pgprot_t prot)
1086{
1087 return __pgprot(pgprot_val(prot) |
1088 cachemode2protval(_PAGE_CACHE_MODE_WC));
1089}
1090EXPORT_SYMBOL_GPL(pgprot_writecombine);
1091
1092pgprot_t pgprot_writethrough(pgprot_t prot)
1093{
1094 return __pgprot(pgprot_val(prot) |
1095 cachemode2protval(_PAGE_CACHE_MODE_WT));
1096}
1097EXPORT_SYMBOL_GPL(pgprot_writethrough);
1098
1099#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
1100
1101static struct memtype *memtype_get_idx(loff_t pos)
1102{
1103 struct memtype *print_entry;
1104 int ret;
1105
1106 print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL);
1107 if (!print_entry)
1108 return NULL;
1109
1110 spin_lock(&memtype_lock);
1111 ret = rbt_memtype_copy_nth_element(print_entry, pos);
1112 spin_unlock(&memtype_lock);
1113
1114 if (!ret) {
1115 return print_entry;
1116 } else {
1117 kfree(print_entry);
1118 return NULL;
1119 }
1120}
1121
1122static void *memtype_seq_start(struct seq_file *seq, loff_t *pos)
1123{
1124 if (*pos == 0) {
1125 ++*pos;
1126 seq_puts(seq, "PAT memtype list:\n");
1127 }
1128
1129 return memtype_get_idx(*pos);
1130}
1131
1132static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos)
1133{
1134 ++*pos;
1135 return memtype_get_idx(*pos);
1136}
1137
1138static void memtype_seq_stop(struct seq_file *seq, void *v)
1139{
1140}
1141
1142static int memtype_seq_show(struct seq_file *seq, void *v)
1143{
1144 struct memtype *print_entry = (struct memtype *)v;
1145
1146 seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type),
1147 print_entry->start, print_entry->end);
1148 kfree(print_entry);
1149
1150 return 0;
1151}
1152
1153static const struct seq_operations memtype_seq_ops = {
1154 .start = memtype_seq_start,
1155 .next = memtype_seq_next,
1156 .stop = memtype_seq_stop,
1157 .show = memtype_seq_show,
1158};
1159
1160static int memtype_seq_open(struct inode *inode, struct file *file)
1161{
1162 return seq_open(file, &memtype_seq_ops);
1163}
1164
1165static const struct file_operations memtype_fops = {
1166 .open = memtype_seq_open,
1167 .read = seq_read,
1168 .llseek = seq_lseek,
1169 .release = seq_release,
1170};
1171
1172static int __init pat_memtype_list_init(void)
1173{
1174 if (pat_enabled()) {
1175 debugfs_create_file("pat_memtype_list", S_IRUSR,
1176 arch_debugfs_dir, NULL, &memtype_fops);
1177 }
1178 return 0;
1179}
1180
1181late_initcall(pat_memtype_list_init);
1182
1183#endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */
1184