1 | /* |
2 | * pata_ali.c - ALI 15x3 PATA for new ATA layer |
3 | * (C) 2005 Red Hat Inc |
4 | * |
5 | * based in part upon |
6 | * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 |
7 | * |
8 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer |
9 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer |
10 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer |
11 | * |
12 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) |
13 | * May be copied or modified under the terms of the GNU General Public License |
14 | * Copyright (C) 2002 Alan Cox <alan@redhat.com> |
15 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> |
16 | * |
17 | * Documentation |
18 | * Chipset documentation available under NDA only |
19 | * |
20 | * TODO/CHECK |
21 | * Cannot have ATAPI on both master & slave for rev < c2 (???) but |
22 | * otherwise should do atapi DMA (For now for old we do PIO only for |
23 | * ATAPI) |
24 | * Review Sunblade workaround. |
25 | */ |
26 | |
27 | #include <linux/kernel.h> |
28 | #include <linux/module.h> |
29 | #include <linux/pci.h> |
30 | #include <linux/init.h> |
31 | #include <linux/blkdev.h> |
32 | #include <linux/delay.h> |
33 | #include <scsi/scsi_host.h> |
34 | #include <linux/libata.h> |
35 | #include <linux/dmi.h> |
36 | |
37 | #define DRV_NAME "pata_ali" |
38 | #define DRV_VERSION "0.7.8" |
39 | |
40 | static int ali_atapi_dma; |
41 | module_param_named(atapi_dma, ali_atapi_dma, int, 0644); |
42 | MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)" ); |
43 | |
44 | static struct pci_dev *ali_isa_bridge; |
45 | |
46 | /* |
47 | * Cable special cases |
48 | */ |
49 | |
50 | static const struct dmi_system_id cable_dmi_table[] = { |
51 | { |
52 | .ident = "HP Pavilion N5430" , |
53 | .matches = { |
54 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard" ), |
55 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736" ), |
56 | }, |
57 | }, |
58 | { |
59 | .ident = "Toshiba Satellite S1800-814" , |
60 | .matches = { |
61 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA" ), |
62 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814" ), |
63 | }, |
64 | }, |
65 | { } |
66 | }; |
67 | |
68 | static int ali_cable_override(struct pci_dev *pdev) |
69 | { |
70 | /* Fujitsu P2000 */ |
71 | if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) |
72 | return 1; |
73 | /* Mitac 8317 (Winbook-A) and relatives */ |
74 | if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) |
75 | return 1; |
76 | /* Systems by DMI */ |
77 | if (dmi_check_system(list: cable_dmi_table)) |
78 | return 1; |
79 | return 0; |
80 | } |
81 | |
82 | /** |
83 | * ali_c2_cable_detect - cable detection |
84 | * @ap: ATA port |
85 | * |
86 | * Perform cable detection for C2 and later revisions |
87 | */ |
88 | |
89 | static int ali_c2_cable_detect(struct ata_port *ap) |
90 | { |
91 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
92 | u8 ata66; |
93 | |
94 | /* Certain laptops use short but suitable cables and don't |
95 | implement the detect logic */ |
96 | |
97 | if (ali_cable_override(pdev)) |
98 | return ATA_CBL_PATA40_SHORT; |
99 | |
100 | /* Host view cable detect 0x4A bit 0 primary bit 1 secondary |
101 | Bit set for 40 pin */ |
102 | pci_read_config_byte(dev: pdev, where: 0x4A, val: &ata66); |
103 | if (ata66 & (1 << ap->port_no)) |
104 | return ATA_CBL_PATA40; |
105 | else |
106 | return ATA_CBL_PATA80; |
107 | } |
108 | |
109 | /** |
110 | * ali_20_filter - filter for earlier ALI DMA |
111 | * @adev: ATA device |
112 | * @mask: received mask to manipulate and pass back |
113 | * |
114 | * Ensure that we do not do DMA on CD devices. We may be able to |
115 | * fix that later on. Also ensure we do not do UDMA on WDC drives |
116 | */ |
117 | |
118 | static unsigned int ali_20_filter(struct ata_device *adev, unsigned int mask) |
119 | { |
120 | char model_num[ATA_ID_PROD_LEN + 1]; |
121 | /* No DMA on anything but a disk for now */ |
122 | if (adev->class != ATA_DEV_ATA) |
123 | mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
124 | ata_id_c_string(id: adev->id, s: model_num, ofs: ATA_ID_PROD, len: sizeof(model_num)); |
125 | if (strstr(model_num, "WDC" )) |
126 | mask &= ~ATA_MASK_UDMA; |
127 | return mask; |
128 | } |
129 | |
130 | /** |
131 | * ali_fifo_control - FIFO manager |
132 | * @ap: ALi channel to control |
133 | * @adev: device for FIFO control |
134 | * @on: 0 for off 1 for on |
135 | * |
136 | * Enable or disable the FIFO on a given device. Because of the way the |
137 | * ALi FIFO works it provides a boost on ATA disk but can be confused by |
138 | * ATAPI and we must therefore manage it. |
139 | */ |
140 | |
141 | static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) |
142 | { |
143 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
144 | int pio_fifo = 0x54 + ap->port_no; |
145 | u8 fifo; |
146 | int shift = 4 * adev->devno; |
147 | |
148 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to |
149 | 0x00. Not all the docs agree but the behaviour we now use is the |
150 | one stated in the BIOS Programming Guide */ |
151 | |
152 | pci_read_config_byte(dev: pdev, where: pio_fifo, val: &fifo); |
153 | fifo &= ~(0x0F << shift); |
154 | fifo |= (on << shift); |
155 | pci_write_config_byte(dev: pdev, where: pio_fifo, val: fifo); |
156 | } |
157 | |
158 | /** |
159 | * ali_program_modes - load mode registers |
160 | * @ap: ALi channel to load |
161 | * @adev: Device the timing is for |
162 | * @t: timing data |
163 | * @ultra: UDMA timing or zero for off |
164 | * |
165 | * Loads the timing registers for cmd/data and disable UDMA if |
166 | * ultra is zero. If ultra is set then load and enable the UDMA |
167 | * timing but do not touch the command/data timing. |
168 | */ |
169 | |
170 | static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) |
171 | { |
172 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
173 | int cas = 0x58 + 4 * ap->port_no; /* Command timing */ |
174 | int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ |
175 | int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ |
176 | int udmat = 0x56 + ap->port_no; /* UDMA timing */ |
177 | int shift = 4 * adev->devno; |
178 | u8 udma; |
179 | |
180 | if (t != NULL) { |
181 | t->setup = clamp_val(t->setup, 1, 8) & 7; |
182 | t->act8b = clamp_val(t->act8b, 1, 8) & 7; |
183 | t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; |
184 | t->active = clamp_val(t->active, 1, 8) & 7; |
185 | t->recover = clamp_val(t->recover, 1, 16) & 15; |
186 | |
187 | pci_write_config_byte(dev: pdev, where: cas, val: t->setup); |
188 | pci_write_config_byte(dev: pdev, where: cbt, val: (t->act8b << 4) | t->rec8b); |
189 | pci_write_config_byte(dev: pdev, where: drwt, val: (t->active << 4) | t->recover); |
190 | } |
191 | |
192 | /* Set up the UDMA enable */ |
193 | pci_read_config_byte(dev: pdev, where: udmat, val: &udma); |
194 | udma &= ~(0x0F << shift); |
195 | udma |= ultra << shift; |
196 | pci_write_config_byte(dev: pdev, where: udmat, val: udma); |
197 | } |
198 | |
199 | /** |
200 | * ali_set_piomode - set initial PIO mode data |
201 | * @ap: ATA interface |
202 | * @adev: ATA device |
203 | * |
204 | * Program the ALi registers for PIO mode. |
205 | */ |
206 | |
207 | static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) |
208 | { |
209 | struct ata_device *pair = ata_dev_pair(adev); |
210 | struct ata_timing t; |
211 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ |
212 | |
213 | ata_timing_compute(adev, adev->pio_mode, &t, T, 1); |
214 | if (pair) { |
215 | struct ata_timing p; |
216 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); |
217 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); |
218 | if (ata_dma_enabled(adev: pair)) { |
219 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); |
220 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); |
221 | } |
222 | } |
223 | |
224 | /* PIO FIFO is only permitted on ATA disk */ |
225 | if (adev->class != ATA_DEV_ATA) |
226 | ali_fifo_control(ap, adev, on: 0x00); |
227 | ali_program_modes(ap, adev, t: &t, ultra: 0); |
228 | if (adev->class == ATA_DEV_ATA) |
229 | ali_fifo_control(ap, adev, on: 0x05); |
230 | |
231 | } |
232 | |
233 | /** |
234 | * ali_set_dmamode - set initial DMA mode data |
235 | * @ap: ATA interface |
236 | * @adev: ATA device |
237 | * |
238 | * Program the ALi registers for DMA mode. |
239 | */ |
240 | |
241 | static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
242 | { |
243 | static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; |
244 | struct ata_device *pair = ata_dev_pair(adev); |
245 | struct ata_timing t; |
246 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ |
247 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
248 | |
249 | |
250 | if (adev->class == ATA_DEV_ATA) |
251 | ali_fifo_control(ap, adev, on: 0x08); |
252 | |
253 | if (adev->dma_mode >= XFER_UDMA_0) { |
254 | ali_program_modes(ap, adev, NULL, ultra: udma_timing[adev->dma_mode - XFER_UDMA_0]); |
255 | if (adev->dma_mode >= XFER_UDMA_3) { |
256 | u8 reg4b; |
257 | pci_read_config_byte(dev: pdev, where: 0x4B, val: ®4b); |
258 | reg4b |= 1; |
259 | pci_write_config_byte(dev: pdev, where: 0x4B, val: reg4b); |
260 | } |
261 | } else { |
262 | ata_timing_compute(adev, adev->dma_mode, &t, T, 1); |
263 | if (pair) { |
264 | struct ata_timing p; |
265 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); |
266 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); |
267 | if (ata_dma_enabled(adev: pair)) { |
268 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); |
269 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); |
270 | } |
271 | } |
272 | ali_program_modes(ap, adev, t: &t, ultra: 0); |
273 | } |
274 | } |
275 | |
276 | /** |
277 | * ali_warn_atapi_dma - Warn about ATAPI DMA disablement |
278 | * @adev: Device |
279 | * |
280 | * Whine about ATAPI DMA disablement if @adev is an ATAPI device. |
281 | * Can be used as ->dev_config. |
282 | */ |
283 | |
284 | static void ali_warn_atapi_dma(struct ata_device *adev) |
285 | { |
286 | struct ata_eh_context *ehc = &adev->link->eh_context; |
287 | int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; |
288 | |
289 | if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) { |
290 | ata_dev_warn(adev, |
291 | "WARNING: ATAPI DMA disabled for reliability issues. It can be enabled\n" ); |
292 | ata_dev_warn(adev, |
293 | "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n" ); |
294 | } |
295 | } |
296 | |
297 | /** |
298 | * ali_lock_sectors - Keep older devices to 255 sector mode |
299 | * @adev: Device |
300 | * |
301 | * Called during the bus probe for each device that is found. We use |
302 | * this call to lock the sector count of the device to 255 or less on |
303 | * older ALi controllers. If we didn't do this then large I/O's would |
304 | * require LBA48 commands which the older ALi requires are issued by |
305 | * slower PIO methods |
306 | */ |
307 | |
308 | static void ali_lock_sectors(struct ata_device *adev) |
309 | { |
310 | adev->max_sectors = 255; |
311 | ali_warn_atapi_dma(adev); |
312 | } |
313 | |
314 | /** |
315 | * ali_check_atapi_dma - DMA check for most ALi controllers |
316 | * @qc: Command to complete |
317 | * |
318 | * Called to decide whether commands should be sent by DMA or PIO |
319 | */ |
320 | |
321 | static int ali_check_atapi_dma(struct ata_queued_cmd *qc) |
322 | { |
323 | if (!ali_atapi_dma) { |
324 | /* FIXME: pata_ali can't do ATAPI DMA reliably but the |
325 | * IDE alim15x3 driver can. I tried lots of things |
326 | * but couldn't find what the actual difference was. |
327 | * If you got an idea, please write it to |
328 | * linux-ide@vger.kernel.org and cc htejun@gmail.com. |
329 | * |
330 | * Disable ATAPI DMA for now. |
331 | */ |
332 | return -EOPNOTSUPP; |
333 | } |
334 | |
335 | /* If its not a media command, its not worth it */ |
336 | if (atapi_cmd_type(opcode: qc->cdb[0]) == ATAPI_MISC) |
337 | return -EOPNOTSUPP; |
338 | return 0; |
339 | } |
340 | |
341 | static void ali_c2_c3_postreset(struct ata_link *link, unsigned int *classes) |
342 | { |
343 | u8 r; |
344 | int port_bit = 4 << link->ap->port_no; |
345 | |
346 | /* If our bridge is an ALI 1533 then do the extra work */ |
347 | if (ali_isa_bridge) { |
348 | /* Tristate and re-enable the bus signals */ |
349 | pci_read_config_byte(dev: ali_isa_bridge, where: 0x58, val: &r); |
350 | r &= ~port_bit; |
351 | pci_write_config_byte(dev: ali_isa_bridge, where: 0x58, val: r); |
352 | r |= port_bit; |
353 | pci_write_config_byte(dev: ali_isa_bridge, where: 0x58, val: r); |
354 | } |
355 | ata_sff_postreset(link, classes); |
356 | } |
357 | |
358 | static const struct scsi_host_template ali_sht = { |
359 | ATA_BMDMA_SHT(DRV_NAME), |
360 | }; |
361 | |
362 | /* |
363 | * Port operations for PIO only ALi |
364 | */ |
365 | |
366 | static struct ata_port_operations ali_early_port_ops = { |
367 | .inherits = &ata_sff_port_ops, |
368 | .cable_detect = ata_cable_40wire, |
369 | .set_piomode = ali_set_piomode, |
370 | .sff_data_xfer = ata_sff_data_xfer32, |
371 | }; |
372 | |
373 | static const struct ata_port_operations ali_dma_base_ops = { |
374 | .inherits = &ata_bmdma32_port_ops, |
375 | .set_piomode = ali_set_piomode, |
376 | .set_dmamode = ali_set_dmamode, |
377 | }; |
378 | |
379 | /* |
380 | * Port operations for DMA capable ALi without cable |
381 | * detect |
382 | */ |
383 | static struct ata_port_operations ali_20_port_ops = { |
384 | .inherits = &ali_dma_base_ops, |
385 | .cable_detect = ata_cable_40wire, |
386 | .mode_filter = ali_20_filter, |
387 | .check_atapi_dma = ali_check_atapi_dma, |
388 | .dev_config = ali_lock_sectors, |
389 | }; |
390 | |
391 | /* |
392 | * Port operations for DMA capable ALi with cable detect |
393 | */ |
394 | static struct ata_port_operations ali_c2_port_ops = { |
395 | .inherits = &ali_dma_base_ops, |
396 | .check_atapi_dma = ali_check_atapi_dma, |
397 | .cable_detect = ali_c2_cable_detect, |
398 | .dev_config = ali_lock_sectors, |
399 | .postreset = ali_c2_c3_postreset, |
400 | }; |
401 | |
402 | /* |
403 | * Port operations for DMA capable ALi with cable detect |
404 | */ |
405 | static struct ata_port_operations ali_c4_port_ops = { |
406 | .inherits = &ali_dma_base_ops, |
407 | .check_atapi_dma = ali_check_atapi_dma, |
408 | .cable_detect = ali_c2_cable_detect, |
409 | .dev_config = ali_lock_sectors, |
410 | }; |
411 | |
412 | /* |
413 | * Port operations for DMA capable ALi with cable detect and LBA48 |
414 | */ |
415 | static struct ata_port_operations ali_c5_port_ops = { |
416 | .inherits = &ali_dma_base_ops, |
417 | .check_atapi_dma = ali_check_atapi_dma, |
418 | .dev_config = ali_warn_atapi_dma, |
419 | .cable_detect = ali_c2_cable_detect, |
420 | }; |
421 | |
422 | |
423 | /** |
424 | * ali_init_chipset - chip setup function |
425 | * @pdev: PCI device of ATA controller |
426 | * |
427 | * Perform the setup on the device that must be done both at boot |
428 | * and at resume time. |
429 | */ |
430 | |
431 | static void ali_init_chipset(struct pci_dev *pdev) |
432 | { |
433 | u8 tmp; |
434 | struct pci_dev *north; |
435 | |
436 | /* |
437 | * The chipset revision selects the driver operations and |
438 | * mode data. |
439 | */ |
440 | |
441 | if (pdev->revision <= 0x20) { |
442 | pci_read_config_byte(dev: pdev, where: 0x53, val: &tmp); |
443 | tmp |= 0x03; |
444 | pci_write_config_byte(dev: pdev, where: 0x53, val: tmp); |
445 | } else { |
446 | pci_read_config_byte(dev: pdev, where: 0x4a, val: &tmp); |
447 | pci_write_config_byte(dev: pdev, where: 0x4a, val: tmp | 0x20); |
448 | pci_read_config_byte(dev: pdev, where: 0x4B, val: &tmp); |
449 | if (pdev->revision < 0xC2) |
450 | /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ |
451 | /* Clear CD-ROM DMA write bit */ |
452 | tmp &= 0x7F; |
453 | /* Cable and UDMA */ |
454 | if (pdev->revision >= 0xc2) |
455 | tmp |= 0x01; |
456 | pci_write_config_byte(dev: pdev, where: 0x4B, val: tmp | 0x08); |
457 | /* |
458 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want |
459 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control |
460 | * via 0x54/55. |
461 | */ |
462 | pci_read_config_byte(dev: pdev, where: 0x53, val: &tmp); |
463 | if (pdev->revision >= 0xc7) |
464 | tmp |= 0x03; |
465 | else |
466 | tmp |= 0x01; /* CD_ROM enable for DMA */ |
467 | pci_write_config_byte(dev: pdev, where: 0x53, val: tmp); |
468 | } |
469 | north = pci_get_domain_bus_and_slot(domain: pci_domain_nr(bus: pdev->bus), bus: 0, |
470 | PCI_DEVFN(0, 0)); |
471 | if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) { |
472 | /* Configure the ALi bridge logic. For non ALi rely on BIOS. |
473 | Set the south bridge enable bit */ |
474 | pci_read_config_byte(dev: ali_isa_bridge, where: 0x79, val: &tmp); |
475 | if (pdev->revision == 0xC2) |
476 | pci_write_config_byte(dev: ali_isa_bridge, where: 0x79, val: tmp | 0x04); |
477 | else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) |
478 | pci_write_config_byte(dev: ali_isa_bridge, where: 0x79, val: tmp | 0x02); |
479 | } |
480 | pci_dev_put(dev: north); |
481 | ata_pci_bmdma_clear_simplex(pdev); |
482 | } |
483 | /** |
484 | * ali_init_one - discovery callback |
485 | * @pdev: PCI device ID |
486 | * @id: PCI table info |
487 | * |
488 | * An ALi IDE interface has been discovered. Figure out what revision |
489 | * and perform configuration work before handing it to the ATA layer |
490 | */ |
491 | |
492 | static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
493 | { |
494 | static const struct ata_port_info info_early = { |
495 | .flags = ATA_FLAG_SLAVE_POSS, |
496 | .pio_mask = ATA_PIO4, |
497 | .port_ops = &ali_early_port_ops |
498 | }; |
499 | /* Revision 0x20 added DMA */ |
500 | static const struct ata_port_info info_20 = { |
501 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | |
502 | ATA_FLAG_IGN_SIMPLEX, |
503 | .pio_mask = ATA_PIO4, |
504 | .mwdma_mask = ATA_MWDMA2, |
505 | .port_ops = &ali_20_port_ops |
506 | }; |
507 | /* Revision 0x20 with support logic added UDMA */ |
508 | static const struct ata_port_info info_20_udma = { |
509 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | |
510 | ATA_FLAG_IGN_SIMPLEX, |
511 | .pio_mask = ATA_PIO4, |
512 | .mwdma_mask = ATA_MWDMA2, |
513 | .udma_mask = ATA_UDMA2, |
514 | .port_ops = &ali_20_port_ops |
515 | }; |
516 | /* Revision 0xC2 adds UDMA66 */ |
517 | static const struct ata_port_info info_c2 = { |
518 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | |
519 | ATA_FLAG_IGN_SIMPLEX, |
520 | .pio_mask = ATA_PIO4, |
521 | .mwdma_mask = ATA_MWDMA2, |
522 | .udma_mask = ATA_UDMA4, |
523 | .port_ops = &ali_c2_port_ops |
524 | }; |
525 | /* Revision 0xC3 is UDMA66 for now */ |
526 | static const struct ata_port_info info_c3 = { |
527 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | |
528 | ATA_FLAG_IGN_SIMPLEX, |
529 | .pio_mask = ATA_PIO4, |
530 | .mwdma_mask = ATA_MWDMA2, |
531 | .udma_mask = ATA_UDMA4, |
532 | .port_ops = &ali_c2_port_ops |
533 | }; |
534 | /* Revision 0xC4 is UDMA100 */ |
535 | static const struct ata_port_info info_c4 = { |
536 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 | |
537 | ATA_FLAG_IGN_SIMPLEX, |
538 | .pio_mask = ATA_PIO4, |
539 | .mwdma_mask = ATA_MWDMA2, |
540 | .udma_mask = ATA_UDMA5, |
541 | .port_ops = &ali_c4_port_ops |
542 | }; |
543 | /* Revision 0xC5 is UDMA133 with LBA48 DMA */ |
544 | static const struct ata_port_info info_c5 = { |
545 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_IGN_SIMPLEX, |
546 | .pio_mask = ATA_PIO4, |
547 | .mwdma_mask = ATA_MWDMA2, |
548 | .udma_mask = ATA_UDMA6, |
549 | .port_ops = &ali_c5_port_ops |
550 | }; |
551 | |
552 | const struct ata_port_info *ppi[] = { NULL, NULL }; |
553 | u8 tmp; |
554 | int rc; |
555 | |
556 | rc = pcim_enable_device(pdev); |
557 | if (rc) |
558 | return rc; |
559 | |
560 | /* |
561 | * The chipset revision selects the driver operations and |
562 | * mode data. |
563 | */ |
564 | |
565 | if (pdev->revision < 0x20) { |
566 | ppi[0] = &info_early; |
567 | } else if (pdev->revision < 0xC2) { |
568 | ppi[0] = &info_20; |
569 | } else if (pdev->revision == 0xC2) { |
570 | ppi[0] = &info_c2; |
571 | } else if (pdev->revision == 0xC3) { |
572 | ppi[0] = &info_c3; |
573 | } else if (pdev->revision == 0xC4) { |
574 | ppi[0] = &info_c4; |
575 | } else |
576 | ppi[0] = &info_c5; |
577 | |
578 | ali_init_chipset(pdev); |
579 | |
580 | if (ali_isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { |
581 | /* Are we paired with a UDMA capable chip */ |
582 | pci_read_config_byte(dev: ali_isa_bridge, where: 0x5E, val: &tmp); |
583 | if ((tmp & 0x1E) == 0x12) |
584 | ppi[0] = &info_20_udma; |
585 | } |
586 | |
587 | if (!ppi[0]->mwdma_mask && !ppi[0]->udma_mask) |
588 | return ata_pci_sff_init_one(pdev, ppi, sht: &ali_sht, NULL, hflags: 0); |
589 | else |
590 | return ata_pci_bmdma_init_one(pdev, ppi, sht: &ali_sht, NULL, hflags: 0); |
591 | } |
592 | |
593 | #ifdef CONFIG_PM_SLEEP |
594 | static int ali_reinit_one(struct pci_dev *pdev) |
595 | { |
596 | struct ata_host *host = pci_get_drvdata(pdev); |
597 | int rc; |
598 | |
599 | rc = ata_pci_device_do_resume(pdev); |
600 | if (rc) |
601 | return rc; |
602 | ali_init_chipset(pdev); |
603 | ata_host_resume(host); |
604 | return 0; |
605 | } |
606 | #endif |
607 | |
608 | static const struct pci_device_id ali[] = { |
609 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, |
610 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, |
611 | |
612 | { }, |
613 | }; |
614 | |
615 | static struct pci_driver ali_pci_driver = { |
616 | .name = DRV_NAME, |
617 | .id_table = ali, |
618 | .probe = ali_init_one, |
619 | .remove = ata_pci_remove_one, |
620 | #ifdef CONFIG_PM_SLEEP |
621 | .suspend = ata_pci_device_suspend, |
622 | .resume = ali_reinit_one, |
623 | #endif |
624 | }; |
625 | |
626 | static int __init ali_init(void) |
627 | { |
628 | int ret; |
629 | ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
630 | |
631 | ret = pci_register_driver(&ali_pci_driver); |
632 | if (ret < 0) |
633 | pci_dev_put(dev: ali_isa_bridge); |
634 | return ret; |
635 | } |
636 | |
637 | |
638 | static void __exit ali_exit(void) |
639 | { |
640 | pci_unregister_driver(dev: &ali_pci_driver); |
641 | pci_dev_put(dev: ali_isa_bridge); |
642 | } |
643 | |
644 | |
645 | MODULE_AUTHOR("Alan Cox" ); |
646 | MODULE_DESCRIPTION("low-level driver for ALi PATA" ); |
647 | MODULE_LICENSE("GPL" ); |
648 | MODULE_DEVICE_TABLE(pci, ali); |
649 | MODULE_VERSION(DRV_VERSION); |
650 | |
651 | module_init(ali_init); |
652 | module_exit(ali_exit); |
653 | |