1	// SPDX-License-Identifier: GPL-2.0
2	//
3	// Register map access API
4	//
5	// Copyright 2011 Wolfson Microelectronics plc
6	//
7	// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9	#include <linux/device.h>
10	#include <linux/slab.h>
11	#include <linux/export.h>
12	#include <linux/mutex.h>
13	#include <linux/err.h>
14	#include <linux/property.h>
15	#include <linux/rbtree.h>
16	#include <linux/sched.h>
17	#include <linux/delay.h>
18	#include <linux/log2.h>
19	#include <linux/hwspinlock.h>
20	#include <asm/unaligned.h>
21
22	#define CREATE_TRACE_POINTS
23	#include "trace.h"
24
25	#include "internal.h"
26
27	/*
28	* Sometimes for failures during very early init the trace
29	* infrastructure isn't available early enough to be used. For this
30	* sort of problem defining LOG_DEVICE will add printks for basic
31	* register I/O on a specific device.
32	*/
33	#undef LOG_DEVICE
34
35	#ifdef LOG_DEVICE
36	static inline bool regmap_should_log(struct regmap *map)
37	{
38	return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39	}
40	#else
41	static inline bool regmap_should_log(struct regmap *map) { return false; }
42	#endif
43
44
45	static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46	unsigned int mask, unsigned int val,
47	bool *change, bool force_write);
48
49	static int _regmap_bus_reg_read(void *context, unsigned int reg,
50	unsigned int *val);
51	static int _regmap_bus_read(void *context, unsigned int reg,
52	unsigned int *val);
53	static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54	unsigned int val);
55	static int _regmap_bus_reg_write(void *context, unsigned int reg,
56	unsigned int val);
57	static int _regmap_bus_raw_write(void *context, unsigned int reg,
58	unsigned int val);
59
60	bool regmap_reg_in_ranges(unsigned int reg,
61	const struct regmap_range *ranges,
62	unsigned int nranges)
63	{
64	const struct regmap_range *r;
65	int i;
66
67	for (i = 0, r = ranges; i < nranges; i++, r++)
68	if (regmap_reg_in_range(reg, range: r))
69	return true;
70	return false;
71	}
72	EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74	bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75	const struct regmap_access_table *table)
76	{
77	/* Check "no ranges" first */
78	if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79	return false;
80
81	/* In case zero "yes ranges" are supplied, any reg is OK */
82	if (!table->n_yes_ranges)
83	return true;
84
85	return regmap_reg_in_ranges(reg, table->yes_ranges,
86	table->n_yes_ranges);
87	}
88	EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90	bool regmap_writeable(struct regmap *map, unsigned int reg)
91	{
92	if (map->max_register && reg > map->max_register)
93	return false;
94
95	if (map->writeable_reg)
96	return map->writeable_reg(map->dev, reg);
97
98	if (map->wr_table)
99	return regmap_check_range_table(map, reg, map->wr_table);
100
101	return true;
102	}
103
104	bool regmap_cached(struct regmap *map, unsigned int reg)
105	{
106	int ret;
107	unsigned int val;
108
109	if (map->cache_type == REGCACHE_NONE)
110	return false;
111
112	if (!map->cache_ops)
113	return false;
114
115	if (map->max_register && reg > map->max_register)
116	return false;
117
118	map->lock(map->lock_arg);
119	ret = regcache_read(map, reg, value: &val);
120	map->unlock(map->lock_arg);
121	if (ret)
122	return false;
123
124	return true;
125	}
126
127	bool regmap_readable(struct regmap *map, unsigned int reg)
128	{
129	if (!map->reg_read)
130	return false;
131
132	if (map->max_register && reg > map->max_register)
133	return false;
134
135	if (map->format.format_write)
136	return false;
137
138	if (map->readable_reg)
139	return map->readable_reg(map->dev, reg);
140
141	if (map->rd_table)
142	return regmap_check_range_table(map, reg, map->rd_table);
143
144	return true;
145	}
146
147	bool regmap_volatile(struct regmap *map, unsigned int reg)
148	{
149	if (!map->format.format_write && !regmap_readable(map, reg))
150	return false;
151
152	if (map->volatile_reg)
153	return map->volatile_reg(map->dev, reg);
154
155	if (map->volatile_table)
156	return regmap_check_range_table(map, reg, map->volatile_table);
157
158	if (map->cache_ops)
159	return false;
160	else
161	return true;
162	}
163
164	bool regmap_precious(struct regmap *map, unsigned int reg)
165	{
166	if (!regmap_readable(map, reg))
167	return false;
168
169	if (map->precious_reg)
170	return map->precious_reg(map->dev, reg);
171
172	if (map->precious_table)
173	return regmap_check_range_table(map, reg, map->precious_table);
174
175	return false;
176	}
177
178	bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179	{
180	if (map->writeable_noinc_reg)
181	return map->writeable_noinc_reg(map->dev, reg);
182
183	if (map->wr_noinc_table)
184	return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186	return true;
187	}
188
189	bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190	{
191	if (map->readable_noinc_reg)
192	return map->readable_noinc_reg(map->dev, reg);
193
194	if (map->rd_noinc_table)
195	return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197	return true;
198	}
199
200	static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201	size_t num)
202	{
203	unsigned int i;
204
205	for (i = 0; i < num; i++)
206	if (!regmap_volatile(map, reg: reg + regmap_get_offset(map, index: i)))
207	return false;
208
209	return true;
210	}
211
212	static void regmap_format_12_20_write(struct regmap *map,
213	unsigned int reg, unsigned int val)
214	{
215	u8 *out = map->work_buf;
216
217	out[0] = reg >> 4;
218	out[1] = (reg << 4) | (val >> 16);
219	out[2] = val >> 8;
220	out[3] = val;
221	}
222
223
224	static void regmap_format_2_6_write(struct regmap *map,
225	unsigned int reg, unsigned int val)
226	{
227	u8 *out = map->work_buf;
228
229	*out = (reg << 6) | val;
230	}
231
232	static void regmap_format_4_12_write(struct regmap *map,
233	unsigned int reg, unsigned int val)
234	{
235	__be16 *out = map->work_buf;
236	*out = cpu_to_be16((reg << 12) | val);
237	}
238
239	static void regmap_format_7_9_write(struct regmap *map,
240	unsigned int reg, unsigned int val)
241	{
242	__be16 *out = map->work_buf;
243	*out = cpu_to_be16((reg << 9) | val);
244	}
245
246	static void regmap_format_7_17_write(struct regmap *map,
247	unsigned int reg, unsigned int val)
248	{
249	u8 *out = map->work_buf;
250
251	out[2] = val;
252	out[1] = val >> 8;
253	out[0] = (val >> 16) | (reg << 1);
254	}
255
256	static void regmap_format_10_14_write(struct regmap *map,
257	unsigned int reg, unsigned int val)
258	{
259	u8 *out = map->work_buf;
260
261	out[2] = val;
262	out[1] = (val >> 8) | (reg << 6);
263	out[0] = reg >> 2;
264	}
265
266	static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267	{
268	u8 *b = buf;
269
270	b[0] = val << shift;
271	}
272
273	static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274	{
275	put_unaligned_be16(val: val << shift, p: buf);
276	}
277
278	static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279	{
280	put_unaligned_le16(val: val << shift, p: buf);
281	}
282
283	static void regmap_format_16_native(void *buf, unsigned int val,
284	unsigned int shift)
285	{
286	u16 v = val << shift;
287
288	memcpy(buf, &v, sizeof(v));
289	}
290
291	static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292	{
293	put_unaligned_be24(val: val << shift, p: buf);
294	}
295
296	static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297	{
298	put_unaligned_be32(val: val << shift, p: buf);
299	}
300
301	static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302	{
303	put_unaligned_le32(val: val << shift, p: buf);
304	}
305
306	static void regmap_format_32_native(void *buf, unsigned int val,
307	unsigned int shift)
308	{
309	u32 v = val << shift;
310
311	memcpy(buf, &v, sizeof(v));
312	}
313
314	static void regmap_parse_inplace_noop(void *buf)
315	{
316	}
317
318	static unsigned int regmap_parse_8(const void *buf)
319	{
320	const u8 *b = buf;
321
322	return b[0];
323	}
324
325	static unsigned int regmap_parse_16_be(const void *buf)
326	{
327	return get_unaligned_be16(p: buf);
328	}
329
330	static unsigned int regmap_parse_16_le(const void *buf)
331	{
332	return get_unaligned_le16(p: buf);
333	}
334
335	static void regmap_parse_16_be_inplace(void *buf)
336	{
337	u16 v = get_unaligned_be16(p: buf);
338
339	memcpy(buf, &v, sizeof(v));
340	}
341
342	static void regmap_parse_16_le_inplace(void *buf)
343	{
344	u16 v = get_unaligned_le16(p: buf);
345
346	memcpy(buf, &v, sizeof(v));
347	}
348
349	static unsigned int regmap_parse_16_native(const void *buf)
350	{
351	u16 v;
352
353	memcpy(&v, buf, sizeof(v));
354	return v;
355	}
356
357	static unsigned int regmap_parse_24_be(const void *buf)
358	{
359	return get_unaligned_be24(p: buf);
360	}
361
362	static unsigned int regmap_parse_32_be(const void *buf)
363	{
364	return get_unaligned_be32(p: buf);
365	}
366
367	static unsigned int regmap_parse_32_le(const void *buf)
368	{
369	return get_unaligned_le32(p: buf);
370	}
371
372	static void regmap_parse_32_be_inplace(void *buf)
373	{
374	u32 v = get_unaligned_be32(p: buf);
375
376	memcpy(buf, &v, sizeof(v));
377	}
378
379	static void regmap_parse_32_le_inplace(void *buf)
380	{
381	u32 v = get_unaligned_le32(p: buf);
382
383	memcpy(buf, &v, sizeof(v));
384	}
385
386	static unsigned int regmap_parse_32_native(const void *buf)
387	{
388	u32 v;
389
390	memcpy(&v, buf, sizeof(v));
391	return v;
392	}
393
394	static void regmap_lock_hwlock(void *__map)
395	{
396	struct regmap *map = __map;
397
398	hwspin_lock_timeout(hwlock: map->hwlock, UINT_MAX);
399	}
400
401	static void regmap_lock_hwlock_irq(void *__map)
402	{
403	struct regmap *map = __map;
404
405	hwspin_lock_timeout_irq(hwlock: map->hwlock, UINT_MAX);
406	}
407
408	static void regmap_lock_hwlock_irqsave(void *__map)
409	{
410	struct regmap *map = __map;
411
412	hwspin_lock_timeout_irqsave(hwlock: map->hwlock, UINT_MAX,
413	flags: &map->spinlock_flags);
414	}
415
416	static void regmap_unlock_hwlock(void *__map)
417	{
418	struct regmap *map = __map;
419
420	hwspin_unlock(hwlock: map->hwlock);
421	}
422
423	static void regmap_unlock_hwlock_irq(void *__map)
424	{
425	struct regmap *map = __map;
426
427	hwspin_unlock_irq(hwlock: map->hwlock);
428	}
429
430	static void regmap_unlock_hwlock_irqrestore(void *__map)
431	{
432	struct regmap *map = __map;
433
434	hwspin_unlock_irqrestore(hwlock: map->hwlock, flags: &map->spinlock_flags);
435	}
436
437	static void regmap_lock_unlock_none(void *__map)
438	{
439
440	}
441
442	static void regmap_lock_mutex(void *__map)
443	{
444	struct regmap *map = __map;
445	mutex_lock(&map->mutex);
446	}
447
448	static void regmap_unlock_mutex(void *__map)
449	{
450	struct regmap *map = __map;
451	mutex_unlock(lock: &map->mutex);
452	}
453
454	static void regmap_lock_spinlock(void *__map)
455	__acquires(&map->spinlock)
456	{
457	struct regmap *map = __map;
458	unsigned long flags;
459
460	spin_lock_irqsave(&map->spinlock, flags);
461	map->spinlock_flags = flags;
462	}
463
464	static void regmap_unlock_spinlock(void *__map)
465	__releases(&map->spinlock)
466	{
467	struct regmap *map = __map;
468	spin_unlock_irqrestore(lock: &map->spinlock, flags: map->spinlock_flags);
469	}
470
471	static void regmap_lock_raw_spinlock(void *__map)
472	__acquires(&map->raw_spinlock)
473	{
474	struct regmap *map = __map;
475	unsigned long flags;
476
477	raw_spin_lock_irqsave(&map->raw_spinlock, flags);
478	map->raw_spinlock_flags = flags;
479	}
480
481	static void regmap_unlock_raw_spinlock(void *__map)
482	__releases(&map->raw_spinlock)
483	{
484	struct regmap *map = __map;
485	raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
486	}
487
488	static void dev_get_regmap_release(struct device *dev, void *res)
489	{
490	/*
491	* We don't actually have anything to do here; the goal here
492	* is not to manage the regmap but to provide a simple way to
493	* get the regmap back given a struct device.
494	*/
495	}
496
497	static bool _regmap_range_add(struct regmap *map,
498	struct regmap_range_node *data)
499	{
500	struct rb_root *root = &map->range_tree;
501	struct rb_node **new = &(root->rb_node), *parent = NULL;
502
503	while (*new) {
504	struct regmap_range_node *this =
505	rb_entry(*new, struct regmap_range_node, node);
506
507	parent = *new;
508	if (data->range_max < this->range_min)
509	new = &((*new)->rb_left);
510	else if (data->range_min > this->range_max)
511	new = &((*new)->rb_right);
512	else
513	return false;
514	}
515
516	rb_link_node(node: &data->node, parent, rb_link: new);
517	rb_insert_color(&data->node, root);
518
519	return true;
520	}
521
522	static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
523	unsigned int reg)
524	{
525	struct rb_node *node = map->range_tree.rb_node;
526
527	while (node) {
528	struct regmap_range_node *this =
529	rb_entry(node, struct regmap_range_node, node);
530
531	if (reg < this->range_min)
532	node = node->rb_left;
533	else if (reg > this->range_max)
534	node = node->rb_right;
535	else
536	return this;
537	}
538
539	return NULL;
540	}
541
542	static void regmap_range_exit(struct regmap *map)
543	{
544	struct rb_node *next;
545	struct regmap_range_node *range_node;
546
547	next = rb_first(&map->range_tree);
548	while (next) {
549	range_node = rb_entry(next, struct regmap_range_node, node);
550	next = rb_next(&range_node->node);
551	rb_erase(&range_node->node, &map->range_tree);
552	kfree(objp: range_node);
553	}
554
555	kfree(objp: map->selector_work_buf);
556	}
557
558	static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
559	{
560	if (config->name) {
561	const char *name = kstrdup_const(s: config->name, GFP_KERNEL);
562
563	if (!name)
564	return -ENOMEM;
565
566	kfree_const(x: map->name);
567	map->name = name;
568	}
569
570	return 0;
571	}
572
573	int regmap_attach_dev(struct device *dev, struct regmap *map,
574	const struct regmap_config *config)
575	{
576	struct regmap **m;
577	int ret;
578
579	map->dev = dev;
580
581	ret = regmap_set_name(map, config);
582	if (ret)
583	return ret;
584
585	regmap_debugfs_exit(map);
586	regmap_debugfs_init(map);
587
588	/* Add a devres resource for dev_get_regmap() */
589	m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
590	if (!m) {
591	regmap_debugfs_exit(map);
592	return -ENOMEM;
593	}
594	*m = map;
595	devres_add(dev, res: m);
596
597	return 0;
598	}
599	EXPORT_SYMBOL_GPL(regmap_attach_dev);
600
601	static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
602	const struct regmap_config *config)
603	{
604	enum regmap_endian endian;
605
606	/* Retrieve the endianness specification from the regmap config */
607	endian = config->reg_format_endian;
608
609	/* If the regmap config specified a non-default value, use that */
610	if (endian != REGMAP_ENDIAN_DEFAULT)
611	return endian;
612
613	/* Retrieve the endianness specification from the bus config */
614	if (bus && bus->reg_format_endian_default)
615	endian = bus->reg_format_endian_default;
616
617	/* If the bus specified a non-default value, use that */
618	if (endian != REGMAP_ENDIAN_DEFAULT)
619	return endian;
620
621	/* Use this if no other value was found */
622	return REGMAP_ENDIAN_BIG;
623	}
624
625	enum regmap_endian regmap_get_val_endian(struct device *dev,
626	const struct regmap_bus *bus,
627	const struct regmap_config *config)
628	{
629	struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
630	enum regmap_endian endian;
631
632	/* Retrieve the endianness specification from the regmap config */
633	endian = config->val_format_endian;
634
635	/* If the regmap config specified a non-default value, use that */
636	if (endian != REGMAP_ENDIAN_DEFAULT)
637	return endian;
638
639	/* If the firmware node exist try to get endianness from it */
640	if (fwnode_property_read_bool(fwnode, propname: "big-endian"))
641	endian = REGMAP_ENDIAN_BIG;
642	else if (fwnode_property_read_bool(fwnode, propname: "little-endian"))
643	endian = REGMAP_ENDIAN_LITTLE;
644	else if (fwnode_property_read_bool(fwnode, propname: "native-endian"))
645	endian = REGMAP_ENDIAN_NATIVE;
646
647	/* If the endianness was specified in fwnode, use that */
648	if (endian != REGMAP_ENDIAN_DEFAULT)
649	return endian;
650
651	/* Retrieve the endianness specification from the bus config */
652	if (bus && bus->val_format_endian_default)
653	endian = bus->val_format_endian_default;
654
655	/* If the bus specified a non-default value, use that */
656	if (endian != REGMAP_ENDIAN_DEFAULT)
657	return endian;
658
659	/* Use this if no other value was found */
660	return REGMAP_ENDIAN_BIG;
661	}
662	EXPORT_SYMBOL_GPL(regmap_get_val_endian);
663
664	struct regmap *__regmap_init(struct device *dev,
665	const struct regmap_bus *bus,
666	void *bus_context,
667	const struct regmap_config *config,
668	struct lock_class_key *lock_key,
669	const char *lock_name)
670	{
671	struct regmap *map;
672	int ret = -EINVAL;
673	enum regmap_endian reg_endian, val_endian;
674	int i, j;
675
676	if (!config)
677	goto err;
678
679	map = kzalloc(size: sizeof(*map), GFP_KERNEL);
680	if (map == NULL) {
681	ret = -ENOMEM;
682	goto err;
683	}
684
685	ret = regmap_set_name(map, config);
686	if (ret)
687	goto err_map;
688
689	ret = -EINVAL; /* Later error paths rely on this */
690
691	if (config->disable_locking) {
692	map->lock = map->unlock = regmap_lock_unlock_none;
693	map->can_sleep = config->can_sleep;
694	regmap_debugfs_disable(map);
695	} else if (config->lock && config->unlock) {
696	map->lock = config->lock;
697	map->unlock = config->unlock;
698	map->lock_arg = config->lock_arg;
699	map->can_sleep = config->can_sleep;
700	} else if (config->use_hwlock) {
701	map->hwlock = hwspin_lock_request_specific(id: config->hwlock_id);
702	if (!map->hwlock) {
703	ret = -ENXIO;
704	goto err_name;
705	}
706
707	switch (config->hwlock_mode) {
708	case HWLOCK_IRQSTATE:
709	map->lock = regmap_lock_hwlock_irqsave;
710	map->unlock = regmap_unlock_hwlock_irqrestore;
711	break;
712	case HWLOCK_IRQ:
713	map->lock = regmap_lock_hwlock_irq;
714	map->unlock = regmap_unlock_hwlock_irq;
715	break;
716	default:
717	map->lock = regmap_lock_hwlock;
718	map->unlock = regmap_unlock_hwlock;
719	break;
720	}
721
722	map->lock_arg = map;
723	} else {
724	if ((bus && bus->fast_io) ||
725	config->fast_io) {
726	if (config->use_raw_spinlock) {
727	raw_spin_lock_init(&map->raw_spinlock);
728	map->lock = regmap_lock_raw_spinlock;
729	map->unlock = regmap_unlock_raw_spinlock;
730	lockdep_set_class_and_name(&map->raw_spinlock,
731	lock_key, lock_name);
732	} else {
733	spin_lock_init(&map->spinlock);
734	map->lock = regmap_lock_spinlock;
735	map->unlock = regmap_unlock_spinlock;
736	lockdep_set_class_and_name(&map->spinlock,
737	lock_key, lock_name);
738	}
739	} else {
740	mutex_init(&map->mutex);
741	map->lock = regmap_lock_mutex;
742	map->unlock = regmap_unlock_mutex;
743	map->can_sleep = true;
744	lockdep_set_class_and_name(&map->mutex,
745	lock_key, lock_name);
746	}
747	map->lock_arg = map;
748	}
749
750	/*
751	* When we write in fast-paths with regmap_bulk_write() don't allocate
752	* scratch buffers with sleeping allocations.
753	*/
754	if ((bus && bus->fast_io) || config->fast_io)
755	map->alloc_flags = GFP_ATOMIC;
756	else
757	map->alloc_flags = GFP_KERNEL;
758
759	map->reg_base = config->reg_base;
760
761	map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
762	map->format.pad_bytes = config->pad_bits / 8;
763	map->format.reg_shift = config->reg_shift;
764	map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
765	map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
766	config->val_bits + config->pad_bits, 8);
767	map->reg_shift = config->pad_bits % 8;
768	if (config->reg_stride)
769	map->reg_stride = config->reg_stride;
770	else
771	map->reg_stride = 1;
772	if (is_power_of_2(n: map->reg_stride))
773	map->reg_stride_order = ilog2(map->reg_stride);
774	else
775	map->reg_stride_order = -1;
776	map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
777	map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
778	map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
779	if (bus) {
780	map->max_raw_read = bus->max_raw_read;
781	map->max_raw_write = bus->max_raw_write;
782	} else if (config->max_raw_read && config->max_raw_write) {
783	map->max_raw_read = config->max_raw_read;
784	map->max_raw_write = config->max_raw_write;
785	}
786	map->dev = dev;
787	map->bus = bus;
788	map->bus_context = bus_context;
789	map->max_register = config->max_register;
790	map->wr_table = config->wr_table;
791	map->rd_table = config->rd_table;
792	map->volatile_table = config->volatile_table;
793	map->precious_table = config->precious_table;
794	map->wr_noinc_table = config->wr_noinc_table;
795	map->rd_noinc_table = config->rd_noinc_table;
796	map->writeable_reg = config->writeable_reg;
797	map->readable_reg = config->readable_reg;
798	map->volatile_reg = config->volatile_reg;
799	map->precious_reg = config->precious_reg;
800	map->writeable_noinc_reg = config->writeable_noinc_reg;
801	map->readable_noinc_reg = config->readable_noinc_reg;
802	map->cache_type = config->cache_type;
803
804	spin_lock_init(&map->async_lock);
805	INIT_LIST_HEAD(list: &map->async_list);
806	INIT_LIST_HEAD(list: &map->async_free);
807	init_waitqueue_head(&map->async_waitq);
808
809	if (config->read_flag_mask ||
810	config->write_flag_mask ||
811	config->zero_flag_mask) {
812	map->read_flag_mask = config->read_flag_mask;
813	map->write_flag_mask = config->write_flag_mask;
814	} else if (bus) {
815	map->read_flag_mask = bus->read_flag_mask;
816	}
817
818	if (config && config->read && config->write) {
819	map->reg_read = _regmap_bus_read;
820	if (config->reg_update_bits)
821	map->reg_update_bits = config->reg_update_bits;
822
823	/* Bulk read/write */
824	map->read = config->read;
825	map->write = config->write;
826
827	reg_endian = REGMAP_ENDIAN_NATIVE;
828	val_endian = REGMAP_ENDIAN_NATIVE;
829	} else if (!bus) {
830	map->reg_read = config->reg_read;
831	map->reg_write = config->reg_write;
832	map->reg_update_bits = config->reg_update_bits;
833
834	map->defer_caching = false;
835	goto skip_format_initialization;
836	} else if (!bus->read || !bus->write) {
837	map->reg_read = _regmap_bus_reg_read;
838	map->reg_write = _regmap_bus_reg_write;
839	map->reg_update_bits = bus->reg_update_bits;
840
841	map->defer_caching = false;
842	goto skip_format_initialization;
843	} else {
844	map->reg_read = _regmap_bus_read;
845	map->reg_update_bits = bus->reg_update_bits;
846	/* Bulk read/write */
847	map->read = bus->read;
848	map->write = bus->write;
849
850	reg_endian = regmap_get_reg_endian(bus, config);
851	val_endian = regmap_get_val_endian(dev, bus, config);
852	}
853
854	switch (config->reg_bits + map->reg_shift) {
855	case 2:
856	switch (config->val_bits) {
857	case 6:
858	map->format.format_write = regmap_format_2_6_write;
859	break;
860	default:
861	goto err_hwlock;
862	}
863	break;
864
865	case 4:
866	switch (config->val_bits) {
867	case 12:
868	map->format.format_write = regmap_format_4_12_write;
869	break;
870	default:
871	goto err_hwlock;
872	}
873	break;
874
875	case 7:
876	switch (config->val_bits) {
877	case 9:
878	map->format.format_write = regmap_format_7_9_write;
879	break;
880	case 17:
881	map->format.format_write = regmap_format_7_17_write;
882	break;
883	default:
884	goto err_hwlock;
885	}
886	break;
887
888	case 10:
889	switch (config->val_bits) {
890	case 14:
891	map->format.format_write = regmap_format_10_14_write;
892	break;
893	default:
894	goto err_hwlock;
895	}
896	break;
897
898	case 12:
899	switch (config->val_bits) {
900	case 20:
901	map->format.format_write = regmap_format_12_20_write;
902	break;
903	default:
904	goto err_hwlock;
905	}
906	break;
907
908	case 8:
909	map->format.format_reg = regmap_format_8;
910	break;
911
912	case 16:
913	switch (reg_endian) {
914	case REGMAP_ENDIAN_BIG:
915	map->format.format_reg = regmap_format_16_be;
916	break;
917	case REGMAP_ENDIAN_LITTLE:
918	map->format.format_reg = regmap_format_16_le;
919	break;
920	case REGMAP_ENDIAN_NATIVE:
921	map->format.format_reg = regmap_format_16_native;
922	break;
923	default:
924	goto err_hwlock;
925	}
926	break;
927
928	case 24:
929	switch (reg_endian) {
930	case REGMAP_ENDIAN_BIG:
931	map->format.format_reg = regmap_format_24_be;
932	break;
933	default:
934	goto err_hwlock;
935	}
936	break;
937
938	case 32:
939	switch (reg_endian) {
940	case REGMAP_ENDIAN_BIG:
941	map->format.format_reg = regmap_format_32_be;
942	break;
943	case REGMAP_ENDIAN_LITTLE:
944	map->format.format_reg = regmap_format_32_le;
945	break;
946	case REGMAP_ENDIAN_NATIVE:
947	map->format.format_reg = regmap_format_32_native;
948	break;
949	default:
950	goto err_hwlock;
951	}
952	break;
953
954	default:
955	goto err_hwlock;
956	}
957
958	if (val_endian == REGMAP_ENDIAN_NATIVE)
959	map->format.parse_inplace = regmap_parse_inplace_noop;
960
961	switch (config->val_bits) {
962	case 8:
963	map->format.format_val = regmap_format_8;
964	map->format.parse_val = regmap_parse_8;
965	map->format.parse_inplace = regmap_parse_inplace_noop;
966	break;
967	case 16:
968	switch (val_endian) {
969	case REGMAP_ENDIAN_BIG:
970	map->format.format_val = regmap_format_16_be;
971	map->format.parse_val = regmap_parse_16_be;
972	map->format.parse_inplace = regmap_parse_16_be_inplace;
973	break;
974	case REGMAP_ENDIAN_LITTLE:
975	map->format.format_val = regmap_format_16_le;
976	map->format.parse_val = regmap_parse_16_le;
977	map->format.parse_inplace = regmap_parse_16_le_inplace;
978	break;
979	case REGMAP_ENDIAN_NATIVE:
980	map->format.format_val = regmap_format_16_native;
981	map->format.parse_val = regmap_parse_16_native;
982	break;
983	default:
984	goto err_hwlock;
985	}
986	break;
987	case 24:
988	switch (val_endian) {
989	case REGMAP_ENDIAN_BIG:
990	map->format.format_val = regmap_format_24_be;
991	map->format.parse_val = regmap_parse_24_be;
992	break;
993	default:
994	goto err_hwlock;
995	}
996	break;
997	case 32:
998	switch (val_endian) {
999	case REGMAP_ENDIAN_BIG:
1000	map->format.format_val = regmap_format_32_be;
1001	map->format.parse_val = regmap_parse_32_be;
1002	map->format.parse_inplace = regmap_parse_32_be_inplace;
1003	break;
1004	case REGMAP_ENDIAN_LITTLE:
1005	map->format.format_val = regmap_format_32_le;
1006	map->format.parse_val = regmap_parse_32_le;
1007	map->format.parse_inplace = regmap_parse_32_le_inplace;
1008	break;
1009	case REGMAP_ENDIAN_NATIVE:
1010	map->format.format_val = regmap_format_32_native;
1011	map->format.parse_val = regmap_parse_32_native;
1012	break;
1013	default:
1014	goto err_hwlock;
1015	}
1016	break;
1017	}
1018
1019	if (map->format.format_write) {
1020	if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1021	(val_endian != REGMAP_ENDIAN_BIG))
1022	goto err_hwlock;
1023	map->use_single_write = true;
1024	}
1025
1026	if (!map->format.format_write &&
1027	!(map->format.format_reg && map->format.format_val))
1028	goto err_hwlock;
1029
1030	map->work_buf = kzalloc(size: map->format.buf_size, GFP_KERNEL);
1031	if (map->work_buf == NULL) {
1032	ret = -ENOMEM;
1033	goto err_hwlock;
1034	}
1035
1036	if (map->format.format_write) {
1037	map->defer_caching = false;
1038	map->reg_write = _regmap_bus_formatted_write;
1039	} else if (map->format.format_val) {
1040	map->defer_caching = true;
1041	map->reg_write = _regmap_bus_raw_write;
1042	}
1043
1044	skip_format_initialization:
1045
1046	map->range_tree = RB_ROOT;
1047	for (i = 0; i < config->num_ranges; i++) {
1048	const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1049	struct regmap_range_node *new;
1050
1051	/* Sanity check */
1052	if (range_cfg->range_max < range_cfg->range_min) {
1053	dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1054	range_cfg->range_max, range_cfg->range_min);
1055	goto err_range;
1056	}
1057
1058	if (range_cfg->range_max > map->max_register) {
1059	dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1060	range_cfg->range_max, map->max_register);
1061	goto err_range;
1062	}
1063
1064	if (range_cfg->selector_reg > map->max_register) {
1065	dev_err(map->dev,
1066	"Invalid range %d: selector out of map\n", i);
1067	goto err_range;
1068	}
1069
1070	if (range_cfg->window_len == 0) {
1071	dev_err(map->dev, "Invalid range %d: window_len 0\n",
1072	i);
1073	goto err_range;
1074	}
1075
1076	/* Make sure, that this register range has no selector
1077	or data window within its boundary */
1078	for (j = 0; j < config->num_ranges; j++) {
1079	unsigned int sel_reg = config->ranges[j].selector_reg;
1080	unsigned int win_min = config->ranges[j].window_start;
1081	unsigned int win_max = win_min +
1082	config->ranges[j].window_len - 1;
1083
1084	/* Allow data window inside its own virtual range */
1085	if (j == i)
1086	continue;
1087
1088	if (range_cfg->range_min <= sel_reg &&
1089	sel_reg <= range_cfg->range_max) {
1090	dev_err(map->dev,
1091	"Range %d: selector for %d in window\n",
1092	i, j);
1093	goto err_range;
1094	}
1095
1096	if (!(win_max < range_cfg->range_min ||
1097	win_min > range_cfg->range_max)) {
1098	dev_err(map->dev,
1099	"Range %d: window for %d in window\n",
1100	i, j);
1101	goto err_range;
1102	}
1103	}
1104
1105	new = kzalloc(size: sizeof(*new), GFP_KERNEL);
1106	if (new == NULL) {
1107	ret = -ENOMEM;
1108	goto err_range;
1109	}
1110
1111	new->map = map;
1112	new->name = range_cfg->name;
1113	new->range_min = range_cfg->range_min;
1114	new->range_max = range_cfg->range_max;
1115	new->selector_reg = range_cfg->selector_reg;
1116	new->selector_mask = range_cfg->selector_mask;
1117	new->selector_shift = range_cfg->selector_shift;
1118	new->window_start = range_cfg->window_start;
1119	new->window_len = range_cfg->window_len;
1120
1121	if (!_regmap_range_add(map, data: new)) {
1122	dev_err(map->dev, "Failed to add range %d\n", i);
1123	kfree(objp: new);
1124	goto err_range;
1125	}
1126
1127	if (map->selector_work_buf == NULL) {
1128	map->selector_work_buf =
1129	kzalloc(size: map->format.buf_size, GFP_KERNEL);
1130	if (map->selector_work_buf == NULL) {
1131	ret = -ENOMEM;
1132	goto err_range;
1133	}
1134	}
1135	}
1136
1137	ret = regcache_init(map, config);
1138	if (ret != 0)
1139	goto err_range;
1140
1141	if (dev) {
1142	ret = regmap_attach_dev(dev, map, config);
1143	if (ret != 0)
1144	goto err_regcache;
1145	} else {
1146	regmap_debugfs_init(map);
1147	}
1148
1149	return map;
1150
1151	err_regcache:
1152	regcache_exit(map);
1153	err_range:
1154	regmap_range_exit(map);
1155	kfree(objp: map->work_buf);
1156	err_hwlock:
1157	if (map->hwlock)
1158	hwspin_lock_free(hwlock: map->hwlock);
1159	err_name:
1160	kfree_const(x: map->name);
1161	err_map:
1162	kfree(objp: map);
1163	err:
1164	return ERR_PTR(error: ret);
1165	}
1166	EXPORT_SYMBOL_GPL(__regmap_init);
1167
1168	static void devm_regmap_release(struct device *dev, void *res)
1169	{
1170	regmap_exit(map: *(struct regmap **)res);
1171	}
1172
1173	struct regmap *__devm_regmap_init(struct device *dev,
1174	const struct regmap_bus *bus,
1175	void *bus_context,
1176	const struct regmap_config *config,
1177	struct lock_class_key *lock_key,
1178	const char *lock_name)
1179	{
1180	struct regmap **ptr, *regmap;
1181
1182	ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1183	if (!ptr)
1184	return ERR_PTR(error: -ENOMEM);
1185
1186	regmap = __regmap_init(dev, bus, bus_context, config,
1187	lock_key, lock_name);
1188	if (!IS_ERR(ptr: regmap)) {
1189	*ptr = regmap;
1190	devres_add(dev, res: ptr);
1191	} else {
1192	devres_free(res: ptr);
1193	}
1194
1195	return regmap;
1196	}
1197	EXPORT_SYMBOL_GPL(__devm_regmap_init);
1198
1199	static void regmap_field_init(struct regmap_field *rm_field,
1200	struct regmap *regmap, struct reg_field reg_field)
1201	{
1202	rm_field->regmap = regmap;
1203	rm_field->reg = reg_field.reg;
1204	rm_field->shift = reg_field.lsb;
1205	rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1206
1207	WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1208
1209	rm_field->id_size = reg_field.id_size;
1210	rm_field->id_offset = reg_field.id_offset;
1211	}
1212
1213	/**
1214	* devm_regmap_field_alloc() - Allocate and initialise a register field.
1215	*
1216	* @dev: Device that will be interacted with
1217	* @regmap: regmap bank in which this register field is located.
1218	* @reg_field: Register field with in the bank.
1219	*
1220	* The return value will be an ERR_PTR() on error or a valid pointer
1221	* to a struct regmap_field. The regmap_field will be automatically freed
1222	* by the device management code.
1223	*/
1224	struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1225	struct regmap *regmap, struct reg_field reg_field)
1226	{
1227	struct regmap_field *rm_field = devm_kzalloc(dev,
1228	size: sizeof(*rm_field), GFP_KERNEL);
1229	if (!rm_field)
1230	return ERR_PTR(error: -ENOMEM);
1231
1232	regmap_field_init(rm_field, regmap, reg_field);
1233
1234	return rm_field;
1235
1236	}
1237	EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1238
1239
1240	/**
1241	* regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1242	*
1243	* @regmap: regmap bank in which this register field is located.
1244	* @rm_field: regmap register fields within the bank.
1245	* @reg_field: Register fields within the bank.
1246	* @num_fields: Number of register fields.
1247	*
1248	* The return value will be an -ENOMEM on error or zero for success.
1249	* Newly allocated regmap_fields should be freed by calling
1250	* regmap_field_bulk_free()
1251	*/
1252	int regmap_field_bulk_alloc(struct regmap *regmap,
1253	struct regmap_field **rm_field,
1254	const struct reg_field *reg_field,
1255	int num_fields)
1256	{
1257	struct regmap_field *rf;
1258	int i;
1259
1260	rf = kcalloc(n: num_fields, size: sizeof(*rf), GFP_KERNEL);
1261	if (!rf)
1262	return -ENOMEM;
1263
1264	for (i = 0; i < num_fields; i++) {
1265	regmap_field_init(rm_field: &rf[i], regmap, reg_field: reg_field[i]);
1266	rm_field[i] = &rf[i];
1267	}
1268
1269	return 0;
1270	}
1271	EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1272
1273	/**
1274	* devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1275	* fields.
1276	*
1277	* @dev: Device that will be interacted with
1278	* @regmap: regmap bank in which this register field is located.
1279	* @rm_field: regmap register fields within the bank.
1280	* @reg_field: Register fields within the bank.
1281	* @num_fields: Number of register fields.
1282	*
1283	* The return value will be an -ENOMEM on error or zero for success.
1284	* Newly allocated regmap_fields will be automatically freed by the
1285	* device management code.
1286	*/
1287	int devm_regmap_field_bulk_alloc(struct device *dev,
1288	struct regmap *regmap,
1289	struct regmap_field **rm_field,
1290	const struct reg_field *reg_field,
1291	int num_fields)
1292	{
1293	struct regmap_field *rf;
1294	int i;
1295
1296	rf = devm_kcalloc(dev, n: num_fields, size: sizeof(*rf), GFP_KERNEL);
1297	if (!rf)
1298	return -ENOMEM;
1299
1300	for (i = 0; i < num_fields; i++) {
1301	regmap_field_init(rm_field: &rf[i], regmap, reg_field: reg_field[i]);
1302	rm_field[i] = &rf[i];
1303	}
1304
1305	return 0;
1306	}
1307	EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1308
1309	/**
1310	* regmap_field_bulk_free() - Free register field allocated using
1311	* regmap_field_bulk_alloc.
1312	*
1313	* @field: regmap fields which should be freed.
1314	*/
1315	void regmap_field_bulk_free(struct regmap_field *field)
1316	{
1317	kfree(objp: field);
1318	}
1319	EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1320
1321	/**
1322	* devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1323	* devm_regmap_field_bulk_alloc.
1324	*
1325	* @dev: Device that will be interacted with
1326	* @field: regmap field which should be freed.
1327	*
1328	* Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1329	* drivers need not call this function, as the memory allocated via devm
1330	* will be freed as per device-driver life-cycle.
1331	*/
1332	void devm_regmap_field_bulk_free(struct device *dev,
1333	struct regmap_field *field)
1334	{
1335	devm_kfree(dev, p: field);
1336	}
1337	EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1338
1339	/**
1340	* devm_regmap_field_free() - Free a register field allocated using
1341	* devm_regmap_field_alloc.
1342	*
1343	* @dev: Device that will be interacted with
1344	* @field: regmap field which should be freed.
1345	*
1346	* Free register field allocated using devm_regmap_field_alloc(). Usually
1347	* drivers need not call this function, as the memory allocated via devm
1348	* will be freed as per device-driver life-cyle.
1349	*/
1350	void devm_regmap_field_free(struct device *dev,
1351	struct regmap_field *field)
1352	{
1353	devm_kfree(dev, p: field);
1354	}
1355	EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1356
1357	/**
1358	* regmap_field_alloc() - Allocate and initialise a register field.
1359	*
1360	* @regmap: regmap bank in which this register field is located.
1361	* @reg_field: Register field with in the bank.
1362	*
1363	* The return value will be an ERR_PTR() on error or a valid pointer
1364	* to a struct regmap_field. The regmap_field should be freed by the
1365	* user once its finished working with it using regmap_field_free().
1366	*/
1367	struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1368	struct reg_field reg_field)
1369	{
1370	struct regmap_field *rm_field = kzalloc(size: sizeof(*rm_field), GFP_KERNEL);
1371
1372	if (!rm_field)
1373	return ERR_PTR(error: -ENOMEM);
1374
1375	regmap_field_init(rm_field, regmap, reg_field);
1376
1377	return rm_field;
1378	}
1379	EXPORT_SYMBOL_GPL(regmap_field_alloc);
1380
1381	/**
1382	* regmap_field_free() - Free register field allocated using
1383	* regmap_field_alloc.
1384	*
1385	* @field: regmap field which should be freed.
1386	*/
1387	void regmap_field_free(struct regmap_field *field)
1388	{
1389	kfree(objp: field);
1390	}
1391	EXPORT_SYMBOL_GPL(regmap_field_free);
1392
1393	/**
1394	* regmap_reinit_cache() - Reinitialise the current register cache
1395	*
1396	* @map: Register map to operate on.
1397	* @config: New configuration. Only the cache data will be used.
1398	*
1399	* Discard any existing register cache for the map and initialize a
1400	* new cache. This can be used to restore the cache to defaults or to
1401	* update the cache configuration to reflect runtime discovery of the
1402	* hardware.
1403	*
1404	* No explicit locking is done here, the user needs to ensure that
1405	* this function will not race with other calls to regmap.
1406	*/
1407	int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1408	{
1409	int ret;
1410
1411	regcache_exit(map);
1412	regmap_debugfs_exit(map);
1413
1414	map->max_register = config->max_register;
1415	map->writeable_reg = config->writeable_reg;
1416	map->readable_reg = config->readable_reg;
1417	map->volatile_reg = config->volatile_reg;
1418	map->precious_reg = config->precious_reg;
1419	map->writeable_noinc_reg = config->writeable_noinc_reg;
1420	map->readable_noinc_reg = config->readable_noinc_reg;
1421	map->cache_type = config->cache_type;
1422
1423	ret = regmap_set_name(map, config);
1424	if (ret)
1425	return ret;
1426
1427	regmap_debugfs_init(map);
1428
1429	map->cache_bypass = false;
1430	map->cache_only = false;
1431
1432	return regcache_init(map, config);
1433	}
1434	EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1435
1436	/**
1437	* regmap_exit() - Free a previously allocated register map
1438	*
1439	* @map: Register map to operate on.
1440	*/
1441	void regmap_exit(struct regmap *map)
1442	{
1443	struct regmap_async *async;
1444
1445	regcache_exit(map);
1446	regmap_debugfs_exit(map);
1447	regmap_range_exit(map);
1448	if (map->bus && map->bus->free_context)
1449	map->bus->free_context(map->bus_context);
1450	kfree(objp: map->work_buf);
1451	while (!list_empty(head: &map->async_free)) {
1452	async = list_first_entry_or_null(&map->async_free,
1453	struct regmap_async,
1454	list);
1455	list_del(entry: &async->list);
1456	kfree(objp: async->work_buf);
1457	kfree(objp: async);
1458	}
1459	if (map->hwlock)
1460	hwspin_lock_free(hwlock: map->hwlock);
1461	if (map->lock == regmap_lock_mutex)
1462	mutex_destroy(lock: &map->mutex);
1463	kfree_const(x: map->name);
1464	kfree(objp: map->patch);
1465	if (map->bus && map->bus->free_on_exit)
1466	kfree(objp: map->bus);
1467	kfree(objp: map);
1468	}
1469	EXPORT_SYMBOL_GPL(regmap_exit);
1470
1471	static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1472	{
1473	struct regmap **r = res;
1474	if (!r || !*r) {
1475	WARN_ON(!r || !*r);
1476	return 0;
1477	}
1478
1479	/* If the user didn't specify a name match any */
1480	if (data)
1481	return (*r)->name && !strcmp((*r)->name, data);
1482	else
1483	return 1;
1484	}
1485
1486	/**
1487	* dev_get_regmap() - Obtain the regmap (if any) for a device
1488	*
1489	* @dev: Device to retrieve the map for
1490	* @name: Optional name for the register map, usually NULL.
1491	*
1492	* Returns the regmap for the device if one is present, or NULL. If
1493	* name is specified then it must match the name specified when
1494	* registering the device, if it is NULL then the first regmap found
1495	* will be used. Devices with multiple register maps are very rare,
1496	* generic code should normally not need to specify a name.
1497	*/
1498	struct regmap *dev_get_regmap(struct device *dev, const char *name)
1499	{
1500	struct regmap **r = devres_find(dev, release: dev_get_regmap_release,
1501	match: dev_get_regmap_match, match_data: (void *)name);
1502
1503	if (!r)
1504	return NULL;
1505	return *r;
1506	}
1507	EXPORT_SYMBOL_GPL(dev_get_regmap);
1508
1509	/**
1510	* regmap_get_device() - Obtain the device from a regmap
1511	*
1512	* @map: Register map to operate on.
1513	*
1514	* Returns the underlying device that the regmap has been created for.
1515	*/
1516	struct device *regmap_get_device(struct regmap *map)
1517	{
1518	return map->dev;
1519	}
1520	EXPORT_SYMBOL_GPL(regmap_get_device);
1521
1522	static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1523	struct regmap_range_node *range,
1524	unsigned int val_num)
1525	{
1526	void *orig_work_buf;
1527	unsigned int win_offset;
1528	unsigned int win_page;
1529	bool page_chg;
1530	int ret;
1531
1532	win_offset = (*reg - range->range_min) % range->window_len;
1533	win_page = (*reg - range->range_min) / range->window_len;
1534
1535	if (val_num > 1) {
1536	/* Bulk write shouldn't cross range boundary */
1537	if (*reg + val_num - 1 > range->range_max)
1538	return -EINVAL;
1539
1540	/* ... or single page boundary */
1541	if (val_num > range->window_len - win_offset)
1542	return -EINVAL;
1543	}
1544
1545	/* It is possible to have selector register inside data window.
1546	In that case, selector register is located on every page and
1547	it needs no page switching, when accessed alone. */
1548	if (val_num > 1 ||
1549	range->window_start + win_offset != range->selector_reg) {
1550	/* Use separate work_buf during page switching */
1551	orig_work_buf = map->work_buf;
1552	map->work_buf = map->selector_work_buf;
1553
1554	ret = _regmap_update_bits(map, reg: range->selector_reg,
1555	mask: range->selector_mask,
1556	val: win_page << range->selector_shift,
1557	change: &page_chg, force_write: false);
1558
1559	map->work_buf = orig_work_buf;
1560
1561	if (ret != 0)
1562	return ret;
1563	}
1564
1565	*reg = range->window_start + win_offset;
1566
1567	return 0;
1568	}
1569
1570	static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1571	unsigned long mask)
1572	{
1573	u8 *buf;
1574	int i;
1575
1576	if (!mask || !map->work_buf)
1577	return;
1578
1579	buf = map->work_buf;
1580
1581	for (i = 0; i < max_bytes; i++)
1582	buf[i] |= (mask >> (8 * i)) & 0xff;
1583	}
1584
1585	static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1586	{
1587	reg += map->reg_base;
1588
1589	if (map->format.reg_shift > 0)
1590	reg >>= map->format.reg_shift;
1591	else if (map->format.reg_shift < 0)
1592	reg <<= -(map->format.reg_shift);
1593
1594	return reg;
1595	}
1596
1597	static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1598	const void *val, size_t val_len, bool noinc)
1599	{
1600	struct regmap_range_node *range;
1601	unsigned long flags;
1602	void *work_val = map->work_buf + map->format.reg_bytes +
1603	map->format.pad_bytes;
1604	void *buf;
1605	int ret = -ENOTSUPP;
1606	size_t len;
1607	int i;
1608
1609	/* Check for unwritable or noinc registers in range
1610	* before we start
1611	*/
1612	if (!regmap_writeable_noinc(map, reg)) {
1613	for (i = 0; i < val_len / map->format.val_bytes; i++) {
1614	unsigned int element =
1615	reg + regmap_get_offset(map, index: i);
1616	if (!regmap_writeable(map, reg: element) ||
1617	regmap_writeable_noinc(map, reg: element))
1618	return -EINVAL;
1619	}
1620	}
1621
1622	if (!map->cache_bypass && map->format.parse_val) {
1623	unsigned int ival, offset;
1624	int val_bytes = map->format.val_bytes;
1625
1626	/* Cache the last written value for noinc writes */
1627	i = noinc ? val_len - val_bytes : 0;
1628	for (; i < val_len; i += val_bytes) {
1629	ival = map->format.parse_val(val + i);
1630	offset = noinc ? 0 : regmap_get_offset(map, index: i / val_bytes);
1631	ret = regcache_write(map, reg: reg + offset, value: ival);
1632	if (ret) {
1633	dev_err(map->dev,
1634	"Error in caching of register: %x ret: %d\n",
1635	reg + offset, ret);
1636	return ret;
1637	}
1638	}
1639	if (map->cache_only) {
1640	map->cache_dirty = true;
1641	return 0;
1642	}
1643	}
1644
1645	range = _regmap_range_lookup(map, reg);
1646	if (range) {
1647	int val_num = val_len / map->format.val_bytes;
1648	int win_offset = (reg - range->range_min) % range->window_len;
1649	int win_residue = range->window_len - win_offset;
1650
1651	/* If the write goes beyond the end of the window split it */
1652	while (val_num > win_residue) {
1653	dev_dbg(map->dev, "Writing window %d/%zu\n",
1654	win_residue, val_len / map->format.val_bytes);
1655	ret = _regmap_raw_write_impl(map, reg, val,
1656	val_len: win_residue *
1657	map->format.val_bytes, noinc);
1658	if (ret != 0)
1659	return ret;
1660
1661	reg += win_residue;
1662	val_num -= win_residue;
1663	val += win_residue * map->format.val_bytes;
1664	val_len -= win_residue * map->format.val_bytes;
1665
1666	win_offset = (reg - range->range_min) %
1667	range->window_len;
1668	win_residue = range->window_len - win_offset;
1669	}
1670
1671	ret = _regmap_select_page(map, reg: &reg, range, val_num: noinc ? 1 : val_num);
1672	if (ret != 0)
1673	return ret;
1674	}
1675
1676	reg = regmap_reg_addr(map, reg);
1677	map->format.format_reg(map->work_buf, reg, map->reg_shift);
1678	regmap_set_work_buf_flag_mask(map, max_bytes: map->format.reg_bytes,
1679	mask: map->write_flag_mask);
1680
1681	/*
1682	* Essentially all I/O mechanisms will be faster with a single
1683	* buffer to write. Since register syncs often generate raw
1684	* writes of single registers optimise that case.
1685	*/
1686	if (val != work_val && val_len == map->format.val_bytes) {
1687	memcpy(work_val, val, map->format.val_bytes);
1688	val = work_val;
1689	}
1690
1691	if (map->async && map->bus && map->bus->async_write) {
1692	struct regmap_async *async;
1693
1694	trace_regmap_async_write_start(map, reg, count: val_len);
1695
1696	spin_lock_irqsave(&map->async_lock, flags);
1697	async = list_first_entry_or_null(&map->async_free,
1698	struct regmap_async,
1699	list);
1700	if (async)
1701	list_del(entry: &async->list);
1702	spin_unlock_irqrestore(lock: &map->async_lock, flags);
1703
1704	if (!async) {
1705	async = map->bus->async_alloc();
1706	if (!async)
1707	return -ENOMEM;
1708
1709	async->work_buf = kzalloc(size: map->format.buf_size,
1710	GFP_KERNEL | GFP_DMA);
1711	if (!async->work_buf) {
1712	kfree(objp: async);
1713	return -ENOMEM;
1714	}
1715	}
1716
1717	async->map = map;
1718
1719	/* If the caller supplied the value we can use it safely. */
1720	memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1721	map->format.reg_bytes + map->format.val_bytes);
1722
1723	spin_lock_irqsave(&map->async_lock, flags);
1724	list_add_tail(new: &async->list, head: &map->async_list);
1725	spin_unlock_irqrestore(lock: &map->async_lock, flags);
1726
1727	if (val != work_val)
1728	ret = map->bus->async_write(map->bus_context,
1729	async->work_buf,
1730	map->format.reg_bytes +
1731	map->format.pad_bytes,
1732	val, val_len, async);
1733	else
1734	ret = map->bus->async_write(map->bus_context,
1735	async->work_buf,
1736	map->format.reg_bytes +
1737	map->format.pad_bytes +
1738	val_len, NULL, 0, async);
1739
1740	if (ret != 0) {
1741	dev_err(map->dev, "Failed to schedule write: %d\n",
1742	ret);
1743
1744	spin_lock_irqsave(&map->async_lock, flags);
1745	list_move(list: &async->list, head: &map->async_free);
1746	spin_unlock_irqrestore(lock: &map->async_lock, flags);
1747	}
1748
1749	return ret;
1750	}
1751
1752	trace_regmap_hw_write_start(map, reg, count: val_len / map->format.val_bytes);
1753
1754	/* If we're doing a single register write we can probably just
1755	* send the work_buf directly, otherwise try to do a gather
1756	* write.
1757	*/
1758	if (val == work_val)
1759	ret = map->write(map->bus_context, map->work_buf,
1760	map->format.reg_bytes +
1761	map->format.pad_bytes +
1762	val_len);
1763	else if (map->bus && map->bus->gather_write)
1764	ret = map->bus->gather_write(map->bus_context, map->work_buf,
1765	map->format.reg_bytes +
1766	map->format.pad_bytes,
1767	val, val_len);
1768	else
1769	ret = -ENOTSUPP;
1770
1771	/* If that didn't work fall back on linearising by hand. */
1772	if (ret == -ENOTSUPP) {
1773	len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1774	buf = kzalloc(size: len, GFP_KERNEL);
1775	if (!buf)
1776	return -ENOMEM;
1777
1778	memcpy(buf, map->work_buf, map->format.reg_bytes);
1779	memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1780	val, val_len);
1781	ret = map->write(map->bus_context, buf, len);
1782
1783	kfree(objp: buf);
1784	} else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1785	/* regcache_drop_region() takes lock that we already have,
1786	* thus call map->cache_ops->drop() directly
1787	*/
1788	if (map->cache_ops && map->cache_ops->drop)
1789	map->cache_ops->drop(map, reg, reg + 1);
1790	}
1791
1792	trace_regmap_hw_write_done(map, reg, count: val_len / map->format.val_bytes);
1793
1794	return ret;
1795	}
1796
1797	/**
1798	* regmap_can_raw_write - Test if regmap_raw_write() is supported
1799	*
1800	* @map: Map to check.
1801	*/
1802	bool regmap_can_raw_write(struct regmap *map)
1803	{
1804	return map->write && map->format.format_val && map->format.format_reg;
1805	}
1806	EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1807
1808	/**
1809	* regmap_get_raw_read_max - Get the maximum size we can read
1810	*
1811	* @map: Map to check.
1812	*/
1813	size_t regmap_get_raw_read_max(struct regmap *map)
1814	{
1815	return map->max_raw_read;
1816	}
1817	EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1818
1819	/**
1820	* regmap_get_raw_write_max - Get the maximum size we can read
1821	*
1822	* @map: Map to check.
1823	*/
1824	size_t regmap_get_raw_write_max(struct regmap *map)
1825	{
1826	return map->max_raw_write;
1827	}
1828	EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1829
1830	static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1831	unsigned int val)
1832	{
1833	int ret;
1834	struct regmap_range_node *range;
1835	struct regmap *map = context;
1836
1837	WARN_ON(!map->format.format_write);
1838
1839	range = _regmap_range_lookup(map, reg);
1840	if (range) {
1841	ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
1842	if (ret != 0)
1843	return ret;
1844	}
1845
1846	reg = regmap_reg_addr(map, reg);
1847	map->format.format_write(map, reg, val);
1848
1849	trace_regmap_hw_write_start(map, reg, count: 1);
1850
1851	ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1852
1853	trace_regmap_hw_write_done(map, reg, count: 1);
1854
1855	return ret;
1856	}
1857
1858	static int _regmap_bus_reg_write(void *context, unsigned int reg,
1859	unsigned int val)
1860	{
1861	struct regmap *map = context;
1862	struct regmap_range_node *range;
1863	int ret;
1864
1865	range = _regmap_range_lookup(map, reg);
1866	if (range) {
1867	ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
1868	if (ret != 0)
1869	return ret;
1870	}
1871
1872	reg = regmap_reg_addr(map, reg);
1873	return map->bus->reg_write(map->bus_context, reg, val);
1874	}
1875
1876	static int _regmap_bus_raw_write(void *context, unsigned int reg,
1877	unsigned int val)
1878	{
1879	struct regmap *map = context;
1880
1881	WARN_ON(!map->format.format_val);
1882
1883	map->format.format_val(map->work_buf + map->format.reg_bytes
1884	+ map->format.pad_bytes, val, 0);
1885	return _regmap_raw_write_impl(map, reg,
1886	val: map->work_buf +
1887	map->format.reg_bytes +
1888	map->format.pad_bytes,
1889	val_len: map->format.val_bytes,
1890	noinc: false);
1891	}
1892
1893	static inline void *_regmap_map_get_context(struct regmap *map)
1894	{
1895	return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1896	}
1897
1898	int _regmap_write(struct regmap *map, unsigned int reg,
1899	unsigned int val)
1900	{
1901	int ret;
1902	void *context = _regmap_map_get_context(map);
1903
1904	if (!regmap_writeable(map, reg))
1905	return -EIO;
1906
1907	if (!map->cache_bypass && !map->defer_caching) {
1908	ret = regcache_write(map, reg, value: val);
1909	if (ret != 0)
1910	return ret;
1911	if (map->cache_only) {
1912	map->cache_dirty = true;
1913	return 0;
1914	}
1915	}
1916
1917	ret = map->reg_write(context, reg, val);
1918	if (ret == 0) {
1919	if (regmap_should_log(map))
1920	dev_info(map->dev, "%x <= %x\n", reg, val);
1921
1922	trace_regmap_reg_write(map, reg, val);
1923	}
1924
1925	return ret;
1926	}
1927
1928	/**
1929	* regmap_write() - Write a value to a single register
1930	*
1931	* @map: Register map to write to
1932	* @reg: Register to write to
1933	* @val: Value to be written
1934	*
1935	* A value of zero will be returned on success, a negative errno will
1936	* be returned in error cases.
1937	*/
1938	int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1939	{
1940	int ret;
1941
1942	if (!IS_ALIGNED(reg, map->reg_stride))
1943	return -EINVAL;
1944
1945	map->lock(map->lock_arg);
1946
1947	ret = _regmap_write(map, reg, val);
1948
1949	map->unlock(map->lock_arg);
1950
1951	return ret;
1952	}
1953	EXPORT_SYMBOL_GPL(regmap_write);
1954
1955	/**
1956	* regmap_write_async() - Write a value to a single register asynchronously
1957	*
1958	* @map: Register map to write to
1959	* @reg: Register to write to
1960	* @val: Value to be written
1961	*
1962	* A value of zero will be returned on success, a negative errno will
1963	* be returned in error cases.
1964	*/
1965	int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1966	{
1967	int ret;
1968
1969	if (!IS_ALIGNED(reg, map->reg_stride))
1970	return -EINVAL;
1971
1972	map->lock(map->lock_arg);
1973
1974	map->async = true;
1975
1976	ret = _regmap_write(map, reg, val);
1977
1978	map->async = false;
1979
1980	map->unlock(map->lock_arg);
1981
1982	return ret;
1983	}
1984	EXPORT_SYMBOL_GPL(regmap_write_async);
1985
1986	int _regmap_raw_write(struct regmap *map, unsigned int reg,
1987	const void *val, size_t val_len, bool noinc)
1988	{
1989	size_t val_bytes = map->format.val_bytes;
1990	size_t val_count = val_len / val_bytes;
1991	size_t chunk_count, chunk_bytes;
1992	size_t chunk_regs = val_count;
1993	int ret, i;
1994
1995	if (!val_count)
1996	return -EINVAL;
1997
1998	if (map->use_single_write)
1999	chunk_regs = 1;
2000	else if (map->max_raw_write && val_len > map->max_raw_write)
2001	chunk_regs = map->max_raw_write / val_bytes;
2002
2003	chunk_count = val_count / chunk_regs;
2004	chunk_bytes = chunk_regs * val_bytes;
2005
2006	/* Write as many bytes as possible with chunk_size */
2007	for (i = 0; i < chunk_count; i++) {
2008	ret = _regmap_raw_write_impl(map, reg, val, val_len: chunk_bytes, noinc);
2009	if (ret)
2010	return ret;
2011
2012	reg += regmap_get_offset(map, index: chunk_regs);
2013	val += chunk_bytes;
2014	val_len -= chunk_bytes;
2015	}
2016
2017	/* Write remaining bytes */
2018	if (val_len)
2019	ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2020
2021	return ret;
2022	}
2023
2024	/**
2025	* regmap_raw_write() - Write raw values to one or more registers
2026	*
2027	* @map: Register map to write to
2028	* @reg: Initial register to write to
2029	* @val: Block of data to be written, laid out for direct transmission to the
2030	* device
2031	* @val_len: Length of data pointed to by val.
2032	*
2033	* This function is intended to be used for things like firmware
2034	* download where a large block of data needs to be transferred to the
2035	* device. No formatting will be done on the data provided.
2036	*
2037	* A value of zero will be returned on success, a negative errno will
2038	* be returned in error cases.
2039	*/
2040	int regmap_raw_write(struct regmap *map, unsigned int reg,
2041	const void *val, size_t val_len)
2042	{
2043	int ret;
2044
2045	if (!regmap_can_raw_write(map))
2046	return -EINVAL;
2047	if (val_len % map->format.val_bytes)
2048	return -EINVAL;
2049
2050	map->lock(map->lock_arg);
2051
2052	ret = _regmap_raw_write(map, reg, val, val_len, noinc: false);
2053
2054	map->unlock(map->lock_arg);
2055
2056	return ret;
2057	}
2058	EXPORT_SYMBOL_GPL(regmap_raw_write);
2059
2060	static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2061	void *val, unsigned int val_len, bool write)
2062	{
2063	size_t val_bytes = map->format.val_bytes;
2064	size_t val_count = val_len / val_bytes;
2065	unsigned int lastval;
2066	u8 *u8p;
2067	u16 *u16p;
2068	u32 *u32p;
2069	int ret;
2070	int i;
2071
2072	switch (val_bytes) {
2073	case 1:
2074	u8p = val;
2075	if (write)
2076	lastval = (unsigned int)u8p[val_count - 1];
2077	break;
2078	case 2:
2079	u16p = val;
2080	if (write)
2081	lastval = (unsigned int)u16p[val_count - 1];
2082	break;
2083	case 4:
2084	u32p = val;
2085	if (write)
2086	lastval = (unsigned int)u32p[val_count - 1];
2087	break;
2088	default:
2089	return -EINVAL;
2090	}
2091
2092	/*
2093	* Update the cache with the last value we write, the rest is just
2094	* gone down in the hardware FIFO. We can't cache FIFOs. This makes
2095	* sure a single read from the cache will work.
2096	*/
2097	if (write) {
2098	if (!map->cache_bypass && !map->defer_caching) {
2099	ret = regcache_write(map, reg, value: lastval);
2100	if (ret != 0)
2101	return ret;
2102	if (map->cache_only) {
2103	map->cache_dirty = true;
2104	return 0;
2105	}
2106	}
2107	ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2108	} else {
2109	ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2110	}
2111
2112	if (!ret && regmap_should_log(map)) {
2113	dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2114	for (i = 0; i < val_count; i++) {
2115	switch (val_bytes) {
2116	case 1:
2117	pr_cont("%x", u8p[i]);
2118	break;
2119	case 2:
2120	pr_cont("%x", u16p[i]);
2121	break;
2122	case 4:
2123	pr_cont("%x", u32p[i]);
2124	break;
2125	default:
2126	break;
2127	}
2128	if (i == (val_count - 1))
2129	pr_cont("]\n");
2130	else
2131	pr_cont(",");
2132	}
2133	}
2134
2135	return 0;
2136	}
2137
2138	/**
2139	* regmap_noinc_write(): Write data from a register without incrementing the
2140	* register number
2141	*
2142	* @map: Register map to write to
2143	* @reg: Register to write to
2144	* @val: Pointer to data buffer
2145	* @val_len: Length of output buffer in bytes.
2146	*
2147	* The regmap API usually assumes that bulk bus write operations will write a
2148	* range of registers. Some devices have certain registers for which a write
2149	* operation can write to an internal FIFO.
2150	*
2151	* The target register must be volatile but registers after it can be
2152	* completely unrelated cacheable registers.
2153	*
2154	* This will attempt multiple writes as required to write val_len bytes.
2155	*
2156	* A value of zero will be returned on success, a negative errno will be
2157	* returned in error cases.
2158	*/
2159	int regmap_noinc_write(struct regmap *map, unsigned int reg,
2160	const void *val, size_t val_len)
2161	{
2162	size_t write_len;
2163	int ret;
2164
2165	if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2166	return -EINVAL;
2167	if (val_len % map->format.val_bytes)
2168	return -EINVAL;
2169	if (!IS_ALIGNED(reg, map->reg_stride))
2170	return -EINVAL;
2171	if (val_len == 0)
2172	return -EINVAL;
2173
2174	map->lock(map->lock_arg);
2175
2176	if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2177	ret = -EINVAL;
2178	goto out_unlock;
2179	}
2180
2181	/*
2182	* Use the accelerated operation if we can. The val drops the const
2183	* typing in order to facilitate code reuse in regmap_noinc_readwrite().
2184	*/
2185	if (map->bus->reg_noinc_write) {
2186	ret = regmap_noinc_readwrite(map, reg, val: (void *)val, val_len, write: true);
2187	goto out_unlock;
2188	}
2189
2190	while (val_len) {
2191	if (map->max_raw_write && map->max_raw_write < val_len)
2192	write_len = map->max_raw_write;
2193	else
2194	write_len = val_len;
2195	ret = _regmap_raw_write(map, reg, val, val_len: write_len, noinc: true);
2196	if (ret)
2197	goto out_unlock;
2198	val = ((u8 *)val) + write_len;
2199	val_len -= write_len;
2200	}
2201
2202	out_unlock:
2203	map->unlock(map->lock_arg);
2204	return ret;
2205	}
2206	EXPORT_SYMBOL_GPL(regmap_noinc_write);
2207
2208	/**
2209	* regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2210	* register field.
2211	*
2212	* @field: Register field to write to
2213	* @mask: Bitmask to change
2214	* @val: Value to be written
2215	* @change: Boolean indicating if a write was done
2216	* @async: Boolean indicating asynchronously
2217	* @force: Boolean indicating use force update
2218	*
2219	* Perform a read/modify/write cycle on the register field with change,
2220	* async, force option.
2221	*
2222	* A value of zero will be returned on success, a negative errno will
2223	* be returned in error cases.
2224	*/
2225	int regmap_field_update_bits_base(struct regmap_field *field,
2226	unsigned int mask, unsigned int val,
2227	bool *change, bool async, bool force)
2228	{
2229	mask = (mask << field->shift) & field->mask;
2230
2231	return regmap_update_bits_base(map: field->regmap, reg: field->reg,
2232	mask, val: val << field->shift,
2233	change, async, force);
2234	}
2235	EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2236
2237	/**
2238	* regmap_field_test_bits() - Check if all specified bits are set in a
2239	* register field.
2240	*
2241	* @field: Register field to operate on
2242	* @bits: Bits to test
2243	*
2244	* Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2245	* tested bits is not set and 1 if all tested bits are set.
2246	*/
2247	int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2248	{
2249	unsigned int val, ret;
2250
2251	ret = regmap_field_read(field, val: &val);
2252	if (ret)
2253	return ret;
2254
2255	return (val & bits) == bits;
2256	}
2257	EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2258
2259	/**
2260	* regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2261	* register field with port ID
2262	*
2263	* @field: Register field to write to
2264	* @id: port ID
2265	* @mask: Bitmask to change
2266	* @val: Value to be written
2267	* @change: Boolean indicating if a write was done
2268	* @async: Boolean indicating asynchronously
2269	* @force: Boolean indicating use force update
2270	*
2271	* A value of zero will be returned on success, a negative errno will
2272	* be returned in error cases.
2273	*/
2274	int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2275	unsigned int mask, unsigned int val,
2276	bool *change, bool async, bool force)
2277	{
2278	if (id >= field->id_size)
2279	return -EINVAL;
2280
2281	mask = (mask << field->shift) & field->mask;
2282
2283	return regmap_update_bits_base(map: field->regmap,
2284	reg: field->reg + (field->id_offset * id),
2285	mask, val: val << field->shift,
2286	change, async, force);
2287	}
2288	EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2289
2290	/**
2291	* regmap_bulk_write() - Write multiple registers to the device
2292	*
2293	* @map: Register map to write to
2294	* @reg: First register to be write from
2295	* @val: Block of data to be written, in native register size for device
2296	* @val_count: Number of registers to write
2297	*
2298	* This function is intended to be used for writing a large block of
2299	* data to the device either in single transfer or multiple transfer.
2300	*
2301	* A value of zero will be returned on success, a negative errno will
2302	* be returned in error cases.
2303	*/
2304	int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2305	size_t val_count)
2306	{
2307	int ret = 0, i;
2308	size_t val_bytes = map->format.val_bytes;
2309
2310	if (!IS_ALIGNED(reg, map->reg_stride))
2311	return -EINVAL;
2312
2313	/*
2314	* Some devices don't support bulk write, for them we have a series of
2315	* single write operations.
2316	*/
2317	if (!map->write || !map->format.parse_inplace) {
2318	map->lock(map->lock_arg);
2319	for (i = 0; i < val_count; i++) {
2320	unsigned int ival;
2321
2322	switch (val_bytes) {
2323	case 1:
2324	ival = *(u8 *)(val + (i * val_bytes));
2325	break;
2326	case 2:
2327	ival = *(u16 *)(val + (i * val_bytes));
2328	break;
2329	case 4:
2330	ival = *(u32 *)(val + (i * val_bytes));
2331	break;
2332	default:
2333	ret = -EINVAL;
2334	goto out;
2335	}
2336
2337	ret = _regmap_write(map,
2338	reg: reg + regmap_get_offset(map, index: i),
2339	val: ival);
2340	if (ret != 0)
2341	goto out;
2342	}
2343	out:
2344	map->unlock(map->lock_arg);
2345	} else {
2346	void *wval;
2347
2348	wval = kmemdup(p: val, size: val_count * val_bytes, gfp: map->alloc_flags);
2349	if (!wval)
2350	return -ENOMEM;
2351
2352	for (i = 0; i < val_count * val_bytes; i += val_bytes)
2353	map->format.parse_inplace(wval + i);
2354
2355	ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2356
2357	kfree(objp: wval);
2358	}
2359
2360	if (!ret)
2361	trace_regmap_bulk_write(map, reg, val, val_len: val_bytes * val_count);
2362
2363	return ret;
2364	}
2365	EXPORT_SYMBOL_GPL(regmap_bulk_write);
2366
2367	/*
2368	* _regmap_raw_multi_reg_write()
2369	*
2370	* the (register,newvalue) pairs in regs have not been formatted, but
2371	* they are all in the same page and have been changed to being page
2372	* relative. The page register has been written if that was necessary.
2373	*/
2374	static int _regmap_raw_multi_reg_write(struct regmap *map,
2375	const struct reg_sequence *regs,
2376	size_t num_regs)
2377	{
2378	int ret;
2379	void *buf;
2380	int i;
2381	u8 *u8;
2382	size_t val_bytes = map->format.val_bytes;
2383	size_t reg_bytes = map->format.reg_bytes;
2384	size_t pad_bytes = map->format.pad_bytes;
2385	size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2386	size_t len = pair_size * num_regs;
2387
2388	if (!len)
2389	return -EINVAL;
2390
2391	buf = kzalloc(size: len, GFP_KERNEL);
2392	if (!buf)
2393	return -ENOMEM;
2394
2395	/* We have to linearise by hand. */
2396
2397	u8 = buf;
2398
2399	for (i = 0; i < num_regs; i++) {
2400	unsigned int reg = regs[i].reg;
2401	unsigned int val = regs[i].def;
2402	trace_regmap_hw_write_start(map, reg, count: 1);
2403	reg = regmap_reg_addr(map, reg);
2404	map->format.format_reg(u8, reg, map->reg_shift);
2405	u8 += reg_bytes + pad_bytes;
2406	map->format.format_val(u8, val, 0);
2407	u8 += val_bytes;
2408	}
2409	u8 = buf;
2410	*u8 |= map->write_flag_mask;
2411
2412	ret = map->write(map->bus_context, buf, len);
2413
2414	kfree(objp: buf);
2415
2416	for (i = 0; i < num_regs; i++) {
2417	int reg = regs[i].reg;
2418	trace_regmap_hw_write_done(map, reg, count: 1);
2419	}
2420	return ret;
2421	}
2422
2423	static unsigned int _regmap_register_page(struct regmap *map,
2424	unsigned int reg,
2425	struct regmap_range_node *range)
2426	{
2427	unsigned int win_page = (reg - range->range_min) / range->window_len;
2428
2429	return win_page;
2430	}
2431
2432	static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2433	struct reg_sequence *regs,
2434	size_t num_regs)
2435	{
2436	int ret;
2437	int i, n;
2438	struct reg_sequence *base;
2439	unsigned int this_page = 0;
2440	unsigned int page_change = 0;
2441	/*
2442	* the set of registers are not neccessarily in order, but
2443	* since the order of write must be preserved this algorithm
2444	* chops the set each time the page changes. This also applies
2445	* if there is a delay required at any point in the sequence.
2446	*/
2447	base = regs;
2448	for (i = 0, n = 0; i < num_regs; i++, n++) {
2449	unsigned int reg = regs[i].reg;
2450	struct regmap_range_node *range;
2451
2452	range = _regmap_range_lookup(map, reg);
2453	if (range) {
2454	unsigned int win_page = _regmap_register_page(map, reg,
2455	range);
2456
2457	if (i == 0)
2458	this_page = win_page;
2459	if (win_page != this_page) {
2460	this_page = win_page;
2461	page_change = 1;
2462	}
2463	}
2464
2465	/* If we have both a page change and a delay make sure to
2466	* write the regs and apply the delay before we change the
2467	* page.
2468	*/
2469
2470	if (page_change || regs[i].delay_us) {
2471
2472	/* For situations where the first write requires
2473	* a delay we need to make sure we don't call
2474	* raw_multi_reg_write with n=0
2475	* This can't occur with page breaks as we
2476	* never write on the first iteration
2477	*/
2478	if (regs[i].delay_us && i == 0)
2479	n = 1;
2480
2481	ret = _regmap_raw_multi_reg_write(map, regs: base, num_regs: n);
2482	if (ret != 0)
2483	return ret;
2484
2485	if (regs[i].delay_us) {
2486	if (map->can_sleep)
2487	fsleep(usecs: regs[i].delay_us);
2488	else
2489	udelay(regs[i].delay_us);
2490	}
2491
2492	base += n;
2493	n = 0;
2494
2495	if (page_change) {
2496	ret = _regmap_select_page(map,
2497	reg: &base[n].reg,
2498	range, val_num: 1);
2499	if (ret != 0)
2500	return ret;
2501
2502	page_change = 0;
2503	}
2504
2505	}
2506
2507	}
2508	if (n > 0)
2509	return _regmap_raw_multi_reg_write(map, regs: base, num_regs: n);
2510	return 0;
2511	}
2512
2513	static int _regmap_multi_reg_write(struct regmap *map,
2514	const struct reg_sequence *regs,
2515	size_t num_regs)
2516	{
2517	int i;
2518	int ret;
2519
2520	if (!map->can_multi_write) {
2521	for (i = 0; i < num_regs; i++) {
2522	ret = _regmap_write(map, reg: regs[i].reg, val: regs[i].def);
2523	if (ret != 0)
2524	return ret;
2525
2526	if (regs[i].delay_us) {
2527	if (map->can_sleep)
2528	fsleep(usecs: regs[i].delay_us);
2529	else
2530	udelay(regs[i].delay_us);
2531	}
2532	}
2533	return 0;
2534	}
2535
2536	if (!map->format.parse_inplace)
2537	return -EINVAL;
2538
2539	if (map->writeable_reg)
2540	for (i = 0; i < num_regs; i++) {
2541	int reg = regs[i].reg;
2542	if (!map->writeable_reg(map->dev, reg))
2543	return -EINVAL;
2544	if (!IS_ALIGNED(reg, map->reg_stride))
2545	return -EINVAL;
2546	}
2547
2548	if (!map->cache_bypass) {
2549	for (i = 0; i < num_regs; i++) {
2550	unsigned int val = regs[i].def;
2551	unsigned int reg = regs[i].reg;
2552	ret = regcache_write(map, reg, value: val);
2553	if (ret) {
2554	dev_err(map->dev,
2555	"Error in caching of register: %x ret: %d\n",
2556	reg, ret);
2557	return ret;
2558	}
2559	}
2560	if (map->cache_only) {
2561	map->cache_dirty = true;
2562	return 0;
2563	}
2564	}
2565
2566	WARN_ON(!map->bus);
2567
2568	for (i = 0; i < num_regs; i++) {
2569	unsigned int reg = regs[i].reg;
2570	struct regmap_range_node *range;
2571
2572	/* Coalesce all the writes between a page break or a delay
2573	* in a sequence
2574	*/
2575	range = _regmap_range_lookup(map, reg);
2576	if (range || regs[i].delay_us) {
2577	size_t len = sizeof(struct reg_sequence)*num_regs;
2578	struct reg_sequence *base = kmemdup(p: regs, size: len,
2579	GFP_KERNEL);
2580	if (!base)
2581	return -ENOMEM;
2582	ret = _regmap_range_multi_paged_reg_write(map, regs: base,
2583	num_regs);
2584	kfree(objp: base);
2585
2586	return ret;
2587	}
2588	}
2589	return _regmap_raw_multi_reg_write(map, regs, num_regs);
2590	}
2591
2592	/**
2593	* regmap_multi_reg_write() - Write multiple registers to the device
2594	*
2595	* @map: Register map to write to
2596	* @regs: Array of structures containing register,value to be written
2597	* @num_regs: Number of registers to write
2598	*
2599	* Write multiple registers to the device where the set of register, value
2600	* pairs are supplied in any order, possibly not all in a single range.
2601	*
2602	* The 'normal' block write mode will send ultimately send data on the
2603	* target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2604	* addressed. However, this alternative block multi write mode will send
2605	* the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2606	* must of course support the mode.
2607	*
2608	* A value of zero will be returned on success, a negative errno will be
2609	* returned in error cases.
2610	*/
2611	int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2612	int num_regs)
2613	{
2614	int ret;
2615
2616	map->lock(map->lock_arg);
2617
2618	ret = _regmap_multi_reg_write(map, regs, num_regs);
2619
2620	map->unlock(map->lock_arg);
2621
2622	return ret;
2623	}
2624	EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2625
2626	/**
2627	* regmap_multi_reg_write_bypassed() - Write multiple registers to the
2628	* device but not the cache
2629	*
2630	* @map: Register map to write to
2631	* @regs: Array of structures containing register,value to be written
2632	* @num_regs: Number of registers to write
2633	*
2634	* Write multiple registers to the device but not the cache where the set
2635	* of register are supplied in any order.
2636	*
2637	* This function is intended to be used for writing a large block of data
2638	* atomically to the device in single transfer for those I2C client devices
2639	* that implement this alternative block write mode.
2640	*
2641	* A value of zero will be returned on success, a negative errno will
2642	* be returned in error cases.
2643	*/
2644	int regmap_multi_reg_write_bypassed(struct regmap *map,
2645	const struct reg_sequence *regs,
2646	int num_regs)
2647	{
2648	int ret;
2649	bool bypass;
2650
2651	map->lock(map->lock_arg);
2652
2653	bypass = map->cache_bypass;
2654	map->cache_bypass = true;
2655
2656	ret = _regmap_multi_reg_write(map, regs, num_regs);
2657
2658	map->cache_bypass = bypass;
2659
2660	map->unlock(map->lock_arg);
2661
2662	return ret;
2663	}
2664	EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2665
2666	/**
2667	* regmap_raw_write_async() - Write raw values to one or more registers
2668	* asynchronously
2669	*
2670	* @map: Register map to write to
2671	* @reg: Initial register to write to
2672	* @val: Block of data to be written, laid out for direct transmission to the
2673	* device. Must be valid until regmap_async_complete() is called.
2674	* @val_len: Length of data pointed to by val.
2675	*
2676	* This function is intended to be used for things like firmware
2677	* download where a large block of data needs to be transferred to the
2678	* device. No formatting will be done on the data provided.
2679	*
2680	* If supported by the underlying bus the write will be scheduled
2681	* asynchronously, helping maximise I/O speed on higher speed buses
2682	* like SPI. regmap_async_complete() can be called to ensure that all
2683	* asynchrnous writes have been completed.
2684	*
2685	* A value of zero will be returned on success, a negative errno will
2686	* be returned in error cases.
2687	*/
2688	int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2689	const void *val, size_t val_len)
2690	{
2691	int ret;
2692
2693	if (val_len % map->format.val_bytes)
2694	return -EINVAL;
2695	if (!IS_ALIGNED(reg, map->reg_stride))
2696	return -EINVAL;
2697
2698	map->lock(map->lock_arg);
2699
2700	map->async = true;
2701
2702	ret = _regmap_raw_write(map, reg, val, val_len, noinc: false);
2703
2704	map->async = false;
2705
2706	map->unlock(map->lock_arg);
2707
2708	return ret;
2709	}
2710	EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2711
2712	static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2713	unsigned int val_len, bool noinc)
2714	{
2715	struct regmap_range_node *range;
2716	int ret;
2717
2718	if (!map->read)
2719	return -EINVAL;
2720
2721	range = _regmap_range_lookup(map, reg);
2722	if (range) {
2723	ret = _regmap_select_page(map, reg: &reg, range,
2724	val_num: noinc ? 1 : val_len / map->format.val_bytes);
2725	if (ret != 0)
2726	return ret;
2727	}
2728
2729	reg = regmap_reg_addr(map, reg);
2730	map->format.format_reg(map->work_buf, reg, map->reg_shift);
2731	regmap_set_work_buf_flag_mask(map, max_bytes: map->format.reg_bytes,
2732	mask: map->read_flag_mask);
2733	trace_regmap_hw_read_start(map, reg, count: val_len / map->format.val_bytes);
2734
2735	ret = map->read(map->bus_context, map->work_buf,
2736	map->format.reg_bytes + map->format.pad_bytes,
2737	val, val_len);
2738
2739	trace_regmap_hw_read_done(map, reg, count: val_len / map->format.val_bytes);
2740
2741	return ret;
2742	}
2743
2744	static int _regmap_bus_reg_read(void *context, unsigned int reg,
2745	unsigned int *val)
2746	{
2747	struct regmap *map = context;
2748	struct regmap_range_node *range;
2749	int ret;
2750
2751	range = _regmap_range_lookup(map, reg);
2752	if (range) {
2753	ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
2754	if (ret != 0)
2755	return ret;
2756	}
2757
2758	reg = regmap_reg_addr(map, reg);
2759	return map->bus->reg_read(map->bus_context, reg, val);
2760	}
2761
2762	static int _regmap_bus_read(void *context, unsigned int reg,
2763	unsigned int *val)
2764	{
2765	int ret;
2766	struct regmap *map = context;
2767	void *work_val = map->work_buf + map->format.reg_bytes +
2768	map->format.pad_bytes;
2769
2770	if (!map->format.parse_val)
2771	return -EINVAL;
2772
2773	ret = _regmap_raw_read(map, reg, val: work_val, val_len: map->format.val_bytes, noinc: false);
2774	if (ret == 0)
2775	*val = map->format.parse_val(work_val);
2776
2777	return ret;
2778	}
2779
2780	static int _regmap_read(struct regmap *map, unsigned int reg,
2781	unsigned int *val)
2782	{
2783	int ret;
2784	void *context = _regmap_map_get_context(map);
2785
2786	if (!map->cache_bypass) {
2787	ret = regcache_read(map, reg, value: val);
2788	if (ret == 0)
2789	return 0;
2790	}
2791
2792	if (map->cache_only)
2793	return -EBUSY;
2794
2795	if (!regmap_readable(map, reg))
2796	return -EIO;
2797
2798	ret = map->reg_read(context, reg, val);
2799	if (ret == 0) {
2800	if (regmap_should_log(map))
2801	dev_info(map->dev, "%x => %x\n", reg, *val);
2802
2803	trace_regmap_reg_read(map, reg, val: *val);
2804
2805	if (!map->cache_bypass)
2806	regcache_write(map, reg, value: *val);
2807	}
2808
2809	return ret;
2810	}
2811
2812	/**
2813	* regmap_read() - Read a value from a single register
2814	*
2815	* @map: Register map to read from
2816	* @reg: Register to be read from
2817	* @val: Pointer to store read value
2818	*
2819	* A value of zero will be returned on success, a negative errno will
2820	* be returned in error cases.
2821	*/
2822	int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2823	{
2824	int ret;
2825
2826	if (!IS_ALIGNED(reg, map->reg_stride))
2827	return -EINVAL;
2828
2829	map->lock(map->lock_arg);
2830
2831	ret = _regmap_read(map, reg, val);
2832
2833	map->unlock(map->lock_arg);
2834
2835	return ret;
2836	}
2837	EXPORT_SYMBOL_GPL(regmap_read);
2838
2839	/**
2840	* regmap_raw_read() - Read raw data from the device
2841	*
2842	* @map: Register map to read from
2843	* @reg: First register to be read from
2844	* @val: Pointer to store read value
2845	* @val_len: Size of data to read
2846	*
2847	* A value of zero will be returned on success, a negative errno will
2848	* be returned in error cases.
2849	*/
2850	int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2851	size_t val_len)
2852	{
2853	size_t val_bytes = map->format.val_bytes;
2854	size_t val_count = val_len / val_bytes;
2855	unsigned int v;
2856	int ret, i;
2857
2858	if (val_len % map->format.val_bytes)
2859	return -EINVAL;
2860	if (!IS_ALIGNED(reg, map->reg_stride))
2861	return -EINVAL;
2862	if (val_count == 0)
2863	return -EINVAL;
2864
2865	map->lock(map->lock_arg);
2866
2867	if (regmap_volatile_range(map, reg, num: val_count) || map->cache_bypass ||
2868	map->cache_type == REGCACHE_NONE) {
2869	size_t chunk_count, chunk_bytes;
2870	size_t chunk_regs = val_count;
2871
2872	if (!map->cache_bypass && map->cache_only) {
2873	ret = -EBUSY;
2874	goto out;
2875	}
2876
2877	if (!map->read) {
2878	ret = -ENOTSUPP;
2879	goto out;
2880	}
2881
2882	if (map->use_single_read)
2883	chunk_regs = 1;
2884	else if (map->max_raw_read && val_len > map->max_raw_read)
2885	chunk_regs = map->max_raw_read / val_bytes;
2886
2887	chunk_count = val_count / chunk_regs;
2888	chunk_bytes = chunk_regs * val_bytes;
2889
2890	/* Read bytes that fit into whole chunks */
2891	for (i = 0; i < chunk_count; i++) {
2892	ret = _regmap_raw_read(map, reg, val, val_len: chunk_bytes, noinc: false);
2893	if (ret != 0)
2894	goto out;
2895
2896	reg += regmap_get_offset(map, index: chunk_regs);
2897	val += chunk_bytes;
2898	val_len -= chunk_bytes;
2899	}
2900
2901	/* Read remaining bytes */
2902	if (val_len) {
2903	ret = _regmap_raw_read(map, reg, val, val_len, noinc: false);
2904	if (ret != 0)
2905	goto out;
2906	}
2907	} else {
2908	/* Otherwise go word by word for the cache; should be low
2909	* cost as we expect to hit the cache.
2910	*/
2911	for (i = 0; i < val_count; i++) {
2912	ret = _regmap_read(map, reg: reg + regmap_get_offset(map, index: i),
2913	val: &v);
2914	if (ret != 0)
2915	goto out;
2916
2917	map->format.format_val(val + (i * val_bytes), v, 0);
2918	}
2919	}
2920
2921	out:
2922	map->unlock(map->lock_arg);
2923
2924	return ret;
2925	}
2926	EXPORT_SYMBOL_GPL(regmap_raw_read);
2927
2928	/**
2929	* regmap_noinc_read(): Read data from a register without incrementing the
2930	* register number
2931	*
2932	* @map: Register map to read from
2933	* @reg: Register to read from
2934	* @val: Pointer to data buffer
2935	* @val_len: Length of output buffer in bytes.
2936	*
2937	* The regmap API usually assumes that bulk read operations will read a
2938	* range of registers. Some devices have certain registers for which a read
2939	* operation read will read from an internal FIFO.
2940	*
2941	* The target register must be volatile but registers after it can be
2942	* completely unrelated cacheable registers.
2943	*
2944	* This will attempt multiple reads as required to read val_len bytes.
2945	*
2946	* A value of zero will be returned on success, a negative errno will be
2947	* returned in error cases.
2948	*/
2949	int regmap_noinc_read(struct regmap *map, unsigned int reg,
2950	void *val, size_t val_len)
2951	{
2952	size_t read_len;
2953	int ret;
2954
2955	if (!map->read)
2956	return -ENOTSUPP;
2957
2958	if (val_len % map->format.val_bytes)
2959	return -EINVAL;
2960	if (!IS_ALIGNED(reg, map->reg_stride))
2961	return -EINVAL;
2962	if (val_len == 0)
2963	return -EINVAL;
2964
2965	map->lock(map->lock_arg);
2966
2967	if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2968	ret = -EINVAL;
2969	goto out_unlock;
2970	}
2971
2972	/*
2973	* We have not defined the FIFO semantics for cache, as the
2974	* cache is just one value deep. Should we return the last
2975	* written value? Just avoid this by always reading the FIFO
2976	* even when using cache. Cache only will not work.
2977	*/
2978	if (!map->cache_bypass && map->cache_only) {
2979	ret = -EBUSY;
2980	goto out_unlock;
2981	}
2982
2983	/* Use the accelerated operation if we can */
2984	if (map->bus->reg_noinc_read) {
2985	ret = regmap_noinc_readwrite(map, reg, val, val_len, write: false);
2986	goto out_unlock;
2987	}
2988
2989	while (val_len) {
2990	if (map->max_raw_read && map->max_raw_read < val_len)
2991	read_len = map->max_raw_read;
2992	else
2993	read_len = val_len;
2994	ret = _regmap_raw_read(map, reg, val, val_len: read_len, noinc: true);
2995	if (ret)
2996	goto out_unlock;
2997	val = ((u8 *)val) + read_len;
2998	val_len -= read_len;
2999	}
3000
3001	out_unlock:
3002	map->unlock(map->lock_arg);
3003	return ret;
3004	}
3005	EXPORT_SYMBOL_GPL(regmap_noinc_read);
3006
3007	/**
3008	* regmap_field_read(): Read a value to a single register field
3009	*
3010	* @field: Register field to read from
3011	* @val: Pointer to store read value
3012	*
3013	* A value of zero will be returned on success, a negative errno will
3014	* be returned in error cases.
3015	*/
3016	int regmap_field_read(struct regmap_field *field, unsigned int *val)
3017	{
3018	int ret;
3019	unsigned int reg_val;
3020	ret = regmap_read(field->regmap, field->reg, &reg_val);
3021	if (ret != 0)
3022	return ret;
3023
3024	reg_val &= field->mask;
3025	reg_val >>= field->shift;
3026	*val = reg_val;
3027
3028	return ret;
3029	}
3030	EXPORT_SYMBOL_GPL(regmap_field_read);
3031
3032	/**
3033	* regmap_fields_read() - Read a value to a single register field with port ID
3034	*
3035	* @field: Register field to read from
3036	* @id: port ID
3037	* @val: Pointer to store read value
3038	*
3039	* A value of zero will be returned on success, a negative errno will
3040	* be returned in error cases.
3041	*/
3042	int regmap_fields_read(struct regmap_field *field, unsigned int id,
3043	unsigned int *val)
3044	{
3045	int ret;
3046	unsigned int reg_val;
3047
3048	if (id >= field->id_size)
3049	return -EINVAL;
3050
3051	ret = regmap_read(field->regmap,
3052	field->reg + (field->id_offset * id),
3053	&reg_val);
3054	if (ret != 0)
3055	return ret;
3056
3057	reg_val &= field->mask;
3058	reg_val >>= field->shift;
3059	*val = reg_val;
3060
3061	return ret;
3062	}
3063	EXPORT_SYMBOL_GPL(regmap_fields_read);
3064
3065	/**
3066	* regmap_bulk_read() - Read multiple registers from the device
3067	*
3068	* @map: Register map to read from
3069	* @reg: First register to be read from
3070	* @val: Pointer to store read value, in native register size for device
3071	* @val_count: Number of registers to read
3072	*
3073	* A value of zero will be returned on success, a negative errno will
3074	* be returned in error cases.
3075	*/
3076	int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3077	size_t val_count)
3078	{
3079	int ret, i;
3080	size_t val_bytes = map->format.val_bytes;
3081	bool vol = regmap_volatile_range(map, reg, num: val_count);
3082
3083	if (!IS_ALIGNED(reg, map->reg_stride))
3084	return -EINVAL;
3085	if (val_count == 0)
3086	return -EINVAL;
3087
3088	if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3089	ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3090	if (ret != 0)
3091	return ret;
3092
3093	for (i = 0; i < val_count * val_bytes; i += val_bytes)
3094	map->format.parse_inplace(val + i);
3095	} else {
3096	u32 *u32 = val;
3097	u16 *u16 = val;
3098	u8 *u8 = val;
3099
3100	map->lock(map->lock_arg);
3101
3102	for (i = 0; i < val_count; i++) {
3103	unsigned int ival;
3104
3105	ret = _regmap_read(map, reg: reg + regmap_get_offset(map, index: i),
3106	val: &ival);
3107	if (ret != 0)
3108	goto out;
3109
3110	switch (map->format.val_bytes) {
3111	case 4:
3112	u32[i] = ival;
3113	break;
3114	case 2:
3115	u16[i] = ival;
3116	break;
3117	case 1:
3118	u8[i] = ival;
3119	break;
3120	default:
3121	ret = -EINVAL;
3122	goto out;
3123	}
3124	}
3125
3126	out:
3127	map->unlock(map->lock_arg);
3128	}
3129
3130	if (!ret)
3131	trace_regmap_bulk_read(map, reg, val, val_len: val_bytes * val_count);
3132
3133	return ret;
3134	}
3135	EXPORT_SYMBOL_GPL(regmap_bulk_read);
3136
3137	static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3138	unsigned int mask, unsigned int val,
3139	bool *change, bool force_write)
3140	{
3141	int ret;
3142	unsigned int tmp, orig;
3143
3144	if (change)
3145	*change = false;
3146
3147	if (regmap_volatile(map, reg) && map->reg_update_bits) {
3148	reg = regmap_reg_addr(map, reg);
3149	ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3150	if (ret == 0 && change)
3151	*change = true;
3152	} else {
3153	ret = _regmap_read(map, reg, val: &orig);
3154	if (ret != 0)
3155	return ret;
3156
3157	tmp = orig & ~mask;
3158	tmp |= val & mask;
3159
3160	if (force_write || (tmp != orig) || map->force_write_field) {
3161	ret = _regmap_write(map, reg, val: tmp);
3162	if (ret == 0 && change)
3163	*change = true;
3164	}
3165	}
3166
3167	return ret;
3168	}
3169
3170	/**
3171	* regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3172	*
3173	* @map: Register map to update
3174	* @reg: Register to update
3175	* @mask: Bitmask to change
3176	* @val: New value for bitmask
3177	* @change: Boolean indicating if a write was done
3178	* @async: Boolean indicating asynchronously
3179	* @force: Boolean indicating use force update
3180	*
3181	* Perform a read/modify/write cycle on a register map with change, async, force
3182	* options.
3183	*
3184	* If async is true:
3185	*
3186	* With most buses the read must be done synchronously so this is most useful
3187	* for devices with a cache which do not need to interact with the hardware to
3188	* determine the current register value.
3189	*
3190	* Returns zero for success, a negative number on error.
3191	*/
3192	int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3193	unsigned int mask, unsigned int val,
3194	bool *change, bool async, bool force)
3195	{
3196	int ret;
3197
3198	map->lock(map->lock_arg);
3199
3200	map->async = async;
3201
3202	ret = _regmap_update_bits(map, reg, mask, val, change, force_write: force);
3203
3204	map->async = false;
3205
3206	map->unlock(map->lock_arg);
3207
3208	return ret;
3209	}
3210	EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3211
3212	/**
3213	* regmap_test_bits() - Check if all specified bits are set in a register.
3214	*
3215	* @map: Register map to operate on
3216	* @reg: Register to read from
3217	* @bits: Bits to test
3218	*
3219	* Returns 0 if at least one of the tested bits is not set, 1 if all tested
3220	* bits are set and a negative error number if the underlying regmap_read()
3221	* fails.
3222	*/
3223	int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3224	{
3225	unsigned int val, ret;
3226
3227	ret = regmap_read(map, reg, &val);
3228	if (ret)
3229	return ret;
3230
3231	return (val & bits) == bits;
3232	}
3233	EXPORT_SYMBOL_GPL(regmap_test_bits);
3234
3235	void regmap_async_complete_cb(struct regmap_async *async, int ret)
3236	{
3237	struct regmap *map = async->map;
3238	bool wake;
3239
3240	trace_regmap_async_io_complete(map);
3241
3242	spin_lock(lock: &map->async_lock);
3243	list_move(list: &async->list, head: &map->async_free);
3244	wake = list_empty(head: &map->async_list);
3245
3246	if (ret != 0)
3247	map->async_ret = ret;
3248
3249	spin_unlock(lock: &map->async_lock);
3250
3251	if (wake)
3252	wake_up(&map->async_waitq);
3253	}
3254	EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3255
3256	static int regmap_async_is_done(struct regmap *map)
3257	{
3258	unsigned long flags;
3259	int ret;
3260
3261	spin_lock_irqsave(&map->async_lock, flags);
3262	ret = list_empty(head: &map->async_list);
3263	spin_unlock_irqrestore(lock: &map->async_lock, flags);
3264
3265	return ret;
3266	}
3267
3268	/**
3269	* regmap_async_complete - Ensure all asynchronous I/O has completed.
3270	*
3271	* @map: Map to operate on.
3272	*
3273	* Blocks until any pending asynchronous I/O has completed. Returns
3274	* an error code for any failed I/O operations.
3275	*/
3276	int regmap_async_complete(struct regmap *map)
3277	{
3278	unsigned long flags;
3279	int ret;
3280
3281	/* Nothing to do with no async support */
3282	if (!map->bus || !map->bus->async_write)
3283	return 0;
3284
3285	trace_regmap_async_complete_start(map);
3286
3287	wait_event(map->async_waitq, regmap_async_is_done(map));
3288
3289	spin_lock_irqsave(&map->async_lock, flags);
3290	ret = map->async_ret;
3291	map->async_ret = 0;
3292	spin_unlock_irqrestore(lock: &map->async_lock, flags);
3293
3294	trace_regmap_async_complete_done(map);
3295
3296	return ret;
3297	}
3298	EXPORT_SYMBOL_GPL(regmap_async_complete);
3299
3300	/**
3301	* regmap_register_patch - Register and apply register updates to be applied
3302	* on device initialistion
3303	*
3304	* @map: Register map to apply updates to.
3305	* @regs: Values to update.
3306	* @num_regs: Number of entries in regs.
3307	*
3308	* Register a set of register updates to be applied to the device
3309	* whenever the device registers are synchronised with the cache and
3310	* apply them immediately. Typically this is used to apply
3311	* corrections to be applied to the device defaults on startup, such
3312	* as the updates some vendors provide to undocumented registers.
3313	*
3314	* The caller must ensure that this function cannot be called
3315	* concurrently with either itself or regcache_sync().
3316	*/
3317	int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3318	int num_regs)
3319	{
3320	struct reg_sequence *p;
3321	int ret;
3322	bool bypass;
3323
3324	if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3325	num_regs))
3326	return 0;
3327
3328	p = krealloc(objp: map->patch,
3329	new_size: sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3330	GFP_KERNEL);
3331	if (p) {
3332	memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3333	map->patch = p;
3334	map->patch_regs += num_regs;
3335	} else {
3336	return -ENOMEM;
3337	}
3338
3339	map->lock(map->lock_arg);
3340
3341	bypass = map->cache_bypass;
3342
3343	map->cache_bypass = true;
3344	map->async = true;
3345
3346	ret = _regmap_multi_reg_write(map, regs, num_regs);
3347
3348	map->async = false;
3349	map->cache_bypass = bypass;
3350
3351	map->unlock(map->lock_arg);
3352
3353	regmap_async_complete(map);
3354
3355	return ret;
3356	}
3357	EXPORT_SYMBOL_GPL(regmap_register_patch);
3358
3359	/**
3360	* regmap_get_val_bytes() - Report the size of a register value
3361	*
3362	* @map: Register map to operate on.
3363	*
3364	* Report the size of a register value, mainly intended to for use by
3365	* generic infrastructure built on top of regmap.
3366	*/
3367	int regmap_get_val_bytes(struct regmap *map)
3368	{
3369	if (map->format.format_write)
3370	return -EINVAL;
3371
3372	return map->format.val_bytes;
3373	}
3374	EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3375
3376	/**
3377	* regmap_get_max_register() - Report the max register value
3378	*
3379	* @map: Register map to operate on.
3380	*
3381	* Report the max register value, mainly intended to for use by
3382	* generic infrastructure built on top of regmap.
3383	*/
3384	int regmap_get_max_register(struct regmap *map)
3385	{
3386	return map->max_register ? map->max_register : -EINVAL;
3387	}
3388	EXPORT_SYMBOL_GPL(regmap_get_max_register);
3389
3390	/**
3391	* regmap_get_reg_stride() - Report the register address stride
3392	*
3393	* @map: Register map to operate on.
3394	*
3395	* Report the register address stride, mainly intended to for use by
3396	* generic infrastructure built on top of regmap.
3397	*/
3398	int regmap_get_reg_stride(struct regmap *map)
3399	{
3400	return map->reg_stride;
3401	}
3402	EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3403
3404	/**
3405	* regmap_might_sleep() - Returns whether a regmap access might sleep.
3406	*
3407	* @map: Register map to operate on.
3408	*
3409	* Returns true if an access to the register might sleep, else false.
3410	*/
3411	bool regmap_might_sleep(struct regmap *map)
3412	{
3413	return map->can_sleep;
3414	}
3415	EXPORT_SYMBOL_GPL(regmap_might_sleep);
3416
3417	int regmap_parse_val(struct regmap *map, const void *buf,
3418	unsigned int *val)
3419	{
3420	if (!map->format.parse_val)
3421	return -EINVAL;
3422
3423	*val = map->format.parse_val(buf);
3424
3425	return 0;
3426	}
3427	EXPORT_SYMBOL_GPL(regmap_parse_val);
3428
3429	static int __init regmap_initcall(void)
3430	{
3431	regmap_debugfs_initcall();
3432
3433	return 0;
3434	}
3435	postcore_initcall(regmap_initcall);
3436