1 | /* |
2 | * |
3 | * tp3780i.c -- board driver for 3780i on ThinkPads |
4 | * |
5 | * |
6 | * Written By: Mike Sullivan IBM Corporation |
7 | * |
8 | * Copyright (C) 1999 IBM Corporation |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by |
12 | * the Free Software Foundation; either version 2 of the License, or |
13 | * (at your option) any later version. |
14 | * |
15 | * This program is distributed in the hope that it will be useful, |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
18 | * GNU General Public License for more details. |
19 | * |
20 | * NO WARRANTY |
21 | * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR |
22 | * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT |
23 | * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, |
24 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is |
25 | * solely responsible for determining the appropriateness of using and |
26 | * distributing the Program and assumes all risks associated with its |
27 | * exercise of rights under this Agreement, including but not limited to |
28 | * the risks and costs of program errors, damage to or loss of data, |
29 | * programs or equipment, and unavailability or interruption of operations. |
30 | * |
31 | * DISCLAIMER OF LIABILITY |
32 | * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY |
33 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
34 | * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND |
35 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR |
36 | * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE |
37 | * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED |
38 | * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES |
39 | * |
40 | * You should have received a copy of the GNU General Public License |
41 | * along with this program; if not, write to the Free Software |
42 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
43 | * |
44 | * |
45 | * 10/23/2000 - Alpha Release |
46 | * First release to the public |
47 | */ |
48 | |
49 | #include <linux/interrupt.h> |
50 | #include <linux/kernel.h> |
51 | #include <linux/ptrace.h> |
52 | #include <linux/ioport.h> |
53 | #include <asm/io.h> |
54 | #include "smapi.h" |
55 | #include "mwavedd.h" |
56 | #include "tp3780i.h" |
57 | #include "3780i.h" |
58 | #include "mwavepub.h" |
59 | |
60 | static unsigned short s_ausThinkpadIrqToField[16] = |
61 | { 0xFFFF, 0xFFFF, 0xFFFF, 0x0001, 0x0002, 0x0003, 0xFFFF, 0x0004, |
62 | 0xFFFF, 0xFFFF, 0x0005, 0x0006, 0xFFFF, 0xFFFF, 0xFFFF, 0x0007 }; |
63 | static unsigned short s_ausThinkpadDmaToField[8] = |
64 | { 0x0001, 0x0002, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0x0003, 0x0004 }; |
65 | static unsigned short s_numIrqs = 16, s_numDmas = 8; |
66 | |
67 | |
68 | static void EnableSRAM(THINKPAD_BD_DATA * pBDData) |
69 | { |
70 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
71 | unsigned short usDspBaseIO = pSettings->usDspBaseIO; |
72 | DSP_GPIO_OUTPUT_DATA_15_8 rGpioOutputData; |
73 | DSP_GPIO_DRIVER_ENABLE_15_8 rGpioDriverEnable; |
74 | DSP_GPIO_MODE_15_8 rGpioMode; |
75 | |
76 | PRINTK_1(TRACE_TP3780I, "tp3780i::EnableSRAM, entry\n" ); |
77 | |
78 | MKWORD(rGpioMode) = ReadMsaCfg(DSP_GpioModeControl_15_8); |
79 | rGpioMode.GpioMode10 = 0; |
80 | WriteMsaCfg(DSP_GpioModeControl_15_8, MKWORD(rGpioMode)); |
81 | |
82 | MKWORD(rGpioDriverEnable) = 0; |
83 | rGpioDriverEnable.Enable10 = true; |
84 | rGpioDriverEnable.Mask10 = true; |
85 | WriteMsaCfg(DSP_GpioDriverEnable_15_8, MKWORD(rGpioDriverEnable)); |
86 | |
87 | MKWORD(rGpioOutputData) = 0; |
88 | rGpioOutputData.Latch10 = 0; |
89 | rGpioOutputData.Mask10 = true; |
90 | WriteMsaCfg(DSP_GpioOutputData_15_8, MKWORD(rGpioOutputData)); |
91 | |
92 | PRINTK_1(TRACE_TP3780I, "tp3780i::EnableSRAM exit\n" ); |
93 | } |
94 | |
95 | |
96 | static irqreturn_t UartInterrupt(int irq, void *dev_id) |
97 | { |
98 | PRINTK_3(TRACE_TP3780I, |
99 | "tp3780i::UartInterrupt entry irq %x dev_id %p\n" , irq, dev_id); |
100 | return IRQ_HANDLED; |
101 | } |
102 | |
103 | static irqreturn_t DspInterrupt(int irq, void *dev_id) |
104 | { |
105 | pMWAVE_DEVICE_DATA pDrvData = &mwave_s_mdd; |
106 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pDrvData->rBDData.rDspSettings; |
107 | unsigned short usDspBaseIO = pSettings->usDspBaseIO; |
108 | unsigned short usIPCSource = 0, usIsolationMask, usPCNum; |
109 | |
110 | PRINTK_3(TRACE_TP3780I, |
111 | "tp3780i::DspInterrupt entry irq %x dev_id %p\n" , irq, dev_id); |
112 | |
113 | if (dsp3780I_GetIPCSource(usDspBaseIO, pusIPCSource: &usIPCSource) == 0) { |
114 | PRINTK_2(TRACE_TP3780I, |
115 | "tp3780i::DspInterrupt, return from dsp3780i_GetIPCSource, usIPCSource %x\n" , |
116 | usIPCSource); |
117 | usIsolationMask = 1; |
118 | for (usPCNum = 1; usPCNum <= 16; usPCNum++) { |
119 | if (usIPCSource & usIsolationMask) { |
120 | usIPCSource &= ~usIsolationMask; |
121 | PRINTK_3(TRACE_TP3780I, |
122 | "tp3780i::DspInterrupt usPCNum %x usIPCSource %x\n" , |
123 | usPCNum, usIPCSource); |
124 | if (pDrvData->IPCs[usPCNum - 1].usIntCount == 0) { |
125 | pDrvData->IPCs[usPCNum - 1].usIntCount = 1; |
126 | } |
127 | PRINTK_2(TRACE_TP3780I, |
128 | "tp3780i::DspInterrupt usIntCount %x\n" , |
129 | pDrvData->IPCs[usPCNum - 1].usIntCount); |
130 | if (pDrvData->IPCs[usPCNum - 1].bIsEnabled == true) { |
131 | PRINTK_2(TRACE_TP3780I, |
132 | "tp3780i::DspInterrupt, waking up usPCNum %x\n" , |
133 | usPCNum - 1); |
134 | wake_up_interruptible(&pDrvData->IPCs[usPCNum - 1].ipc_wait_queue); |
135 | } else { |
136 | PRINTK_2(TRACE_TP3780I, |
137 | "tp3780i::DspInterrupt, no one waiting for IPC %x\n" , |
138 | usPCNum - 1); |
139 | } |
140 | } |
141 | if (usIPCSource == 0) |
142 | break; |
143 | /* try next IPC */ |
144 | usIsolationMask = usIsolationMask << 1; |
145 | } |
146 | } else { |
147 | PRINTK_1(TRACE_TP3780I, |
148 | "tp3780i::DspInterrupt, return false from dsp3780i_GetIPCSource\n" ); |
149 | } |
150 | PRINTK_1(TRACE_TP3780I, "tp3780i::DspInterrupt exit\n" ); |
151 | return IRQ_HANDLED; |
152 | } |
153 | |
154 | |
155 | int tp3780I_InitializeBoardData(THINKPAD_BD_DATA * pBDData) |
156 | { |
157 | int retval = 0; |
158 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
159 | |
160 | |
161 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_InitializeBoardData entry pBDData %p\n" , pBDData); |
162 | |
163 | pBDData->bDSPEnabled = false; |
164 | pSettings->bInterruptClaimed = false; |
165 | |
166 | retval = smapi_init(); |
167 | if (retval) { |
168 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_InitializeBoardData: Error: SMAPI is not available on this machine\n" ); |
169 | } else { |
170 | if (mwave_3780i_irq || mwave_3780i_io || mwave_uart_irq || mwave_uart_io) { |
171 | retval = smapi_set_DSP_cfg(); |
172 | } |
173 | } |
174 | |
175 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_InitializeBoardData exit retval %x\n" , retval); |
176 | |
177 | return retval; |
178 | } |
179 | |
180 | void tp3780I_Cleanup(THINKPAD_BD_DATA *pBDData) |
181 | { |
182 | PRINTK_2(TRACE_TP3780I, |
183 | "tp3780i::tp3780I_Cleanup entry and exit pBDData %p\n" , pBDData); |
184 | } |
185 | |
186 | int tp3780I_CalcResources(THINKPAD_BD_DATA * pBDData) |
187 | { |
188 | SMAPI_DSP_SETTINGS rSmapiInfo; |
189 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
190 | |
191 | PRINTK_2(TRACE_TP3780I, |
192 | "tp3780i::tp3780I_CalcResources entry pBDData %p\n" , pBDData); |
193 | |
194 | if (smapi_query_DSP_cfg(pSettings: &rSmapiInfo)) { |
195 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_CalcResources: Error: Could not query DSP config. Aborting.\n" ); |
196 | return -EIO; |
197 | } |
198 | |
199 | /* Sanity check */ |
200 | if ( |
201 | ( rSmapiInfo.usDspIRQ == 0 ) |
202 | || ( rSmapiInfo.usDspBaseIO == 0 ) |
203 | || ( rSmapiInfo.usUartIRQ == 0 ) |
204 | || ( rSmapiInfo.usUartBaseIO == 0 ) |
205 | ) { |
206 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_CalcResources: Error: Illegal resource setting. Aborting.\n" ); |
207 | return -EIO; |
208 | } |
209 | |
210 | pSettings->bDSPEnabled = (rSmapiInfo.bDSPEnabled && rSmapiInfo.bDSPPresent); |
211 | pSettings->bModemEnabled = rSmapiInfo.bModemEnabled; |
212 | pSettings->usDspIrq = rSmapiInfo.usDspIRQ; |
213 | pSettings->usDspDma = rSmapiInfo.usDspDMA; |
214 | pSettings->usDspBaseIO = rSmapiInfo.usDspBaseIO; |
215 | pSettings->usUartIrq = rSmapiInfo.usUartIRQ; |
216 | pSettings->usUartBaseIO = rSmapiInfo.usUartBaseIO; |
217 | |
218 | pSettings->uDStoreSize = TP_ABILITIES_DATA_SIZE; |
219 | pSettings->uIStoreSize = TP_ABILITIES_INST_SIZE; |
220 | pSettings->uIps = TP_ABILITIES_INTS_PER_SEC; |
221 | |
222 | if (pSettings->bDSPEnabled && pSettings->bModemEnabled && pSettings->usDspIrq == pSettings->usUartIrq) { |
223 | pBDData->bShareDspIrq = pBDData->bShareUartIrq = 1; |
224 | } else { |
225 | pBDData->bShareDspIrq = pBDData->bShareUartIrq = 0; |
226 | } |
227 | |
228 | PRINTK_1(TRACE_TP3780I, "tp3780i::tp3780I_CalcResources exit\n" ); |
229 | |
230 | return 0; |
231 | } |
232 | |
233 | |
234 | int tp3780I_ClaimResources(THINKPAD_BD_DATA * pBDData) |
235 | { |
236 | int retval = 0; |
237 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
238 | struct resource *pres; |
239 | |
240 | PRINTK_2(TRACE_TP3780I, |
241 | "tp3780i::tp3780I_ClaimResources entry pBDData %p\n" , pBDData); |
242 | |
243 | pres = request_region(pSettings->usDspBaseIO, 16, "mwave_3780i" ); |
244 | if ( pres == NULL ) retval = -EIO; |
245 | |
246 | if (retval) { |
247 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_ClaimResources: Error: Could not claim I/O region starting at %x\n" , pSettings->usDspBaseIO); |
248 | retval = -EIO; |
249 | } |
250 | |
251 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_ClaimResources exit retval %x\n" , retval); |
252 | |
253 | return retval; |
254 | } |
255 | |
256 | int tp3780I_ReleaseResources(THINKPAD_BD_DATA * pBDData) |
257 | { |
258 | int retval = 0; |
259 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
260 | |
261 | PRINTK_2(TRACE_TP3780I, |
262 | "tp3780i::tp3780I_ReleaseResources entry pBDData %p\n" , pBDData); |
263 | |
264 | release_region(pSettings->usDspBaseIO & (~3), 16); |
265 | |
266 | if (pSettings->bInterruptClaimed) { |
267 | free_irq(pSettings->usDspIrq, NULL); |
268 | pSettings->bInterruptClaimed = false; |
269 | } |
270 | |
271 | PRINTK_2(TRACE_TP3780I, |
272 | "tp3780i::tp3780I_ReleaseResources exit retval %x\n" , retval); |
273 | |
274 | return retval; |
275 | } |
276 | |
277 | |
278 | |
279 | int tp3780I_EnableDSP(THINKPAD_BD_DATA * pBDData) |
280 | { |
281 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
282 | bool bDSPPoweredUp = false, bInterruptAllocated = false; |
283 | |
284 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_EnableDSP entry pBDData %p\n" , pBDData); |
285 | |
286 | if (pBDData->bDSPEnabled) { |
287 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: DSP already enabled!\n" ); |
288 | goto exit_cleanup; |
289 | } |
290 | |
291 | if (!pSettings->bDSPEnabled) { |
292 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780::tp3780I_EnableDSP: Error: pSettings->bDSPEnabled not set\n" ); |
293 | goto exit_cleanup; |
294 | } |
295 | |
296 | if ( |
297 | (pSettings->usDspIrq >= s_numIrqs) |
298 | || (pSettings->usDspDma >= s_numDmas) |
299 | || (s_ausThinkpadIrqToField[pSettings->usDspIrq] == 0xFFFF) |
300 | || (s_ausThinkpadDmaToField[pSettings->usDspDma] == 0xFFFF) |
301 | ) { |
302 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: invalid irq %x\n" , pSettings->usDspIrq); |
303 | goto exit_cleanup; |
304 | } |
305 | |
306 | if ( |
307 | ((pSettings->usDspBaseIO & 0xF00F) != 0) |
308 | || (pSettings->usDspBaseIO & 0x0FF0) == 0 |
309 | ) { |
310 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: Invalid DSP base I/O address %x\n" , pSettings->usDspBaseIO); |
311 | goto exit_cleanup; |
312 | } |
313 | |
314 | if (pSettings->bModemEnabled) { |
315 | if ( |
316 | pSettings->usUartIrq >= s_numIrqs |
317 | || s_ausThinkpadIrqToField[pSettings->usUartIrq] == 0xFFFF |
318 | ) { |
319 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: Invalid UART IRQ %x\n" , pSettings->usUartIrq); |
320 | goto exit_cleanup; |
321 | } |
322 | switch (pSettings->usUartBaseIO) { |
323 | case 0x03F8: |
324 | case 0x02F8: |
325 | case 0x03E8: |
326 | case 0x02E8: |
327 | break; |
328 | |
329 | default: |
330 | PRINTK_ERROR("tp3780i::tp3780I_EnableDSP: Error: Invalid UART base I/O address %x\n" , pSettings->usUartBaseIO); |
331 | goto exit_cleanup; |
332 | } |
333 | } |
334 | |
335 | pSettings->bDspIrqActiveLow = pSettings->bDspIrqPulse = true; |
336 | pSettings->bUartIrqActiveLow = pSettings->bUartIrqPulse = true; |
337 | |
338 | if (pBDData->bShareDspIrq) { |
339 | pSettings->bDspIrqActiveLow = false; |
340 | } |
341 | if (pBDData->bShareUartIrq) { |
342 | pSettings->bUartIrqActiveLow = false; |
343 | } |
344 | |
345 | pSettings->usNumTransfers = TP_CFG_NumTransfers; |
346 | pSettings->usReRequest = TP_CFG_RerequestTimer; |
347 | pSettings->bEnableMEMCS16 = TP_CFG_MEMCS16; |
348 | pSettings->usIsaMemCmdWidth = TP_CFG_IsaMemCmdWidth; |
349 | pSettings->bGateIOCHRDY = TP_CFG_GateIOCHRDY; |
350 | pSettings->bEnablePwrMgmt = TP_CFG_EnablePwrMgmt; |
351 | pSettings->usHBusTimerLoadValue = TP_CFG_HBusTimerValue; |
352 | pSettings->bDisableLBusTimeout = TP_CFG_DisableLBusTimeout; |
353 | pSettings->usN_Divisor = TP_CFG_N_Divisor; |
354 | pSettings->usM_Multiplier = TP_CFG_M_Multiplier; |
355 | pSettings->bPllBypass = TP_CFG_PllBypass; |
356 | pSettings->usChipletEnable = TP_CFG_ChipletEnable; |
357 | |
358 | if (request_irq(irq: pSettings->usUartIrq, handler: &UartInterrupt, flags: 0, name: "mwave_uart" , NULL)) { |
359 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: Could not get UART IRQ %x\n" , pSettings->usUartIrq); |
360 | goto exit_cleanup; |
361 | } else { /* no conflict just release */ |
362 | free_irq(pSettings->usUartIrq, NULL); |
363 | } |
364 | |
365 | if (request_irq(irq: pSettings->usDspIrq, handler: &DspInterrupt, flags: 0, name: "mwave_3780i" , NULL)) { |
366 | PRINTK_ERROR("tp3780i::tp3780I_EnableDSP: Error: Could not get 3780i IRQ %x\n" , pSettings->usDspIrq); |
367 | goto exit_cleanup; |
368 | } else { |
369 | PRINTK_3(TRACE_TP3780I, |
370 | "tp3780i::tp3780I_EnableDSP, got interrupt %x bShareDspIrq %x\n" , |
371 | pSettings->usDspIrq, pBDData->bShareDspIrq); |
372 | bInterruptAllocated = true; |
373 | pSettings->bInterruptClaimed = true; |
374 | } |
375 | |
376 | smapi_set_DSP_power_state(bOn: false); |
377 | if (smapi_set_DSP_power_state(bOn: true)) { |
378 | PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: smapi_set_DSP_power_state(true) failed\n" ); |
379 | goto exit_cleanup; |
380 | } else { |
381 | bDSPPoweredUp = true; |
382 | } |
383 | |
384 | if (dsp3780I_EnableDSP(pSettings, pIrqMap: s_ausThinkpadIrqToField, pDmaMap: s_ausThinkpadDmaToField)) { |
385 | PRINTK_ERROR("tp3780i::tp3780I_EnableDSP: Error: dsp7880I_EnableDSP() failed\n" ); |
386 | goto exit_cleanup; |
387 | } |
388 | |
389 | EnableSRAM(pBDData); |
390 | |
391 | pBDData->bDSPEnabled = true; |
392 | |
393 | PRINTK_1(TRACE_TP3780I, "tp3780i::tp3780I_EnableDSP exit\n" ); |
394 | |
395 | return 0; |
396 | |
397 | exit_cleanup: |
398 | PRINTK_ERROR("tp3780i::tp3780I_EnableDSP: Cleaning up\n" ); |
399 | if (bDSPPoweredUp) |
400 | smapi_set_DSP_power_state(bOn: false); |
401 | if (bInterruptAllocated) { |
402 | free_irq(pSettings->usDspIrq, NULL); |
403 | pSettings->bInterruptClaimed = false; |
404 | } |
405 | return -EIO; |
406 | } |
407 | |
408 | |
409 | int tp3780I_DisableDSP(THINKPAD_BD_DATA * pBDData) |
410 | { |
411 | int retval = 0; |
412 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
413 | |
414 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_DisableDSP entry pBDData %p\n" , pBDData); |
415 | |
416 | if (pBDData->bDSPEnabled) { |
417 | dsp3780I_DisableDSP(pSettings: &pBDData->rDspSettings); |
418 | if (pSettings->bInterruptClaimed) { |
419 | free_irq(pSettings->usDspIrq, NULL); |
420 | pSettings->bInterruptClaimed = false; |
421 | } |
422 | smapi_set_DSP_power_state(bOn: false); |
423 | pBDData->bDSPEnabled = false; |
424 | } |
425 | |
426 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_DisableDSP exit retval %x\n" , retval); |
427 | |
428 | return retval; |
429 | } |
430 | |
431 | |
432 | int tp3780I_ResetDSP(THINKPAD_BD_DATA * pBDData) |
433 | { |
434 | int retval = 0; |
435 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
436 | |
437 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_ResetDSP entry pBDData %p\n" , |
438 | pBDData); |
439 | |
440 | if (dsp3780I_Reset(pSettings) == 0) { |
441 | EnableSRAM(pBDData); |
442 | } else { |
443 | retval = -EIO; |
444 | } |
445 | |
446 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_ResetDSP exit retval %x\n" , retval); |
447 | |
448 | return retval; |
449 | } |
450 | |
451 | |
452 | int tp3780I_StartDSP(THINKPAD_BD_DATA * pBDData) |
453 | { |
454 | int retval = 0; |
455 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
456 | |
457 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_StartDSP entry pBDData %p\n" , pBDData); |
458 | |
459 | if (dsp3780I_Run(pSettings) == 0) { |
460 | // @BUG @TBD EnableSRAM(pBDData); |
461 | } else { |
462 | retval = -EIO; |
463 | } |
464 | |
465 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_StartDSP exit retval %x\n" , retval); |
466 | |
467 | return retval; |
468 | } |
469 | |
470 | |
471 | int tp3780I_QueryAbilities(THINKPAD_BD_DATA * pBDData, MW_ABILITIES * pAbilities) |
472 | { |
473 | PRINTK_2(TRACE_TP3780I, |
474 | "tp3780i::tp3780I_QueryAbilities entry pBDData %p\n" , pBDData); |
475 | |
476 | memset(pAbilities, 0, sizeof(*pAbilities)); |
477 | /* fill out standard constant fields */ |
478 | pAbilities->instr_per_sec = pBDData->rDspSettings.uIps; |
479 | pAbilities->data_size = pBDData->rDspSettings.uDStoreSize; |
480 | pAbilities->inst_size = pBDData->rDspSettings.uIStoreSize; |
481 | pAbilities->bus_dma_bw = pBDData->rDspSettings.uDmaBandwidth; |
482 | |
483 | /* fill out dynamically determined fields */ |
484 | pAbilities->component_list[0] = 0x00010000 | MW_ADC_MASK; |
485 | pAbilities->component_list[1] = 0x00010000 | MW_ACI_MASK; |
486 | pAbilities->component_list[2] = 0x00010000 | MW_AIC1_MASK; |
487 | pAbilities->component_list[3] = 0x00010000 | MW_AIC2_MASK; |
488 | pAbilities->component_list[4] = 0x00010000 | MW_CDDAC_MASK; |
489 | pAbilities->component_list[5] = 0x00010000 | MW_MIDI_MASK; |
490 | pAbilities->component_list[6] = 0x00010000 | MW_UART_MASK; |
491 | pAbilities->component_count = 7; |
492 | |
493 | /* Fill out Mwave OS and BIOS task names */ |
494 | |
495 | memcpy(pAbilities->mwave_os_name, TP_ABILITIES_MWAVEOS_NAME, |
496 | sizeof(TP_ABILITIES_MWAVEOS_NAME)); |
497 | memcpy(pAbilities->bios_task_name, TP_ABILITIES_BIOSTASK_NAME, |
498 | sizeof(TP_ABILITIES_BIOSTASK_NAME)); |
499 | |
500 | PRINTK_1(TRACE_TP3780I, |
501 | "tp3780i::tp3780I_QueryAbilities exit retval=SUCCESSFUL\n" ); |
502 | |
503 | return 0; |
504 | } |
505 | |
506 | int tp3780I_ReadWriteDspDStore(THINKPAD_BD_DATA * pBDData, unsigned int uOpcode, |
507 | void __user *pvBuffer, unsigned int uCount, |
508 | unsigned long ulDSPAddr) |
509 | { |
510 | int retval = 0; |
511 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
512 | unsigned short usDspBaseIO = pSettings->usDspBaseIO; |
513 | bool bRC = 0; |
514 | |
515 | PRINTK_6(TRACE_TP3780I, |
516 | "tp3780i::tp3780I_ReadWriteDspDStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx\n" , |
517 | pBDData, uOpcode, pvBuffer, uCount, ulDSPAddr); |
518 | |
519 | if (pBDData->bDSPEnabled) { |
520 | switch (uOpcode) { |
521 | case IOCTL_MW_READ_DATA: |
522 | bRC = dsp3780I_ReadDStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); |
523 | break; |
524 | |
525 | case IOCTL_MW_READCLEAR_DATA: |
526 | bRC = dsp3780I_ReadAndClearDStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); |
527 | break; |
528 | |
529 | case IOCTL_MW_WRITE_DATA: |
530 | bRC = dsp3780I_WriteDStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); |
531 | break; |
532 | } |
533 | } |
534 | |
535 | retval = (bRC) ? -EIO : 0; |
536 | PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_ReadWriteDspDStore exit retval %x\n" , retval); |
537 | |
538 | return retval; |
539 | } |
540 | |
541 | |
542 | int tp3780I_ReadWriteDspIStore(THINKPAD_BD_DATA * pBDData, unsigned int uOpcode, |
543 | void __user *pvBuffer, unsigned int uCount, |
544 | unsigned long ulDSPAddr) |
545 | { |
546 | int retval = 0; |
547 | DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings; |
548 | unsigned short usDspBaseIO = pSettings->usDspBaseIO; |
549 | bool bRC = 0; |
550 | |
551 | PRINTK_6(TRACE_TP3780I, |
552 | "tp3780i::tp3780I_ReadWriteDspIStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx\n" , |
553 | pBDData, uOpcode, pvBuffer, uCount, ulDSPAddr); |
554 | |
555 | if (pBDData->bDSPEnabled) { |
556 | switch (uOpcode) { |
557 | case IOCTL_MW_READ_INST: |
558 | bRC = dsp3780I_ReadIStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); |
559 | break; |
560 | |
561 | case IOCTL_MW_WRITE_INST: |
562 | bRC = dsp3780I_WriteIStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); |
563 | break; |
564 | } |
565 | } |
566 | |
567 | retval = (bRC) ? -EIO : 0; |
568 | |
569 | PRINTK_2(TRACE_TP3780I, |
570 | "tp3780i::tp3780I_ReadWriteDspIStore exit retval %x\n" , retval); |
571 | |
572 | return retval; |
573 | } |
574 | |
575 | |