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1 | /* |
---|---|
2 | * drivers/clk/at91/pmc.h |
3 | * |
4 | * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation; either version 2 of the License, or |
9 | * (at your option) any later version. |
10 | */ |
11 | |
12 | #ifndef __PMC_H_ |
13 | #define __PMC_H_ |
14 | |
15 | #include <linux/io.h> |
16 | #include <linux/irqdomain.h> |
17 | #include <linux/regmap.h> |
18 | #include <linux/spinlock.h> |
19 | |
20 | extern spinlock_t pmc_pcr_lock; |
21 | |
22 | struct pmc_data { |
23 | unsigned int ncore; |
24 | struct clk_hw **chws; |
25 | unsigned int nsystem; |
26 | struct clk_hw **shws; |
27 | unsigned int nperiph; |
28 | struct clk_hw **phws; |
29 | unsigned int ngck; |
30 | struct clk_hw **ghws; |
31 | }; |
32 | |
33 | struct clk_range { |
34 | unsigned long min; |
35 | unsigned long max; |
36 | }; |
37 | |
38 | #define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,} |
39 | |
40 | struct clk_master_layout { |
41 | u32 mask; |
42 | u8 pres_shift; |
43 | }; |
44 | |
45 | extern const struct clk_master_layout at91rm9200_master_layout; |
46 | extern const struct clk_master_layout at91sam9x5_master_layout; |
47 | |
48 | struct clk_master_characteristics { |
49 | struct clk_range output; |
50 | u32 divisors[4]; |
51 | u8 have_div3_pres; |
52 | }; |
53 | |
54 | struct clk_pll_layout { |
55 | u32 pllr_mask; |
56 | u16 mul_mask; |
57 | u8 mul_shift; |
58 | }; |
59 | |
60 | extern const struct clk_pll_layout at91rm9200_pll_layout; |
61 | extern const struct clk_pll_layout at91sam9g45_pll_layout; |
62 | extern const struct clk_pll_layout at91sam9g20_pllb_layout; |
63 | extern const struct clk_pll_layout sama5d3_pll_layout; |
64 | |
65 | struct clk_pll_characteristics { |
66 | struct clk_range input; |
67 | int num_output; |
68 | struct clk_range *output; |
69 | u16 *icpll; |
70 | u8 *out; |
71 | }; |
72 | |
73 | struct clk_programmable_layout { |
74 | u8 pres_shift; |
75 | u8 css_mask; |
76 | u8 have_slck_mck; |
77 | }; |
78 | |
79 | extern const struct clk_programmable_layout at91rm9200_programmable_layout; |
80 | extern const struct clk_programmable_layout at91sam9g45_programmable_layout; |
81 | extern const struct clk_programmable_layout at91sam9x5_programmable_layout; |
82 | |
83 | #define ndck(a, s) (a[s - 1].id + 1) |
84 | #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1) |
85 | struct pmc_data *pmc_data_allocate(unsigned int ncore, unsigned int nsystem, |
86 | unsigned int nperiph, unsigned int ngck); |
87 | void pmc_data_free(struct pmc_data *pmc_data); |
88 | |
89 | int of_at91_get_clk_range(struct device_node *np, const char *propname, |
90 | struct clk_range *range); |
91 | |
92 | struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data); |
93 | |
94 | struct clk_hw * __init |
95 | at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name, |
96 | const char *parent_name); |
97 | |
98 | struct clk_hw * __init |
99 | at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name, |
100 | const char *parent_name); |
101 | |
102 | struct clk_hw * __init |
103 | at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name, |
104 | const char *parent_name); |
105 | |
106 | struct clk_hw * __init |
107 | at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, |
108 | const char *name, const char **parent_names, |
109 | u8 num_parents, u8 id, bool pll_audio, |
110 | const struct clk_range *range); |
111 | |
112 | struct clk_hw * __init |
113 | at91_clk_register_h32mx(struct regmap *regmap, const char *name, |
114 | const char *parent_name); |
115 | |
116 | struct clk_hw * __init |
117 | at91_clk_i2s_mux_register(struct regmap *regmap, const char *name, |
118 | const char * const *parent_names, |
119 | unsigned int num_parents, u8 bus_id); |
120 | |
121 | struct clk_hw * __init |
122 | at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name, |
123 | u32 frequency, u32 accuracy); |
124 | struct clk_hw * __init |
125 | at91_clk_register_main_osc(struct regmap *regmap, const char *name, |
126 | const char *parent_name, bool bypass); |
127 | struct clk_hw * __init |
128 | at91_clk_register_rm9200_main(struct regmap *regmap, |
129 | const char *name, |
130 | const char *parent_name); |
131 | struct clk_hw * __init |
132 | at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name, |
133 | const char **parent_names, int num_parents); |
134 | |
135 | struct clk_hw * __init |
136 | at91_clk_register_master(struct regmap *regmap, const char *name, |
137 | int num_parents, const char **parent_names, |
138 | const struct clk_master_layout *layout, |
139 | const struct clk_master_characteristics *characteristics); |
140 | |
141 | struct clk_hw * __init |
142 | at91_clk_register_peripheral(struct regmap *regmap, const char *name, |
143 | const char *parent_name, u32 id); |
144 | struct clk_hw * __init |
145 | at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, |
146 | const char *name, const char *parent_name, |
147 | u32 id, const struct clk_range *range); |
148 | |
149 | struct clk_hw * __init |
150 | at91_clk_register_pll(struct regmap *regmap, const char *name, |
151 | const char *parent_name, u8 id, |
152 | const struct clk_pll_layout *layout, |
153 | const struct clk_pll_characteristics *characteristics); |
154 | struct clk_hw * __init |
155 | at91_clk_register_plldiv(struct regmap *regmap, const char *name, |
156 | const char *parent_name); |
157 | |
158 | struct clk_hw * __init |
159 | at91_clk_register_programmable(struct regmap *regmap, const char *name, |
160 | const char **parent_names, u8 num_parents, u8 id, |
161 | const struct clk_programmable_layout *layout); |
162 | |
163 | struct clk_hw * __init |
164 | at91_clk_register_sam9260_slow(struct regmap *regmap, |
165 | const char *name, |
166 | const char **parent_names, |
167 | int num_parents); |
168 | |
169 | struct clk_hw * __init |
170 | at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name, |
171 | const char **parent_names, u8 num_parents); |
172 | |
173 | struct clk_hw * __init |
174 | at91_clk_register_system(struct regmap *regmap, const char *name, |
175 | const char *parent_name, u8 id); |
176 | |
177 | struct clk_hw * __init |
178 | at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, |
179 | const char **parent_names, u8 num_parents); |
180 | struct clk_hw * __init |
181 | at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name, |
182 | const char *parent_name); |
183 | struct clk_hw * __init |
184 | at91rm9200_clk_register_usb(struct regmap *regmap, const char *name, |
185 | const char *parent_name, const u32 *divisors); |
186 | |
187 | struct clk_hw * __init |
188 | at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr, |
189 | const char *name, const char *parent_name); |
190 | |
191 | #ifdef CONFIG_PM |
192 | void pmc_register_id(u8 id); |
193 | void pmc_register_pck(u8 pck); |
194 | #else |
195 | static inline void pmc_register_id(u8 id) {} |
196 | static inline void pmc_register_pck(u8 pck) {} |
197 | #endif |
198 | |
199 | #endif /* __PMC_H_ */ |
200 |
Warning: That file was not part of the compilation database. It may have many parsing errors.