1/*
2 * System Control and Power Interface (SCPI) Protocol based clock driver
3 *
4 * Copyright (C) 2015 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/clk-provider.h>
20#include <linux/device.h>
21#include <linux/err.h>
22#include <linux/of.h>
23#include <linux/module.h>
24#include <linux/of_platform.h>
25#include <linux/platform_device.h>
26#include <linux/scpi_protocol.h>
27
28struct scpi_clk {
29 u32 id;
30 struct clk_hw hw;
31 struct scpi_dvfs_info *info;
32 struct scpi_ops *scpi_ops;
33};
34
35#define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)
36
37static struct platform_device *cpufreq_dev;
38
39static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw,
40 unsigned long parent_rate)
41{
42 struct scpi_clk *clk = to_scpi_clk(hw);
43
44 return clk->scpi_ops->clk_get_val(clk->id);
45}
46
47static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
48 unsigned long *parent_rate)
49{
50 /*
51 * We can't figure out what rate it will be, so just return the
52 * rate back to the caller. scpi_clk_recalc_rate() will be called
53 * after the rate is set and we'll know what rate the clock is
54 * running at then.
55 */
56 return rate;
57}
58
59static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
60 unsigned long parent_rate)
61{
62 struct scpi_clk *clk = to_scpi_clk(hw);
63
64 return clk->scpi_ops->clk_set_val(clk->id, rate);
65}
66
67static const struct clk_ops scpi_clk_ops = {
68 .recalc_rate = scpi_clk_recalc_rate,
69 .round_rate = scpi_clk_round_rate,
70 .set_rate = scpi_clk_set_rate,
71};
72
73/* find closest match to given frequency in OPP table */
74static long __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate)
75{
76 int idx;
77 unsigned long fmin = 0, fmax = ~0, ftmp;
78 const struct scpi_opp *opp = clk->info->opps;
79
80 for (idx = 0; idx < clk->info->count; idx++, opp++) {
81 ftmp = opp->freq;
82 if (ftmp >= rate) {
83 if (ftmp <= fmax)
84 fmax = ftmp;
85 break;
86 } else if (ftmp >= fmin) {
87 fmin = ftmp;
88 }
89 }
90 return fmax != ~0 ? fmax : fmin;
91}
92
93static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw,
94 unsigned long parent_rate)
95{
96 struct scpi_clk *clk = to_scpi_clk(hw);
97 int idx = clk->scpi_ops->dvfs_get_idx(clk->id);
98 const struct scpi_opp *opp;
99
100 if (idx < 0)
101 return 0;
102
103 opp = clk->info->opps + idx;
104 return opp->freq;
105}
106
107static long scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate,
108 unsigned long *parent_rate)
109{
110 struct scpi_clk *clk = to_scpi_clk(hw);
111
112 return __scpi_dvfs_round_rate(clk, rate);
113}
114
115static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate)
116{
117 int idx, max_opp = clk->info->count;
118 const struct scpi_opp *opp = clk->info->opps;
119
120 for (idx = 0; idx < max_opp; idx++, opp++)
121 if (opp->freq == rate)
122 return idx;
123 return -EINVAL;
124}
125
126static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate,
127 unsigned long parent_rate)
128{
129 struct scpi_clk *clk = to_scpi_clk(hw);
130 int ret = __scpi_find_dvfs_index(clk, rate);
131
132 if (ret < 0)
133 return ret;
134 return clk->scpi_ops->dvfs_set_idx(clk->id, (u8)ret);
135}
136
137static const struct clk_ops scpi_dvfs_ops = {
138 .recalc_rate = scpi_dvfs_recalc_rate,
139 .round_rate = scpi_dvfs_round_rate,
140 .set_rate = scpi_dvfs_set_rate,
141};
142
143static const struct of_device_id scpi_clk_match[] = {
144 { .compatible = "arm,scpi-dvfs-clocks", .data = &scpi_dvfs_ops, },
145 { .compatible = "arm,scpi-variable-clocks", .data = &scpi_clk_ops, },
146 {}
147};
148
149static int
150scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
151 struct scpi_clk *sclk, const char *name)
152{
153 struct clk_init_data init;
154 unsigned long min = 0, max = 0;
155 int ret;
156
157 init.name = name;
158 init.flags = 0;
159 init.num_parents = 0;
160 init.ops = match->data;
161 sclk->hw.init = &init;
162 sclk->scpi_ops = get_scpi_ops();
163
164 if (init.ops == &scpi_dvfs_ops) {
165 sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id);
166 if (IS_ERR(sclk->info))
167 return PTR_ERR(sclk->info);
168 } else if (init.ops == &scpi_clk_ops) {
169 if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max)
170 return -EINVAL;
171 } else {
172 return -EINVAL;
173 }
174
175 ret = devm_clk_hw_register(dev, &sclk->hw);
176 if (!ret && max)
177 clk_hw_set_rate_range(&sclk->hw, min, max);
178 return ret;
179}
180
181struct scpi_clk_data {
182 struct scpi_clk **clk;
183 unsigned int clk_num;
184};
185
186static struct clk_hw *
187scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
188{
189 struct scpi_clk *sclk;
190 struct scpi_clk_data *clk_data = data;
191 unsigned int idx = clkspec->args[0], count;
192
193 for (count = 0; count < clk_data->clk_num; count++) {
194 sclk = clk_data->clk[count];
195 if (idx == sclk->id)
196 return &sclk->hw;
197 }
198
199 return ERR_PTR(-EINVAL);
200}
201
202static int scpi_clk_add(struct device *dev, struct device_node *np,
203 const struct of_device_id *match)
204{
205 int idx, count, err;
206 struct scpi_clk_data *clk_data;
207
208 count = of_property_count_strings(np, "clock-output-names");
209 if (count < 0) {
210 dev_err(dev, "%pOFn: invalid clock output count\n", np);
211 return -EINVAL;
212 }
213
214 clk_data = devm_kmalloc(dev, sizeof(*clk_data), GFP_KERNEL);
215 if (!clk_data)
216 return -ENOMEM;
217
218 clk_data->clk_num = count;
219 clk_data->clk = devm_kcalloc(dev, count, sizeof(*clk_data->clk),
220 GFP_KERNEL);
221 if (!clk_data->clk)
222 return -ENOMEM;
223
224 for (idx = 0; idx < count; idx++) {
225 struct scpi_clk *sclk;
226 const char *name;
227 u32 val;
228
229 sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
230 if (!sclk)
231 return -ENOMEM;
232
233 if (of_property_read_string_index(np, "clock-output-names",
234 idx, &name)) {
235 dev_err(dev, "invalid clock name @ %pOFn\n", np);
236 return -EINVAL;
237 }
238
239 if (of_property_read_u32_index(np, "clock-indices",
240 idx, &val)) {
241 dev_err(dev, "invalid clock index @ %pOFn\n", np);
242 return -EINVAL;
243 }
244
245 sclk->id = val;
246
247 err = scpi_clk_ops_init(dev, match, sclk, name);
248 if (err) {
249 dev_err(dev, "failed to register clock '%s'\n", name);
250 return err;
251 }
252
253 dev_dbg(dev, "Registered clock '%s'\n", name);
254 clk_data->clk[idx] = sclk;
255 }
256
257 return of_clk_add_hw_provider(np, scpi_of_clk_src_get, clk_data);
258}
259
260static int scpi_clocks_remove(struct platform_device *pdev)
261{
262 struct device *dev = &pdev->dev;
263 struct device_node *child, *np = dev->of_node;
264
265 if (cpufreq_dev) {
266 platform_device_unregister(cpufreq_dev);
267 cpufreq_dev = NULL;
268 }
269
270 for_each_available_child_of_node(np, child)
271 of_clk_del_provider(np);
272 return 0;
273}
274
275static int scpi_clocks_probe(struct platform_device *pdev)
276{
277 int ret;
278 struct device *dev = &pdev->dev;
279 struct device_node *child, *np = dev->of_node;
280 const struct of_device_id *match;
281
282 if (!get_scpi_ops())
283 return -ENXIO;
284
285 for_each_available_child_of_node(np, child) {
286 match = of_match_node(scpi_clk_match, child);
287 if (!match)
288 continue;
289 ret = scpi_clk_add(dev, child, match);
290 if (ret) {
291 scpi_clocks_remove(pdev);
292 of_node_put(child);
293 return ret;
294 }
295
296 if (match->data != &scpi_dvfs_ops)
297 continue;
298 /* Add the virtual cpufreq device if it's DVFS clock provider */
299 cpufreq_dev = platform_device_register_simple("scpi-cpufreq",
300 -1, NULL, 0);
301 if (IS_ERR(cpufreq_dev))
302 pr_warn("unable to register cpufreq device");
303 }
304 return 0;
305}
306
307static const struct of_device_id scpi_clocks_ids[] = {
308 { .compatible = "arm,scpi-clocks", },
309 {}
310};
311MODULE_DEVICE_TABLE(of, scpi_clocks_ids);
312
313static struct platform_driver scpi_clocks_driver = {
314 .driver = {
315 .name = "scpi_clocks",
316 .of_match_table = scpi_clocks_ids,
317 },
318 .probe = scpi_clocks_probe,
319 .remove = scpi_clocks_remove,
320};
321module_platform_driver(scpi_clocks_driver);
322
323MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
324MODULE_DESCRIPTION("ARM SCPI clock driver");
325MODULE_LICENSE("GPL v2");
326