1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * PSC clock descriptions for TI DA830/OMAP-L137/AM17XX |
4 | * |
5 | * Copyright (C) 2018 David Lechner <david@lechnology.com> |
6 | */ |
7 | |
8 | #include <linux/clk-provider.h> |
9 | #include <linux/clk.h> |
10 | #include <linux/clkdev.h> |
11 | #include <linux/init.h> |
12 | #include <linux/kernel.h> |
13 | #include <linux/types.h> |
14 | |
15 | #include "psc.h" |
16 | |
17 | LPSC_CLKDEV1(aemif_clkdev, NULL, "ti-aemif" ); |
18 | LPSC_CLKDEV1(spi0_clkdev, NULL, "spi_davinci.0" ); |
19 | LPSC_CLKDEV1(mmcsd_clkdev, NULL, "da830-mmc.0" ); |
20 | LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0" ); |
21 | |
22 | static const struct davinci_lpsc_clk_info da830_psc0_info[] = { |
23 | LPSC(0, 0, tpcc, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
24 | LPSC(1, 0, tptc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
25 | LPSC(2, 0, tptc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
26 | LPSC(3, 0, aemif, pll0_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED), |
27 | LPSC(4, 0, spi0, pll0_sysclk2, spi0_clkdev, 0), |
28 | LPSC(5, 0, mmcsd, pll0_sysclk2, mmcsd_clkdev, 0), |
29 | LPSC(6, 0, aintc, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED), |
30 | LPSC(7, 0, arm_rom, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
31 | LPSC(8, 0, secu_mgr, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED), |
32 | LPSC(9, 0, uart0, pll0_sysclk2, uart0_clkdev, 0), |
33 | LPSC(10, 0, scr0_ss, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
34 | LPSC(11, 0, scr1_ss, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
35 | LPSC(12, 0, scr2_ss, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
36 | LPSC(13, 0, pruss, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED), |
37 | LPSC(14, 0, arm, pll0_sysclk6, NULL, LPSC_ALWAYS_ENABLED), |
38 | { } |
39 | }; |
40 | |
41 | static int da830_psc0_init(struct device *dev, void __iomem *base) |
42 | { |
43 | return davinci_psc_register_clocks(dev, info: da830_psc0_info, num_clks: 16, base); |
44 | } |
45 | |
46 | static struct clk_bulk_data da830_psc0_parent_clks[] = { |
47 | { .id = "pll0_sysclk2" }, |
48 | { .id = "pll0_sysclk3" }, |
49 | { .id = "pll0_sysclk4" }, |
50 | { .id = "pll0_sysclk6" }, |
51 | }; |
52 | |
53 | const struct davinci_psc_init_data da830_psc0_init_data = { |
54 | .parent_clks = da830_psc0_parent_clks, |
55 | .num_parent_clks = ARRAY_SIZE(da830_psc0_parent_clks), |
56 | .psc_init = &da830_psc0_init, |
57 | }; |
58 | |
59 | LPSC_CLKDEV3(usb0_clkdev, "fck" , "da830-usb-phy-clks" , |
60 | NULL, "musb-da8xx" , |
61 | NULL, "cppi41-dmaengine" ); |
62 | LPSC_CLKDEV1(usb1_clkdev, NULL, "ohci-da8xx" ); |
63 | /* REVISIT: gpio-davinci.c should be modified to drop con_id */ |
64 | LPSC_CLKDEV1(gpio_clkdev, "gpio" , NULL); |
65 | LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1" , |
66 | "fck" , "davinci_mdio.0" ); |
67 | LPSC_CLKDEV1(mcasp0_clkdev, NULL, "davinci-mcasp.0" ); |
68 | LPSC_CLKDEV1(mcasp1_clkdev, NULL, "davinci-mcasp.1" ); |
69 | LPSC_CLKDEV1(mcasp2_clkdev, NULL, "davinci-mcasp.2" ); |
70 | LPSC_CLKDEV1(spi1_clkdev, NULL, "spi_davinci.1" ); |
71 | LPSC_CLKDEV1(i2c1_clkdev, NULL, "i2c_davinci.2" ); |
72 | LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1" ); |
73 | LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2" ); |
74 | LPSC_CLKDEV1(lcdc_clkdev, "fck" , "da8xx_lcdc.0" ); |
75 | LPSC_CLKDEV2(pwm_clkdev, "fck" , "ehrpwm.0" , |
76 | "fck" , "ehrpwm.1" ); |
77 | LPSC_CLKDEV3(ecap_clkdev, "fck" , "ecap.0" , |
78 | "fck" , "ecap.1" , |
79 | "fck" , "ecap.2" ); |
80 | LPSC_CLKDEV2(eqep_clkdev, NULL, "eqep.0" , |
81 | NULL, "eqep.1" ); |
82 | |
83 | static const struct davinci_lpsc_clk_info da830_psc1_info[] = { |
84 | LPSC(1, 0, usb0, pll0_sysclk2, usb0_clkdev, 0), |
85 | LPSC(2, 0, usb1, pll0_sysclk4, usb1_clkdev, 0), |
86 | LPSC(3, 0, gpio, pll0_sysclk4, gpio_clkdev, 0), |
87 | LPSC(5, 0, emac, pll0_sysclk4, emac_clkdev, 0), |
88 | LPSC(6, 0, emif3, pll0_sysclk5, NULL, LPSC_ALWAYS_ENABLED), |
89 | LPSC(7, 0, mcasp0, pll0_sysclk2, mcasp0_clkdev, 0), |
90 | LPSC(8, 0, mcasp1, pll0_sysclk2, mcasp1_clkdev, 0), |
91 | LPSC(9, 0, mcasp2, pll0_sysclk2, mcasp2_clkdev, 0), |
92 | LPSC(10, 0, spi1, pll0_sysclk2, spi1_clkdev, 0), |
93 | LPSC(11, 0, i2c1, pll0_sysclk4, i2c1_clkdev, 0), |
94 | LPSC(12, 0, uart1, pll0_sysclk2, uart1_clkdev, 0), |
95 | LPSC(13, 0, uart2, pll0_sysclk2, uart2_clkdev, 0), |
96 | LPSC(16, 0, lcdc, pll0_sysclk2, lcdc_clkdev, 0), |
97 | LPSC(17, 0, pwm, pll0_sysclk2, pwm_clkdev, 0), |
98 | LPSC(20, 0, ecap, pll0_sysclk2, ecap_clkdev, 0), |
99 | LPSC(21, 0, eqep, pll0_sysclk2, eqep_clkdev, 0), |
100 | { } |
101 | }; |
102 | |
103 | static int da830_psc1_init(struct device *dev, void __iomem *base) |
104 | { |
105 | return davinci_psc_register_clocks(dev, info: da830_psc1_info, num_clks: 32, base); |
106 | } |
107 | |
108 | static struct clk_bulk_data da830_psc1_parent_clks[] = { |
109 | { .id = "pll0_sysclk2" }, |
110 | { .id = "pll0_sysclk4" }, |
111 | { .id = "pll0_sysclk5" }, |
112 | }; |
113 | |
114 | const struct davinci_psc_init_data da830_psc1_init_data = { |
115 | .parent_clks = da830_psc1_parent_clks, |
116 | .num_parent_clks = ARRAY_SIZE(da830_psc1_parent_clks), |
117 | .psc_init = &da830_psc1_init, |
118 | }; |
119 | |