1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Hisilicon HiP04 clock driver |
4 | * |
5 | * Copyright (c) 2013-2014 Hisilicon Limited. |
6 | * Copyright (c) 2013-2014 Linaro Limited. |
7 | * |
8 | * Author: Haojian Zhuang <haojian.zhuang@linaro.org> |
9 | */ |
10 | |
11 | #include <linux/kernel.h> |
12 | #include <linux/clk-provider.h> |
13 | #include <linux/io.h> |
14 | #include <linux/slab.h> |
15 | |
16 | #include <dt-bindings/clock/hip04-clock.h> |
17 | |
18 | #include "clk.h" |
19 | |
20 | /* fixed rate clocks */ |
21 | static struct hisi_fixed_rate_clock hip04_fixed_rate_clks[] __initdata = { |
22 | { HIP04_OSC50M, "osc50m" , NULL, 0, 50000000, }, |
23 | { HIP04_CLK_50M, "clk50m" , NULL, 0, 50000000, }, |
24 | { HIP04_CLK_168M, "clk168m" , NULL, 0, 168750000, }, |
25 | }; |
26 | |
27 | static void __init hip04_clk_init(struct device_node *np) |
28 | { |
29 | struct hisi_clock_data *clk_data; |
30 | |
31 | clk_data = hisi_clk_init(np, HIP04_NR_CLKS); |
32 | if (!clk_data) |
33 | return; |
34 | |
35 | hisi_clk_register_fixed_rate(hip04_fixed_rate_clks, |
36 | ARRAY_SIZE(hip04_fixed_rate_clks), |
37 | clk_data); |
38 | } |
39 | CLK_OF_DECLARE(hip04_clk, "hisilicon,hip04-clock" , hip04_clk_init); |
40 | |