| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|---|
| 2 | |
| 3 | #ifndef __CLK_EXYNOS5_SUBCMU_H |
| 4 | #define __CLK_EXYNOS5_SUBCMU_H |
| 5 | |
| 6 | struct exynos5_subcmu_reg_dump { |
| 7 | u32 offset; |
| 8 | u32 value; |
| 9 | u32 mask; |
| 10 | u32 save; |
| 11 | }; |
| 12 | |
| 13 | struct exynos5_subcmu_info { |
| 14 | const struct samsung_div_clock *div_clks; |
| 15 | unsigned int nr_div_clks; |
| 16 | const struct samsung_gate_clock *gate_clks; |
| 17 | unsigned int nr_gate_clks; |
| 18 | struct exynos5_subcmu_reg_dump *suspend_regs; |
| 19 | unsigned int nr_suspend_regs; |
| 20 | const char *pd_name; |
| 21 | }; |
| 22 | |
| 23 | void exynos5_subcmus_init(struct samsung_clk_provider *ctx, int nr_cmus, |
| 24 | const struct exynos5_subcmu_info **cmu); |
| 25 | |
| 26 | #endif |
| 27 |