1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // |
3 | // Spreadtrum composite clock driver |
4 | // |
5 | // Copyright (C) 2017 Spreadtrum, Inc. |
6 | // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com> |
7 | |
8 | #include <linux/clk-provider.h> |
9 | |
10 | #include "composite.h" |
11 | |
12 | static int sprd_comp_determine_rate(struct clk_hw *hw, |
13 | struct clk_rate_request *req) |
14 | { |
15 | struct sprd_comp *cc = hw_to_sprd_comp(hw); |
16 | |
17 | return divider_determine_rate(hw, req, NULL, width: cc->div.width, flags: 0); |
18 | } |
19 | |
20 | static unsigned long sprd_comp_recalc_rate(struct clk_hw *hw, |
21 | unsigned long parent_rate) |
22 | { |
23 | struct sprd_comp *cc = hw_to_sprd_comp(hw); |
24 | |
25 | return sprd_div_helper_recalc_rate(common: &cc->common, div: &cc->div, parent_rate); |
26 | } |
27 | |
28 | static int sprd_comp_set_rate(struct clk_hw *hw, unsigned long rate, |
29 | unsigned long parent_rate) |
30 | { |
31 | struct sprd_comp *cc = hw_to_sprd_comp(hw); |
32 | |
33 | return sprd_div_helper_set_rate(common: &cc->common, div: &cc->div, |
34 | rate, parent_rate); |
35 | } |
36 | |
37 | static u8 sprd_comp_get_parent(struct clk_hw *hw) |
38 | { |
39 | struct sprd_comp *cc = hw_to_sprd_comp(hw); |
40 | |
41 | return sprd_mux_helper_get_parent(common: &cc->common, mux: &cc->mux); |
42 | } |
43 | |
44 | static int sprd_comp_set_parent(struct clk_hw *hw, u8 index) |
45 | { |
46 | struct sprd_comp *cc = hw_to_sprd_comp(hw); |
47 | |
48 | return sprd_mux_helper_set_parent(common: &cc->common, mux: &cc->mux, index); |
49 | } |
50 | |
51 | const struct clk_ops sprd_comp_ops = { |
52 | .get_parent = sprd_comp_get_parent, |
53 | .set_parent = sprd_comp_set_parent, |
54 | |
55 | .determine_rate = sprd_comp_determine_rate, |
56 | .recalc_rate = sprd_comp_recalc_rate, |
57 | .set_rate = sprd_comp_set_rate, |
58 | }; |
59 | EXPORT_SYMBOL_GPL(sprd_comp_ops); |
60 | |