1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2016 Maxime Ripard. All rights reserved.
4 */
5
6#ifndef _COMMON_H_
7#define _COMMON_H_
8
9#include <linux/compiler.h>
10#include <linux/clk-provider.h>
11
12#define CCU_FEATURE_FRACTIONAL BIT(0)
13#define CCU_FEATURE_VARIABLE_PREDIV BIT(1)
14#define CCU_FEATURE_FIXED_PREDIV BIT(2)
15#define CCU_FEATURE_FIXED_POSTDIV BIT(3)
16#define CCU_FEATURE_ALL_PREDIV BIT(4)
17#define CCU_FEATURE_LOCK_REG BIT(5)
18#define CCU_FEATURE_MMC_TIMING_SWITCH BIT(6)
19#define CCU_FEATURE_SIGMA_DELTA_MOD BIT(7)
20#define CCU_FEATURE_KEY_FIELD BIT(8)
21#define CCU_FEATURE_CLOSEST_RATE BIT(9)
22
23/* MMC timing mode switch bit */
24#define CCU_MMC_NEW_TIMING_MODE BIT(30)
25
26struct device_node;
27
28struct ccu_common {
29 void __iomem *base;
30 u16 reg;
31 u16 lock_reg;
32 u32 prediv;
33
34 unsigned long features;
35 spinlock_t *lock;
36 struct clk_hw hw;
37};
38
39static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw)
40{
41 return container_of(hw, struct ccu_common, hw);
42}
43
44struct sunxi_ccu_desc {
45 struct ccu_common **ccu_clks;
46 unsigned long num_ccu_clks;
47
48 struct clk_hw_onecell_data *hw_clks;
49
50 struct ccu_reset_map *resets;
51 unsigned long num_resets;
52};
53
54void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock);
55
56bool ccu_is_better_rate(struct ccu_common *common,
57 unsigned long target_rate,
58 unsigned long current_rate,
59 unsigned long best_rate);
60
61struct ccu_pll_nb {
62 struct notifier_block clk_nb;
63 struct ccu_common *common;
64
65 u32 enable;
66 u32 lock;
67};
68
69#define to_ccu_pll_nb(_nb) container_of(_nb, struct ccu_pll_nb, clk_nb)
70
71int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb);
72
73int devm_sunxi_ccu_probe(struct device *dev, void __iomem *reg,
74 const struct sunxi_ccu_desc *desc);
75void of_sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
76 const struct sunxi_ccu_desc *desc);
77
78#endif /* _COMMON_H_ */
79

source code of linux/drivers/clk/sunxi-ng/ccu_common.h