1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2013 Emilio López
4 *
5 * Emilio López <emilio@elopez.com.ar>
6 */
7
8#include <linux/clk-provider.h>
9#include <linux/of.h>
10#include <linux/of_address.h>
11#include <linux/slab.h>
12
13#define SUNXI_OSC24M_GATE 0
14
15static DEFINE_SPINLOCK(hosc_lock);
16
17static void __init sun4i_osc_clk_setup(struct device_node *node)
18{
19 struct clk *clk;
20 struct clk_fixed_rate *fixed;
21 struct clk_gate *gate;
22 const char *clk_name = node->name;
23 u32 rate;
24
25 if (of_property_read_u32(np: node, propname: "clock-frequency", out_value: &rate))
26 return;
27
28 /* allocate fixed-rate and gate clock structs */
29 fixed = kzalloc(size: sizeof(struct clk_fixed_rate), GFP_KERNEL);
30 if (!fixed)
31 return;
32 gate = kzalloc(size: sizeof(struct clk_gate), GFP_KERNEL);
33 if (!gate)
34 goto err_free_fixed;
35
36 of_property_read_string(np: node, propname: "clock-output-names", out_string: &clk_name);
37
38 /* set up gate and fixed rate properties */
39 gate->reg = of_iomap(node, index: 0);
40 gate->bit_idx = SUNXI_OSC24M_GATE;
41 gate->lock = &hosc_lock;
42 fixed->fixed_rate = rate;
43
44 clk = clk_register_composite(NULL, name: clk_name,
45 NULL, num_parents: 0,
46 NULL, NULL,
47 rate_hw: &fixed->hw, rate_ops: &clk_fixed_rate_ops,
48 gate_hw: &gate->hw, gate_ops: &clk_gate_ops, flags: 0);
49
50 if (IS_ERR(ptr: clk))
51 goto err_free_gate;
52
53 of_clk_add_provider(np: node, clk_src_get: of_clk_src_simple_get, data: clk);
54
55 return;
56
57err_free_gate:
58 kfree(objp: gate);
59err_free_fixed:
60 kfree(objp: fixed);
61}
62CLK_OF_DECLARE(sun4i_osc, "allwinner,sun4i-a10-osc-clk", sun4i_osc_clk_setup);
63

source code of linux/drivers/clk/sunxi/clk-a10-hosc.c