1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * (c) 2003-2012 Advanced Micro Devices, Inc. |
4 | * |
5 | * Maintainer: |
6 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
7 | * |
8 | * Based on the powernow-k7.c module written by Dave Jones. |
9 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
10 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
11 | * (C) 2004 Pavel Machek <pavel@ucw.cz> |
12 | * Based upon datasheets & sample CPUs kindly provided by AMD. |
13 | * |
14 | * Valuable input gratefully received from Dave Jones, Pavel Machek, |
15 | * Dominik Brodowski, Jacob Shin, and others. |
16 | * Originally developed by Paul Devriendt. |
17 | * |
18 | * Processor information obtained from Chapter 9 (Power and Thermal |
19 | * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for |
20 | * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x |
21 | * Power Management" in BKDGs for newer AMD CPU families. |
22 | * |
23 | * Tables for specific CPUs can be inferred from AMD's processor |
24 | * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf) |
25 | */ |
26 | |
27 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
28 | |
29 | #include <linux/kernel.h> |
30 | #include <linux/smp.h> |
31 | #include <linux/module.h> |
32 | #include <linux/init.h> |
33 | #include <linux/cpufreq.h> |
34 | #include <linux/slab.h> |
35 | #include <linux/string.h> |
36 | #include <linux/cpumask.h> |
37 | #include <linux/io.h> |
38 | #include <linux/delay.h> |
39 | |
40 | #include <asm/msr.h> |
41 | #include <asm/cpu_device_id.h> |
42 | |
43 | #include <linux/acpi.h> |
44 | #include <linux/mutex.h> |
45 | #include <acpi/processor.h> |
46 | |
47 | #define VERSION "version 2.20.00" |
48 | #include "powernow-k8.h" |
49 | |
50 | /* serialize freq changes */ |
51 | static DEFINE_MUTEX(fidvid_mutex); |
52 | |
53 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
54 | |
55 | static struct cpufreq_driver cpufreq_amd64_driver; |
56 | |
57 | /* Return a frequency in MHz, given an input fid */ |
58 | static u32 find_freq_from_fid(u32 fid) |
59 | { |
60 | return 800 + (fid * 100); |
61 | } |
62 | |
63 | /* Return a frequency in KHz, given an input fid */ |
64 | static u32 find_khz_freq_from_fid(u32 fid) |
65 | { |
66 | return 1000 * find_freq_from_fid(fid); |
67 | } |
68 | |
69 | /* Return the vco fid for an input fid |
70 | * |
71 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids |
72 | * only from corresponding high fids. This returns "high" fid corresponding to |
73 | * "low" one. |
74 | */ |
75 | static u32 convert_fid_to_vco_fid(u32 fid) |
76 | { |
77 | if (fid < HI_FID_TABLE_BOTTOM) |
78 | return 8 + (2 * fid); |
79 | else |
80 | return fid; |
81 | } |
82 | |
83 | /* |
84 | * Return 1 if the pending bit is set. Unless we just instructed the processor |
85 | * to transition to a new state, seeing this bit set is really bad news. |
86 | */ |
87 | static int pending_bit_stuck(void) |
88 | { |
89 | u32 lo, hi __always_unused; |
90 | |
91 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
92 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; |
93 | } |
94 | |
95 | /* |
96 | * Update the global current fid / vid values from the status msr. |
97 | * Returns 1 on error. |
98 | */ |
99 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) |
100 | { |
101 | u32 lo, hi; |
102 | u32 i = 0; |
103 | |
104 | do { |
105 | if (i++ > 10000) { |
106 | pr_debug("detected change pending stuck\n" ); |
107 | return 1; |
108 | } |
109 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
110 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
111 | |
112 | data->currvid = hi & MSR_S_HI_CURRENT_VID; |
113 | data->currfid = lo & MSR_S_LO_CURRENT_FID; |
114 | |
115 | return 0; |
116 | } |
117 | |
118 | /* the isochronous relief time */ |
119 | static void count_off_irt(struct powernow_k8_data *data) |
120 | { |
121 | udelay((1 << data->irt) * 10); |
122 | } |
123 | |
124 | /* the voltage stabilization time */ |
125 | static void count_off_vst(struct powernow_k8_data *data) |
126 | { |
127 | udelay(data->vstable * VST_UNITS_20US); |
128 | } |
129 | |
130 | /* need to init the control msr to a safe value (for each cpu) */ |
131 | static void fidvid_msr_init(void) |
132 | { |
133 | u32 lo, hi; |
134 | u8 fid, vid; |
135 | |
136 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
137 | vid = hi & MSR_S_HI_CURRENT_VID; |
138 | fid = lo & MSR_S_LO_CURRENT_FID; |
139 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); |
140 | hi = MSR_C_HI_STP_GNT_BENIGN; |
141 | pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n" , smp_processor_id(), lo, hi); |
142 | wrmsr(MSR_FIDVID_CTL, lo, hi); |
143 | } |
144 | |
145 | /* write the new fid value along with the other control fields to the msr */ |
146 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) |
147 | { |
148 | u32 lo; |
149 | u32 savevid = data->currvid; |
150 | u32 i = 0; |
151 | |
152 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { |
153 | pr_err("internal error - overflow on fid write\n" ); |
154 | return 1; |
155 | } |
156 | |
157 | lo = fid; |
158 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); |
159 | lo |= MSR_C_LO_INIT_FID_VID; |
160 | |
161 | pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n" , |
162 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); |
163 | |
164 | do { |
165 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); |
166 | if (i++ > 100) { |
167 | pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n" ); |
168 | return 1; |
169 | } |
170 | } while (query_current_values_with_pending_wait(data)); |
171 | |
172 | count_off_irt(data); |
173 | |
174 | if (savevid != data->currvid) { |
175 | pr_err("vid change on fid trans, old 0x%x, new 0x%x\n" , |
176 | savevid, data->currvid); |
177 | return 1; |
178 | } |
179 | |
180 | if (fid != data->currfid) { |
181 | pr_err("fid trans failed, fid 0x%x, curr 0x%x\n" , fid, |
182 | data->currfid); |
183 | return 1; |
184 | } |
185 | |
186 | return 0; |
187 | } |
188 | |
189 | /* Write a new vid to the hardware */ |
190 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) |
191 | { |
192 | u32 lo; |
193 | u32 savefid = data->currfid; |
194 | int i = 0; |
195 | |
196 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { |
197 | pr_err("internal error - overflow on vid write\n" ); |
198 | return 1; |
199 | } |
200 | |
201 | lo = data->currfid; |
202 | lo |= (vid << MSR_C_LO_VID_SHIFT); |
203 | lo |= MSR_C_LO_INIT_FID_VID; |
204 | |
205 | pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n" , |
206 | vid, lo, STOP_GRANT_5NS); |
207 | |
208 | do { |
209 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); |
210 | if (i++ > 100) { |
211 | pr_err("internal error - pending bit very stuck - no further pstate changes possible\n" ); |
212 | return 1; |
213 | } |
214 | } while (query_current_values_with_pending_wait(data)); |
215 | |
216 | if (savefid != data->currfid) { |
217 | pr_err("fid changed on vid trans, old 0x%x new 0x%x\n" , |
218 | savefid, data->currfid); |
219 | return 1; |
220 | } |
221 | |
222 | if (vid != data->currvid) { |
223 | pr_err("vid trans failed, vid 0x%x, curr 0x%x\n" , |
224 | vid, data->currvid); |
225 | return 1; |
226 | } |
227 | |
228 | return 0; |
229 | } |
230 | |
231 | /* |
232 | * Reduce the vid by the max of step or reqvid. |
233 | * Decreasing vid codes represent increasing voltages: |
234 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
235 | */ |
236 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
237 | u32 reqvid, u32 step) |
238 | { |
239 | if ((data->currvid - reqvid) > step) |
240 | reqvid = data->currvid - step; |
241 | |
242 | if (write_new_vid(data, vid: reqvid)) |
243 | return 1; |
244 | |
245 | count_off_vst(data); |
246 | |
247 | return 0; |
248 | } |
249 | |
250 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ |
251 | static int transition_fid_vid(struct powernow_k8_data *data, |
252 | u32 reqfid, u32 reqvid) |
253 | { |
254 | if (core_voltage_pre_transition(data, reqvid, regfid: reqfid)) |
255 | return 1; |
256 | |
257 | if (core_frequency_transition(data, reqfid)) |
258 | return 1; |
259 | |
260 | if (core_voltage_post_transition(data, reqvid)) |
261 | return 1; |
262 | |
263 | if (query_current_values_with_pending_wait(data)) |
264 | return 1; |
265 | |
266 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { |
267 | pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n" , |
268 | smp_processor_id(), |
269 | reqfid, reqvid, data->currfid, data->currvid); |
270 | return 1; |
271 | } |
272 | |
273 | pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n" , |
274 | smp_processor_id(), data->currfid, data->currvid); |
275 | |
276 | return 0; |
277 | } |
278 | |
279 | /* Phase 1 - core voltage transition ... setup voltage */ |
280 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
281 | u32 reqvid, u32 reqfid) |
282 | { |
283 | u32 rvosteps = data->rvo; |
284 | u32 savefid = data->currfid; |
285 | u32 maxvid, lo __always_unused, rvomult = 1; |
286 | |
287 | pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n" , |
288 | smp_processor_id(), |
289 | data->currfid, data->currvid, reqvid, data->rvo); |
290 | |
291 | if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP)) |
292 | rvomult = 2; |
293 | rvosteps *= rvomult; |
294 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
295 | maxvid = 0x1f & (maxvid >> 16); |
296 | pr_debug("ph1 maxvid=0x%x\n" , maxvid); |
297 | if (reqvid < maxvid) /* lower numbers are higher voltages */ |
298 | reqvid = maxvid; |
299 | |
300 | while (data->currvid > reqvid) { |
301 | pr_debug("ph1: curr 0x%x, req vid 0x%x\n" , |
302 | data->currvid, reqvid); |
303 | if (decrease_vid_code_by_step(data, reqvid, step: data->vidmvs)) |
304 | return 1; |
305 | } |
306 | |
307 | while ((rvosteps > 0) && |
308 | ((rvomult * data->rvo + data->currvid) > reqvid)) { |
309 | if (data->currvid == maxvid) { |
310 | rvosteps = 0; |
311 | } else { |
312 | pr_debug("ph1: changing vid for rvo, req 0x%x\n" , |
313 | data->currvid - 1); |
314 | if (decrease_vid_code_by_step(data, reqvid: data->currvid-1, step: 1)) |
315 | return 1; |
316 | rvosteps--; |
317 | } |
318 | } |
319 | |
320 | if (query_current_values_with_pending_wait(data)) |
321 | return 1; |
322 | |
323 | if (savefid != data->currfid) { |
324 | pr_err("ph1 err, currfid changed 0x%x\n" , data->currfid); |
325 | return 1; |
326 | } |
327 | |
328 | pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n" , |
329 | data->currfid, data->currvid); |
330 | |
331 | return 0; |
332 | } |
333 | |
334 | /* Phase 2 - core frequency transition */ |
335 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) |
336 | { |
337 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
338 | u32 fid_interval, savevid = data->currvid; |
339 | |
340 | if (data->currfid == reqfid) { |
341 | pr_err("ph2 null fid transition 0x%x\n" , data->currfid); |
342 | return 0; |
343 | } |
344 | |
345 | pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n" , |
346 | smp_processor_id(), |
347 | data->currfid, data->currvid, reqfid); |
348 | |
349 | vcoreqfid = convert_fid_to_vco_fid(fid: reqfid); |
350 | vcocurrfid = convert_fid_to_vco_fid(fid: data->currfid); |
351 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid |
352 | : vcoreqfid - vcocurrfid; |
353 | |
354 | if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP)) |
355 | vcofiddiff = 0; |
356 | |
357 | while (vcofiddiff > 2) { |
358 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
359 | |
360 | if (reqfid > data->currfid) { |
361 | if (data->currfid > LO_FID_TABLE_TOP) { |
362 | if (write_new_fid(data, |
363 | fid: data->currfid + fid_interval)) |
364 | return 1; |
365 | } else { |
366 | if (write_new_fid |
367 | (data, |
368 | fid: 2 + convert_fid_to_vco_fid(fid: data->currfid))) |
369 | return 1; |
370 | } |
371 | } else { |
372 | if (write_new_fid(data, fid: data->currfid - fid_interval)) |
373 | return 1; |
374 | } |
375 | |
376 | vcocurrfid = convert_fid_to_vco_fid(fid: data->currfid); |
377 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid |
378 | : vcoreqfid - vcocurrfid; |
379 | } |
380 | |
381 | if (write_new_fid(data, fid: reqfid)) |
382 | return 1; |
383 | |
384 | if (query_current_values_with_pending_wait(data)) |
385 | return 1; |
386 | |
387 | if (data->currfid != reqfid) { |
388 | pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n" , |
389 | data->currfid, reqfid); |
390 | return 1; |
391 | } |
392 | |
393 | if (savevid != data->currvid) { |
394 | pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n" , |
395 | savevid, data->currvid); |
396 | return 1; |
397 | } |
398 | |
399 | pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n" , |
400 | data->currfid, data->currvid); |
401 | |
402 | return 0; |
403 | } |
404 | |
405 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ |
406 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
407 | u32 reqvid) |
408 | { |
409 | u32 savefid = data->currfid; |
410 | u32 savereqvid = reqvid; |
411 | |
412 | pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n" , |
413 | smp_processor_id(), |
414 | data->currfid, data->currvid); |
415 | |
416 | if (reqvid != data->currvid) { |
417 | if (write_new_vid(data, vid: reqvid)) |
418 | return 1; |
419 | |
420 | if (savefid != data->currfid) { |
421 | pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n" , |
422 | savefid, data->currfid); |
423 | return 1; |
424 | } |
425 | |
426 | if (data->currvid != reqvid) { |
427 | pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x" , |
428 | reqvid, data->currvid); |
429 | return 1; |
430 | } |
431 | } |
432 | |
433 | if (query_current_values_with_pending_wait(data)) |
434 | return 1; |
435 | |
436 | if (savereqvid != data->currvid) { |
437 | pr_debug("ph3 failed, currvid 0x%x\n" , data->currvid); |
438 | return 1; |
439 | } |
440 | |
441 | if (savefid != data->currfid) { |
442 | pr_debug("ph3 failed, currfid changed 0x%x\n" , |
443 | data->currfid); |
444 | return 1; |
445 | } |
446 | |
447 | pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n" , |
448 | data->currfid, data->currvid); |
449 | |
450 | return 0; |
451 | } |
452 | |
453 | static const struct x86_cpu_id powernow_k8_ids[] = { |
454 | /* IO based frequency switching */ |
455 | X86_MATCH_VENDOR_FAM(AMD, 0xf, NULL), |
456 | {} |
457 | }; |
458 | MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids); |
459 | |
460 | static void check_supported_cpu(void *_rc) |
461 | { |
462 | u32 eax, ebx, ecx, edx; |
463 | int *rc = _rc; |
464 | |
465 | *rc = -ENODEV; |
466 | |
467 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
468 | |
469 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
470 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || |
471 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
472 | pr_info("Processor cpuid %x not supported\n" , eax); |
473 | return; |
474 | } |
475 | |
476 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
477 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { |
478 | pr_info("No frequency change capabilities detected\n" ); |
479 | return; |
480 | } |
481 | |
482 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, eax: &eax, ebx: &ebx, ecx: &ecx, edx: &edx); |
483 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
484 | != P_STATE_TRANSITION_CAPABLE) { |
485 | pr_info("Power state transitions not supported\n" ); |
486 | return; |
487 | } |
488 | *rc = 0; |
489 | } |
490 | } |
491 | |
492 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
493 | u8 maxvid) |
494 | { |
495 | unsigned int j; |
496 | u8 lastfid = 0xff; |
497 | |
498 | for (j = 0; j < data->numps; j++) { |
499 | if (pst[j].vid > LEAST_VID) { |
500 | pr_err(FW_BUG "vid %d invalid : 0x%x\n" , j, |
501 | pst[j].vid); |
502 | return -EINVAL; |
503 | } |
504 | if (pst[j].vid < data->rvo) { |
505 | /* vid + rvo >= 0 */ |
506 | pr_err(FW_BUG "0 vid exceeded with pstate %d\n" , j); |
507 | return -ENODEV; |
508 | } |
509 | if (pst[j].vid < maxvid + data->rvo) { |
510 | /* vid + rvo >= maxvid */ |
511 | pr_err(FW_BUG "maxvid exceeded with pstate %d\n" , j); |
512 | return -ENODEV; |
513 | } |
514 | if (pst[j].fid > MAX_FID) { |
515 | pr_err(FW_BUG "maxfid exceeded with pstate %d\n" , j); |
516 | return -ENODEV; |
517 | } |
518 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
519 | /* Only first fid is allowed to be in "low" range */ |
520 | pr_err(FW_BUG "two low fids - %d : 0x%x\n" , j, |
521 | pst[j].fid); |
522 | return -EINVAL; |
523 | } |
524 | if (pst[j].fid < lastfid) |
525 | lastfid = pst[j].fid; |
526 | } |
527 | if (lastfid & 1) { |
528 | pr_err(FW_BUG "lastfid invalid\n" ); |
529 | return -EINVAL; |
530 | } |
531 | if (lastfid > LO_FID_TABLE_TOP) |
532 | pr_info(FW_BUG "first fid not from lo freq table\n" ); |
533 | |
534 | return 0; |
535 | } |
536 | |
537 | static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, |
538 | unsigned int entry) |
539 | { |
540 | powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; |
541 | } |
542 | |
543 | static void print_basics(struct powernow_k8_data *data) |
544 | { |
545 | int j; |
546 | for (j = 0; j < data->numps; j++) { |
547 | if (data->powernow_table[j].frequency != |
548 | CPUFREQ_ENTRY_INVALID) { |
549 | pr_info("fid 0x%x (%d MHz), vid 0x%x\n" , |
550 | data->powernow_table[j].driver_data & 0xff, |
551 | data->powernow_table[j].frequency/1000, |
552 | data->powernow_table[j].driver_data >> 8); |
553 | } |
554 | } |
555 | if (data->batps) |
556 | pr_info("Only %d pstates on battery\n" , data->batps); |
557 | } |
558 | |
559 | static int fill_powernow_table(struct powernow_k8_data *data, |
560 | struct pst_s *pst, u8 maxvid) |
561 | { |
562 | struct cpufreq_frequency_table *powernow_table; |
563 | unsigned int j; |
564 | |
565 | if (data->batps) { |
566 | /* use ACPI support to get full speed on mains power */ |
567 | pr_warn("Only %d pstates usable (use ACPI driver for full range\n" , |
568 | data->batps); |
569 | data->numps = data->batps; |
570 | } |
571 | |
572 | for (j = 1; j < data->numps; j++) { |
573 | if (pst[j-1].fid >= pst[j].fid) { |
574 | pr_err("PST out of sequence\n" ); |
575 | return -EINVAL; |
576 | } |
577 | } |
578 | |
579 | if (data->numps < 2) { |
580 | pr_err("no p states to transition\n" ); |
581 | return -ENODEV; |
582 | } |
583 | |
584 | if (check_pst_table(data, pst, maxvid)) |
585 | return -EINVAL; |
586 | |
587 | powernow_table = kzalloc(size: (sizeof(*powernow_table) |
588 | * (data->numps + 1)), GFP_KERNEL); |
589 | if (!powernow_table) |
590 | return -ENOMEM; |
591 | |
592 | for (j = 0; j < data->numps; j++) { |
593 | int freq; |
594 | powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */ |
595 | powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */ |
596 | freq = find_khz_freq_from_fid(fid: pst[j].fid); |
597 | powernow_table[j].frequency = freq; |
598 | } |
599 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; |
600 | powernow_table[data->numps].driver_data = 0; |
601 | |
602 | if (query_current_values_with_pending_wait(data)) { |
603 | kfree(objp: powernow_table); |
604 | return -EIO; |
605 | } |
606 | |
607 | pr_debug("cfid 0x%x, cvid 0x%x\n" , data->currfid, data->currvid); |
608 | data->powernow_table = powernow_table; |
609 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
610 | print_basics(data); |
611 | |
612 | for (j = 0; j < data->numps; j++) |
613 | if ((pst[j].fid == data->currfid) && |
614 | (pst[j].vid == data->currvid)) |
615 | return 0; |
616 | |
617 | pr_debug("currfid/vid do not match PST, ignoring\n" ); |
618 | return 0; |
619 | } |
620 | |
621 | /* Find and validate the PSB/PST table in BIOS. */ |
622 | static int find_psb_table(struct powernow_k8_data *data) |
623 | { |
624 | struct psb_s *psb; |
625 | unsigned int i; |
626 | u32 mvs; |
627 | u8 maxvid; |
628 | u32 cpst = 0; |
629 | u32 thiscpuid; |
630 | |
631 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { |
632 | /* Scan BIOS looking for the signature. */ |
633 | /* It can not be at ffff0 - it is too big. */ |
634 | |
635 | psb = phys_to_virt(address: i); |
636 | if (memcmp(p: psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) |
637 | continue; |
638 | |
639 | pr_debug("found PSB header at 0x%p\n" , psb); |
640 | |
641 | pr_debug("table vers: 0x%x\n" , psb->tableversion); |
642 | if (psb->tableversion != PSB_VERSION_1_4) { |
643 | pr_err(FW_BUG "PSB table is not v1.4\n" ); |
644 | return -ENODEV; |
645 | } |
646 | |
647 | pr_debug("flags: 0x%x\n" , psb->flags1); |
648 | if (psb->flags1) { |
649 | pr_err(FW_BUG "unknown flags\n" ); |
650 | return -ENODEV; |
651 | } |
652 | |
653 | data->vstable = psb->vstable; |
654 | pr_debug("voltage stabilization time: %d(*20us)\n" , |
655 | data->vstable); |
656 | |
657 | pr_debug("flags2: 0x%x\n" , psb->flags2); |
658 | data->rvo = psb->flags2 & 3; |
659 | data->irt = ((psb->flags2) >> 2) & 3; |
660 | mvs = ((psb->flags2) >> 4) & 3; |
661 | data->vidmvs = 1 << mvs; |
662 | data->batps = ((psb->flags2) >> 6) & 3; |
663 | |
664 | pr_debug("ramp voltage offset: %d\n" , data->rvo); |
665 | pr_debug("isochronous relief time: %d\n" , data->irt); |
666 | pr_debug("maximum voltage step: %d - 0x%x\n" , mvs, data->vidmvs); |
667 | |
668 | pr_debug("numpst: 0x%x\n" , psb->num_tables); |
669 | cpst = psb->num_tables; |
670 | if ((psb->cpuid == 0x00000fc0) || |
671 | (psb->cpuid == 0x00000fe0)) { |
672 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
673 | if ((thiscpuid == 0x00000fc0) || |
674 | (thiscpuid == 0x00000fe0)) |
675 | cpst = 1; |
676 | } |
677 | if (cpst != 1) { |
678 | pr_err(FW_BUG "numpst must be 1\n" ); |
679 | return -ENODEV; |
680 | } |
681 | |
682 | data->plllock = psb->plllocktime; |
683 | pr_debug("plllocktime: 0x%x (units 1us)\n" , psb->plllocktime); |
684 | pr_debug("maxfid: 0x%x\n" , psb->maxfid); |
685 | pr_debug("maxvid: 0x%x\n" , psb->maxvid); |
686 | maxvid = psb->maxvid; |
687 | |
688 | data->numps = psb->numps; |
689 | pr_debug("numpstates: 0x%x\n" , data->numps); |
690 | return fill_powernow_table(data, |
691 | pst: (struct pst_s *)(psb+1), maxvid); |
692 | } |
693 | /* |
694 | * If you see this message, complain to BIOS manufacturer. If |
695 | * he tells you "we do not support Linux" or some similar |
696 | * nonsense, remember that Windows 2000 uses the same legacy |
697 | * mechanism that the old Linux PSB driver uses. Tell them it |
698 | * is broken with Windows 2000. |
699 | * |
700 | * The reference to the AMD documentation is chapter 9 in the |
701 | * BIOS and Kernel Developer's Guide, which is available on |
702 | * www.amd.com |
703 | */ |
704 | pr_err(FW_BUG "No PSB or ACPI _PSS objects\n" ); |
705 | pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n" ); |
706 | return -ENODEV; |
707 | } |
708 | |
709 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
710 | unsigned int index) |
711 | { |
712 | u64 control; |
713 | |
714 | if (!data->acpi_data.state_count) |
715 | return; |
716 | |
717 | control = data->acpi_data.states[index].control; |
718 | data->irt = (control >> IRT_SHIFT) & IRT_MASK; |
719 | data->rvo = (control >> RVO_SHIFT) & RVO_MASK; |
720 | data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; |
721 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; |
722 | data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); |
723 | data->vstable = (control >> VST_SHIFT) & VST_MASK; |
724 | } |
725 | |
726 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) |
727 | { |
728 | struct cpufreq_frequency_table *powernow_table; |
729 | int ret_val = -ENODEV; |
730 | u64 control, status; |
731 | |
732 | if (acpi_processor_register_performance(performance: &data->acpi_data, cpu: data->cpu)) { |
733 | pr_debug("register performance failed: bad ACPI data\n" ); |
734 | return -EIO; |
735 | } |
736 | |
737 | /* verify the data contained in the ACPI structures */ |
738 | if (data->acpi_data.state_count <= 1) { |
739 | pr_debug("No ACPI P-States\n" ); |
740 | goto err_out; |
741 | } |
742 | |
743 | control = data->acpi_data.control_register.space_id; |
744 | status = data->acpi_data.status_register.space_id; |
745 | |
746 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || |
747 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { |
748 | pr_debug("Invalid control/status registers (%llx - %llx)\n" , |
749 | control, status); |
750 | goto err_out; |
751 | } |
752 | |
753 | /* fill in data->powernow_table */ |
754 | powernow_table = kzalloc(size: (sizeof(*powernow_table) |
755 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
756 | if (!powernow_table) |
757 | goto err_out; |
758 | |
759 | /* fill in data */ |
760 | data->numps = data->acpi_data.state_count; |
761 | powernow_k8_acpi_pst_values(data, index: 0); |
762 | |
763 | ret_val = fill_powernow_table_fidvid(data, powernow_table); |
764 | if (ret_val) |
765 | goto err_out_mem; |
766 | |
767 | powernow_table[data->acpi_data.state_count].frequency = |
768 | CPUFREQ_TABLE_END; |
769 | data->powernow_table = powernow_table; |
770 | |
771 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
772 | print_basics(data); |
773 | |
774 | /* notify BIOS that we exist */ |
775 | acpi_processor_notify_smm(THIS_MODULE); |
776 | |
777 | if (!zalloc_cpumask_var(mask: &data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
778 | pr_err("unable to alloc powernow_k8_data cpumask\n" ); |
779 | ret_val = -ENOMEM; |
780 | goto err_out_mem; |
781 | } |
782 | |
783 | return 0; |
784 | |
785 | err_out_mem: |
786 | kfree(objp: powernow_table); |
787 | |
788 | err_out: |
789 | acpi_processor_unregister_performance(cpu: data->cpu); |
790 | |
791 | /* data->acpi_data.state_count informs us at ->exit() |
792 | * whether ACPI was used */ |
793 | data->acpi_data.state_count = 0; |
794 | |
795 | return ret_val; |
796 | } |
797 | |
798 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
799 | struct cpufreq_frequency_table *powernow_table) |
800 | { |
801 | int i; |
802 | |
803 | for (i = 0; i < data->acpi_data.state_count; i++) { |
804 | u32 fid; |
805 | u32 vid; |
806 | u32 freq, index; |
807 | u64 status, control; |
808 | |
809 | if (data->exttype) { |
810 | status = data->acpi_data.states[i].status; |
811 | fid = status & EXT_FID_MASK; |
812 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; |
813 | } else { |
814 | control = data->acpi_data.states[i].control; |
815 | fid = control & FID_MASK; |
816 | vid = (control >> VID_SHIFT) & VID_MASK; |
817 | } |
818 | |
819 | pr_debug(" %d : fid 0x%x, vid 0x%x\n" , i, fid, vid); |
820 | |
821 | index = fid | (vid<<8); |
822 | powernow_table[i].driver_data = index; |
823 | |
824 | freq = find_khz_freq_from_fid(fid); |
825 | powernow_table[i].frequency = freq; |
826 | |
827 | /* verify frequency is OK */ |
828 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
829 | pr_debug("invalid freq %u kHz, ignoring\n" , freq); |
830 | invalidate_entry(powernow_table, entry: i); |
831 | continue; |
832 | } |
833 | |
834 | /* verify voltage is OK - |
835 | * BIOSs are using "off" to indicate invalid */ |
836 | if (vid == VID_OFF) { |
837 | pr_debug("invalid vid %u, ignoring\n" , vid); |
838 | invalidate_entry(powernow_table, entry: i); |
839 | continue; |
840 | } |
841 | |
842 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
843 | pr_info("invalid freq entries %u kHz vs. %u kHz\n" , |
844 | freq, (unsigned int) |
845 | (data->acpi_data.states[i].core_frequency |
846 | * 1000)); |
847 | invalidate_entry(powernow_table, entry: i); |
848 | continue; |
849 | } |
850 | } |
851 | return 0; |
852 | } |
853 | |
854 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) |
855 | { |
856 | if (data->acpi_data.state_count) |
857 | acpi_processor_unregister_performance(cpu: data->cpu); |
858 | free_cpumask_var(mask: data->acpi_data.shared_cpu_map); |
859 | } |
860 | |
861 | static int get_transition_latency(struct powernow_k8_data *data) |
862 | { |
863 | int max_latency = 0; |
864 | int i; |
865 | for (i = 0; i < data->acpi_data.state_count; i++) { |
866 | int cur_latency = data->acpi_data.states[i].transition_latency |
867 | + data->acpi_data.states[i].bus_master_latency; |
868 | if (cur_latency > max_latency) |
869 | max_latency = cur_latency; |
870 | } |
871 | if (max_latency == 0) { |
872 | pr_err(FW_WARN "Invalid zero transition latency\n" ); |
873 | max_latency = 1; |
874 | } |
875 | /* value in usecs, needs to be in nanoseconds */ |
876 | return 1000 * max_latency; |
877 | } |
878 | |
879 | /* Take a frequency, and issue the fid/vid transition command */ |
880 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
881 | unsigned int index, |
882 | struct cpufreq_policy *policy) |
883 | { |
884 | u32 fid = 0; |
885 | u32 vid = 0; |
886 | int res; |
887 | struct cpufreq_freqs freqs; |
888 | |
889 | pr_debug("cpu %d transition to index %u\n" , smp_processor_id(), index); |
890 | |
891 | /* fid/vid correctness check for k8 */ |
892 | /* fid are the lower 8 bits of the index we stored into |
893 | * the cpufreq frequency table in find_psb_table, vid |
894 | * are the upper 8 bits. |
895 | */ |
896 | fid = data->powernow_table[index].driver_data & 0xFF; |
897 | vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8; |
898 | |
899 | pr_debug("table matched fid 0x%x, giving vid 0x%x\n" , fid, vid); |
900 | |
901 | if (query_current_values_with_pending_wait(data)) |
902 | return 1; |
903 | |
904 | if ((data->currvid == vid) && (data->currfid == fid)) { |
905 | pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n" , |
906 | fid, vid); |
907 | return 0; |
908 | } |
909 | |
910 | pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n" , |
911 | smp_processor_id(), fid, vid); |
912 | freqs.old = find_khz_freq_from_fid(fid: data->currfid); |
913 | freqs.new = find_khz_freq_from_fid(fid); |
914 | |
915 | cpufreq_freq_transition_begin(policy, freqs: &freqs); |
916 | res = transition_fid_vid(data, reqfid: fid, reqvid: vid); |
917 | cpufreq_freq_transition_end(policy, freqs: &freqs, transition_failed: res); |
918 | |
919 | return res; |
920 | } |
921 | |
922 | struct powernowk8_target_arg { |
923 | struct cpufreq_policy *pol; |
924 | unsigned newstate; |
925 | }; |
926 | |
927 | static long powernowk8_target_fn(void *arg) |
928 | { |
929 | struct powernowk8_target_arg *pta = arg; |
930 | struct cpufreq_policy *pol = pta->pol; |
931 | unsigned newstate = pta->newstate; |
932 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
933 | u32 checkfid; |
934 | u32 checkvid; |
935 | int ret; |
936 | |
937 | if (!data) |
938 | return -EINVAL; |
939 | |
940 | checkfid = data->currfid; |
941 | checkvid = data->currvid; |
942 | |
943 | if (pending_bit_stuck()) { |
944 | pr_err("failing targ, change pending bit set\n" ); |
945 | return -EIO; |
946 | } |
947 | |
948 | pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n" , |
949 | pol->cpu, data->powernow_table[newstate].frequency, pol->min, |
950 | pol->max); |
951 | |
952 | if (query_current_values_with_pending_wait(data)) |
953 | return -EIO; |
954 | |
955 | pr_debug("targ: curr fid 0x%x, vid 0x%x\n" , |
956 | data->currfid, data->currvid); |
957 | |
958 | if ((checkvid != data->currvid) || |
959 | (checkfid != data->currfid)) { |
960 | pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n" , |
961 | checkfid, data->currfid, |
962 | checkvid, data->currvid); |
963 | } |
964 | |
965 | mutex_lock(&fidvid_mutex); |
966 | |
967 | powernow_k8_acpi_pst_values(data, index: newstate); |
968 | |
969 | ret = transition_frequency_fidvid(data, index: newstate, policy: pol); |
970 | |
971 | if (ret) { |
972 | pr_err("transition frequency failed\n" ); |
973 | mutex_unlock(lock: &fidvid_mutex); |
974 | return 1; |
975 | } |
976 | mutex_unlock(lock: &fidvid_mutex); |
977 | |
978 | pol->cur = find_khz_freq_from_fid(fid: data->currfid); |
979 | |
980 | return 0; |
981 | } |
982 | |
983 | /* Driver entry point to switch to the target frequency */ |
984 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned index) |
985 | { |
986 | struct powernowk8_target_arg pta = { .pol = pol, .newstate = index }; |
987 | |
988 | return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta); |
989 | } |
990 | |
991 | struct init_on_cpu { |
992 | struct powernow_k8_data *data; |
993 | int rc; |
994 | }; |
995 | |
996 | static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu) |
997 | { |
998 | struct init_on_cpu *init_on_cpu = _init_on_cpu; |
999 | |
1000 | if (pending_bit_stuck()) { |
1001 | pr_err("failing init, change pending bit set\n" ); |
1002 | init_on_cpu->rc = -ENODEV; |
1003 | return; |
1004 | } |
1005 | |
1006 | if (query_current_values_with_pending_wait(data: init_on_cpu->data)) { |
1007 | init_on_cpu->rc = -ENODEV; |
1008 | return; |
1009 | } |
1010 | |
1011 | fidvid_msr_init(); |
1012 | |
1013 | init_on_cpu->rc = 0; |
1014 | } |
1015 | |
1016 | #define MISSING_PSS_MSG \ |
1017 | FW_BUG "No compatible ACPI _PSS objects found.\n" \ |
1018 | FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \ |
1019 | FW_BUG "If that doesn't help, try upgrading your BIOS.\n" |
1020 | |
1021 | /* per CPU init entry point to the driver */ |
1022 | static int powernowk8_cpu_init(struct cpufreq_policy *pol) |
1023 | { |
1024 | struct powernow_k8_data *data; |
1025 | struct init_on_cpu init_on_cpu; |
1026 | int rc, cpu; |
1027 | |
1028 | smp_call_function_single(cpuid: pol->cpu, func: check_supported_cpu, info: &rc, wait: 1); |
1029 | if (rc) |
1030 | return -ENODEV; |
1031 | |
1032 | data = kzalloc(size: sizeof(*data), GFP_KERNEL); |
1033 | if (!data) |
1034 | return -ENOMEM; |
1035 | |
1036 | data->cpu = pol->cpu; |
1037 | |
1038 | if (powernow_k8_cpu_init_acpi(data)) { |
1039 | /* |
1040 | * Use the PSB BIOS structure. This is only available on |
1041 | * an UP version, and is deprecated by AMD. |
1042 | */ |
1043 | if (num_online_cpus() != 1) { |
1044 | pr_err_once(MISSING_PSS_MSG); |
1045 | goto err_out; |
1046 | } |
1047 | if (pol->cpu != 0) { |
1048 | pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n" ); |
1049 | goto err_out; |
1050 | } |
1051 | rc = find_psb_table(data); |
1052 | if (rc) |
1053 | goto err_out; |
1054 | |
1055 | /* Take a crude guess here. |
1056 | * That guess was in microseconds, so multiply with 1000 */ |
1057 | pol->cpuinfo.transition_latency = ( |
1058 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + |
1059 | ((1 << data->irt) * 30)) * 1000; |
1060 | } else /* ACPI _PSS objects available */ |
1061 | pol->cpuinfo.transition_latency = get_transition_latency(data); |
1062 | |
1063 | /* only run on specific CPU from here on */ |
1064 | init_on_cpu.data = data; |
1065 | smp_call_function_single(cpuid: data->cpu, func: powernowk8_cpu_init_on_cpu, |
1066 | info: &init_on_cpu, wait: 1); |
1067 | rc = init_on_cpu.rc; |
1068 | if (rc != 0) |
1069 | goto err_out_exit_acpi; |
1070 | |
1071 | cpumask_copy(dstp: pol->cpus, topology_core_cpumask(pol->cpu)); |
1072 | data->available_cores = pol->cpus; |
1073 | pol->freq_table = data->powernow_table; |
1074 | |
1075 | pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n" , |
1076 | data->currfid, data->currvid); |
1077 | |
1078 | /* Point all the CPUs in this policy to the same data */ |
1079 | for_each_cpu(cpu, pol->cpus) |
1080 | per_cpu(powernow_data, cpu) = data; |
1081 | |
1082 | return 0; |
1083 | |
1084 | err_out_exit_acpi: |
1085 | powernow_k8_cpu_exit_acpi(data); |
1086 | |
1087 | err_out: |
1088 | kfree(objp: data); |
1089 | return -ENODEV; |
1090 | } |
1091 | |
1092 | static int powernowk8_cpu_exit(struct cpufreq_policy *pol) |
1093 | { |
1094 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1095 | int cpu; |
1096 | |
1097 | if (!data) |
1098 | return -EINVAL; |
1099 | |
1100 | powernow_k8_cpu_exit_acpi(data); |
1101 | |
1102 | kfree(objp: data->powernow_table); |
1103 | kfree(objp: data); |
1104 | /* pol->cpus will be empty here, use related_cpus instead. */ |
1105 | for_each_cpu(cpu, pol->related_cpus) |
1106 | per_cpu(powernow_data, cpu) = NULL; |
1107 | |
1108 | return 0; |
1109 | } |
1110 | |
1111 | static void query_values_on_cpu(void *_err) |
1112 | { |
1113 | int *err = _err; |
1114 | struct powernow_k8_data *data = __this_cpu_read(powernow_data); |
1115 | |
1116 | *err = query_current_values_with_pending_wait(data); |
1117 | } |
1118 | |
1119 | static unsigned int powernowk8_get(unsigned int cpu) |
1120 | { |
1121 | struct powernow_k8_data *data = per_cpu(powernow_data, cpu); |
1122 | unsigned int khz = 0; |
1123 | int err; |
1124 | |
1125 | if (!data) |
1126 | return 0; |
1127 | |
1128 | smp_call_function_single(cpuid: cpu, func: query_values_on_cpu, info: &err, wait: true); |
1129 | if (err) |
1130 | goto out; |
1131 | |
1132 | khz = find_khz_freq_from_fid(fid: data->currfid); |
1133 | |
1134 | |
1135 | out: |
1136 | return khz; |
1137 | } |
1138 | |
1139 | static struct cpufreq_driver cpufreq_amd64_driver = { |
1140 | .flags = CPUFREQ_ASYNC_NOTIFICATION, |
1141 | .verify = cpufreq_generic_frequency_table_verify, |
1142 | .target_index = powernowk8_target, |
1143 | .bios_limit = acpi_processor_get_bios_limit, |
1144 | .init = powernowk8_cpu_init, |
1145 | .exit = powernowk8_cpu_exit, |
1146 | .get = powernowk8_get, |
1147 | .name = "powernow-k8" , |
1148 | .attr = cpufreq_generic_attr, |
1149 | }; |
1150 | |
1151 | static void __request_acpi_cpufreq(void) |
1152 | { |
1153 | const char drv[] = "acpi-cpufreq" ; |
1154 | const char *cur_drv; |
1155 | |
1156 | cur_drv = cpufreq_get_current_driver(); |
1157 | if (!cur_drv) |
1158 | goto request; |
1159 | |
1160 | if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv)))) |
1161 | pr_warn("WTF driver: %s\n" , cur_drv); |
1162 | |
1163 | return; |
1164 | |
1165 | request: |
1166 | pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n" ); |
1167 | request_module(drv); |
1168 | } |
1169 | |
1170 | /* driver entry point for init */ |
1171 | static int powernowk8_init(void) |
1172 | { |
1173 | unsigned int i, supported_cpus = 0; |
1174 | int ret; |
1175 | |
1176 | if (!x86_match_cpu(match: powernow_k8_ids)) |
1177 | return -ENODEV; |
1178 | |
1179 | if (boot_cpu_has(X86_FEATURE_HW_PSTATE)) { |
1180 | __request_acpi_cpufreq(); |
1181 | return -ENODEV; |
1182 | } |
1183 | |
1184 | cpus_read_lock(); |
1185 | for_each_online_cpu(i) { |
1186 | smp_call_function_single(cpuid: i, func: check_supported_cpu, info: &ret, wait: 1); |
1187 | if (!ret) |
1188 | supported_cpus++; |
1189 | } |
1190 | |
1191 | if (supported_cpus != num_online_cpus()) { |
1192 | cpus_read_unlock(); |
1193 | return -ENODEV; |
1194 | } |
1195 | cpus_read_unlock(); |
1196 | |
1197 | ret = cpufreq_register_driver(driver_data: &cpufreq_amd64_driver); |
1198 | if (ret) |
1199 | return ret; |
1200 | |
1201 | pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n" , |
1202 | num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus); |
1203 | |
1204 | return ret; |
1205 | } |
1206 | |
1207 | /* driver entry point for term */ |
1208 | static void __exit powernowk8_exit(void) |
1209 | { |
1210 | pr_debug("exit\n" ); |
1211 | |
1212 | cpufreq_unregister_driver(driver_data: &cpufreq_amd64_driver); |
1213 | } |
1214 | |
1215 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>" ); |
1216 | MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>" ); |
1217 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver." ); |
1218 | MODULE_LICENSE("GPL" ); |
1219 | |
1220 | late_initcall(powernowk8_init); |
1221 | module_exit(powernowk8_exit); |
1222 | |