1// SPDX-License-Identifier: GPL-2.0
2/*
3 * FPGA Region Driver for FPGA Management Engine (FME)
4 *
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
6 *
7 * Authors:
8 * Wu Hao <hao.wu@intel.com>
9 * Joseph Grecco <joe.grecco@intel.com>
10 * Enno Luebbers <enno.luebbers@intel.com>
11 * Tim Whisonant <tim.whisonant@intel.com>
12 * Ananda Ravuri <ananda.ravuri@intel.com>
13 * Henry Mitchel <henry.mitchel@intel.com>
14 */
15
16#include <linux/module.h>
17#include <linux/fpga/fpga-mgr.h>
18#include <linux/fpga/fpga-region.h>
19
20#include "dfl-fme-pr.h"
21
22static int fme_region_get_bridges(struct fpga_region *region)
23{
24 struct dfl_fme_region_pdata *pdata = region->priv;
25 struct device *dev = &pdata->br->dev;
26
27 return fpga_bridge_get_to_list(dev, region->info, &region->bridge_list);
28}
29
30static int fme_region_probe(struct platform_device *pdev)
31{
32 struct dfl_fme_region_pdata *pdata = dev_get_platdata(&pdev->dev);
33 struct device *dev = &pdev->dev;
34 struct fpga_region *region;
35 struct fpga_manager *mgr;
36 int ret;
37
38 mgr = fpga_mgr_get(&pdata->mgr->dev);
39 if (IS_ERR(mgr))
40 return -EPROBE_DEFER;
41
42 region = devm_fpga_region_create(dev, mgr, fme_region_get_bridges);
43 if (!region) {
44 ret = -ENOMEM;
45 goto eprobe_mgr_put;
46 }
47
48 region->priv = pdata;
49 region->compat_id = mgr->compat_id;
50 platform_set_drvdata(pdev, region);
51
52 ret = fpga_region_register(region);
53 if (ret)
54 goto eprobe_mgr_put;
55
56 dev_dbg(dev, "DFL FME FPGA Region probed\n");
57
58 return 0;
59
60eprobe_mgr_put:
61 fpga_mgr_put(mgr);
62 return ret;
63}
64
65static int fme_region_remove(struct platform_device *pdev)
66{
67 struct fpga_region *region = platform_get_drvdata(pdev);
68 struct fpga_manager *mgr = region->mgr;
69
70 fpga_region_unregister(region);
71 fpga_mgr_put(mgr);
72
73 return 0;
74}
75
76static struct platform_driver fme_region_driver = {
77 .driver = {
78 .name = DFL_FPGA_FME_REGION,
79 },
80 .probe = fme_region_probe,
81 .remove = fme_region_remove,
82};
83
84module_platform_driver(fme_region_driver);
85
86MODULE_DESCRIPTION("FPGA Region for DFL FPGA Management Engine");
87MODULE_AUTHOR("Intel Corporation");
88MODULE_LICENSE("GPL v2");
89MODULE_ALIAS("platform:dfl-fme-region");
90