| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Header file for FPGA Management Engine (FME) Driver |
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| 4 | * |
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| 5 | * Copyright (C) 2017-2018 Intel Corporation, Inc. |
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| 6 | * |
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| 7 | * Authors: |
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| 8 | * Kang Luwei <luwei.kang@intel.com> |
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| 9 | * Xiao Guangrong <guangrong.xiao@linux.intel.com> |
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| 10 | * Wu Hao <hao.wu@intel.com> |
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| 11 | * Joseph Grecco <joe.grecco@intel.com> |
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| 12 | * Enno Luebbers <enno.luebbers@intel.com> |
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| 13 | * Tim Whisonant <tim.whisonant@intel.com> |
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| 14 | * Ananda Ravuri <ananda.ravuri@intel.com> |
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| 15 | * Henry Mitchel <henry.mitchel@intel.com> |
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| 16 | */ |
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| 17 | |
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| 18 | #ifndef __DFL_FME_H |
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| 19 | #define __DFL_FME_H |
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| 20 | |
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| 21 | /** |
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| 22 | * struct dfl_fme - dfl fme private data |
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| 23 | * |
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| 24 | * @mgr: FME's FPGA manager platform device. |
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| 25 | * @region_list: linked list of FME's FPGA regions. |
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| 26 | * @bridge_list: linked list of FME's FPGA bridges. |
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| 27 | * @pdata: fme platform device's pdata. |
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| 28 | */ |
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| 29 | struct dfl_fme { |
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| 30 | struct platform_device *mgr; |
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| 31 | struct list_head region_list; |
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| 32 | struct list_head bridge_list; |
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| 33 | struct dfl_feature_platform_data *pdata; |
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| 34 | }; |
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| 35 | |
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| 36 | extern const struct dfl_feature_ops fme_pr_mgmt_ops; |
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| 37 | extern const struct dfl_feature_id fme_pr_mgmt_id_table[]; |
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| 38 | extern const struct dfl_feature_ops fme_global_err_ops; |
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| 39 | extern const struct dfl_feature_id fme_global_err_id_table[]; |
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| 40 | extern const struct attribute_group fme_global_err_group; |
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| 41 | extern const struct dfl_feature_ops fme_perf_ops; |
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| 42 | extern const struct dfl_feature_id fme_perf_id_table[]; |
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| 43 | |
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| 44 | #endif /* __DFL_FME_H */ |
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| 45 | |
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