1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Intel Merrifield SoC GPIO driver |
4 | * |
5 | * Copyright (c) 2016, 2023 Intel Corporation. |
6 | * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
7 | */ |
8 | |
9 | #include <linux/acpi.h> |
10 | #include <linux/bitops.h> |
11 | #include <linux/device.h> |
12 | #include <linux/err.h> |
13 | #include <linux/io.h> |
14 | #include <linux/module.h> |
15 | #include <linux/pci.h> |
16 | #include <linux/types.h> |
17 | |
18 | #include "gpio-tangier.h" |
19 | |
20 | /* Intel Merrifield has 192 GPIO pins */ |
21 | #define MRFLD_NGPIO 192 |
22 | |
23 | static const struct tng_gpio_pinrange mrfld_gpio_ranges[] = { |
24 | GPIO_PINRANGE(0, 11, 146), |
25 | GPIO_PINRANGE(12, 13, 144), |
26 | GPIO_PINRANGE(14, 15, 35), |
27 | GPIO_PINRANGE(16, 16, 164), |
28 | GPIO_PINRANGE(17, 18, 105), |
29 | GPIO_PINRANGE(19, 22, 101), |
30 | GPIO_PINRANGE(23, 30, 107), |
31 | GPIO_PINRANGE(32, 43, 67), |
32 | GPIO_PINRANGE(44, 63, 195), |
33 | GPIO_PINRANGE(64, 67, 140), |
34 | GPIO_PINRANGE(68, 69, 165), |
35 | GPIO_PINRANGE(70, 71, 65), |
36 | GPIO_PINRANGE(72, 76, 228), |
37 | GPIO_PINRANGE(77, 86, 37), |
38 | GPIO_PINRANGE(87, 87, 48), |
39 | GPIO_PINRANGE(88, 88, 47), |
40 | GPIO_PINRANGE(89, 96, 49), |
41 | GPIO_PINRANGE(97, 97, 34), |
42 | GPIO_PINRANGE(102, 119, 83), |
43 | GPIO_PINRANGE(120, 123, 79), |
44 | GPIO_PINRANGE(124, 135, 115), |
45 | GPIO_PINRANGE(137, 142, 158), |
46 | GPIO_PINRANGE(154, 163, 24), |
47 | GPIO_PINRANGE(164, 176, 215), |
48 | GPIO_PINRANGE(177, 189, 127), |
49 | GPIO_PINRANGE(190, 191, 178), |
50 | }; |
51 | |
52 | static const char *mrfld_gpio_get_pinctrl_dev_name(struct tng_gpio *priv) |
53 | { |
54 | struct device *dev = priv->dev; |
55 | struct acpi_device *adev; |
56 | const char *name; |
57 | |
58 | adev = acpi_dev_get_first_match_dev(hid: "INTC1002" , NULL, hrv: -1); |
59 | if (adev) { |
60 | name = devm_kstrdup(dev, s: acpi_dev_name(adev), GFP_KERNEL); |
61 | acpi_dev_put(adev); |
62 | } else { |
63 | name = "pinctrl-merrifield" ; |
64 | } |
65 | |
66 | return name; |
67 | } |
68 | |
69 | static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
70 | { |
71 | struct device *dev = &pdev->dev; |
72 | struct tng_gpio *priv; |
73 | u32 gpio_base, irq_base; |
74 | void __iomem *base; |
75 | int retval; |
76 | |
77 | retval = pcim_enable_device(pdev); |
78 | if (retval) |
79 | return retval; |
80 | |
81 | retval = pcim_iomap_regions(pdev, BIT(1) | BIT(0), name: pci_name(pdev)); |
82 | if (retval) |
83 | return dev_err_probe(dev, err: retval, fmt: "I/O memory mapping error\n" ); |
84 | |
85 | base = pcim_iomap_table(pdev)[1]; |
86 | |
87 | irq_base = readl(addr: base + 0 * sizeof(u32)); |
88 | gpio_base = readl(addr: base + 1 * sizeof(u32)); |
89 | |
90 | /* Release the IO mapping, since we already get the info from BAR1 */ |
91 | pcim_iounmap_regions(pdev, BIT(1)); |
92 | |
93 | priv = devm_kzalloc(dev, size: sizeof(*priv), GFP_KERNEL); |
94 | if (!priv) |
95 | return -ENOMEM; |
96 | |
97 | priv->dev = dev; |
98 | priv->reg_base = pcim_iomap_table(pdev)[0]; |
99 | |
100 | priv->pin_info.pin_ranges = mrfld_gpio_ranges; |
101 | priv->pin_info.nranges = ARRAY_SIZE(mrfld_gpio_ranges); |
102 | priv->pin_info.name = mrfld_gpio_get_pinctrl_dev_name(priv); |
103 | if (!priv->pin_info.name) |
104 | return -ENOMEM; |
105 | |
106 | priv->info.base = gpio_base; |
107 | priv->info.ngpio = MRFLD_NGPIO; |
108 | priv->info.first = irq_base; |
109 | |
110 | retval = pci_alloc_irq_vectors(dev: pdev, min_vecs: 1, max_vecs: 1, PCI_IRQ_ALL_TYPES); |
111 | if (retval < 0) |
112 | return retval; |
113 | |
114 | priv->irq = pci_irq_vector(dev: pdev, nr: 0); |
115 | |
116 | priv->wake_regs.gwmr = GWMR_MRFLD; |
117 | priv->wake_regs.gwsr = GWSR_MRFLD; |
118 | priv->wake_regs.gsir = GSIR_MRFLD; |
119 | |
120 | retval = devm_tng_gpio_probe(dev, gpio: priv); |
121 | if (retval) |
122 | return dev_err_probe(dev, err: retval, fmt: "tng_gpio_probe error\n" ); |
123 | |
124 | pci_set_drvdata(pdev, data: priv); |
125 | return 0; |
126 | } |
127 | |
128 | static const struct pci_device_id mrfld_gpio_ids[] = { |
129 | { PCI_VDEVICE(INTEL, 0x1199) }, |
130 | { } |
131 | }; |
132 | MODULE_DEVICE_TABLE(pci, mrfld_gpio_ids); |
133 | |
134 | static struct pci_driver mrfld_gpio_driver = { |
135 | .name = "gpio-merrifield" , |
136 | .id_table = mrfld_gpio_ids, |
137 | .probe = mrfld_gpio_probe, |
138 | }; |
139 | module_pci_driver(mrfld_gpio_driver); |
140 | |
141 | MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>" ); |
142 | MODULE_DESCRIPTION("Intel Merrifield SoC GPIO driver" ); |
143 | MODULE_LICENSE("GPL v2" ); |
144 | MODULE_IMPORT_NS(GPIO_TANGIER); |
145 | |