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1/*
2 * STMicroelectronics ConneXt (STA2X11) GPIO driver
3 *
4 * Copyright 2012 ST Microelectronics (Alessandro Rubini)
5 * Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd.
6 * Also based on previous sta2x11 work, Copyright 2011 Wind River Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
15 * See the GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/slab.h>
26#include <linux/gpio/driver.h>
27#include <linux/bitops.h>
28#include <linux/interrupt.h>
29#include <linux/irq.h>
30#include <linux/pci.h>
31#include <linux/platform_device.h>
32#include <linux/mfd/sta2x11-mfd.h>
33
34struct gsta_regs {
35 u32 dat; /* 0x00 */
36 u32 dats;
37 u32 datc;
38 u32 pdis;
39 u32 dir; /* 0x10 */
40 u32 dirs;
41 u32 dirc;
42 u32 unused_1c;
43 u32 afsela; /* 0x20 */
44 u32 unused_24[7];
45 u32 rimsc; /* 0x40 */
46 u32 fimsc;
47 u32 is;
48 u32 ic;
49};
50
51struct gsta_gpio {
52 spinlock_t lock;
53 struct device *dev;
54 void __iomem *reg_base;
55 struct gsta_regs __iomem *regs[GSTA_NR_BLOCKS];
56 struct gpio_chip gpio;
57 int irq_base;
58 /* FIXME: save the whole config here (AF, ...) */
59 unsigned irq_type[GSTA_NR_GPIO];
60};
61
62/*
63 * gpio methods
64 */
65
66static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
67{
68 struct gsta_gpio *chip = gpiochip_get_data(gpio);
69 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
70 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
71
72 if (val)
73 writel(bit, &regs->dats);
74 else
75 writel(bit, &regs->datc);
76}
77
78static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr)
79{
80 struct gsta_gpio *chip = gpiochip_get_data(gpio);
81 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
82 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
83
84 return !!(readl(&regs->dat) & bit);
85}
86
87static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
88 int val)
89{
90 struct gsta_gpio *chip = gpiochip_get_data(gpio);
91 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
92 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
93
94 writel(bit, &regs->dirs);
95 /* Data register after direction, otherwise pullup/down is selected */
96 if (val)
97 writel(bit, &regs->dats);
98 else
99 writel(bit, &regs->datc);
100 return 0;
101}
102
103static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
104{
105 struct gsta_gpio *chip = gpiochip_get_data(gpio);
106 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
107 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
108
109 writel(bit, &regs->dirc);
110 return 0;
111}
112
113static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
114{
115 struct gsta_gpio *chip = gpiochip_get_data(gpio);
116 return chip->irq_base + offset;
117}
118
119static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */
120{
121 struct gpio_chip *gpio = &chip->gpio;
122
123 /*
124 * ARCH_NR_GPIOS is currently 256 and dynamic allocation starts
125 * from the end. However, for compatibility, we need the first
126 * ConneXt device to start from gpio 0: it's the main chipset
127 * on most boards so documents and drivers assume gpio0..gpio127
128 */
129 static int gpio_base;
130
131 gpio->label = dev_name(chip->dev);
132 gpio->owner = THIS_MODULE;
133 gpio->direction_input = gsta_gpio_direction_input;
134 gpio->get = gsta_gpio_get;
135 gpio->direction_output = gsta_gpio_direction_output;
136 gpio->set = gsta_gpio_set;
137 gpio->dbg_show = NULL;
138 gpio->base = gpio_base;
139 gpio->ngpio = GSTA_NR_GPIO;
140 gpio->can_sleep = false;
141 gpio->to_irq = gsta_gpio_to_irq;
142
143 /*
144 * After the first device, turn to dynamic gpio numbers.
145 * For example, with ARCH_NR_GPIOS = 256 we can fit two cards
146 */
147 if (!gpio_base)
148 gpio_base = -1;
149}
150
151/*
152 * Special method: alternate functions and pullup/pulldown. This is only
153 * invoked on startup to configure gpio's according to platform data.
154 * FIXME : this functionality shall be managed (and exported to other drivers)
155 * via the pin control subsystem.
156 */
157static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg)
158{
159 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
160 unsigned long flags;
161 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
162 u32 val;
163 int err = 0;
164
165 pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg);
166
167 if (cfg == PINMUX_TYPE_NONE)
168 return;
169
170 /* Alternate function or not? */
171 spin_lock_irqsave(&chip->lock, flags);
172 val = readl(&regs->afsela);
173 if (cfg == PINMUX_TYPE_FUNCTION)
174 val |= bit;
175 else
176 val &= ~bit;
177 writel(val | bit, &regs->afsela);
178 if (cfg == PINMUX_TYPE_FUNCTION) {
179 spin_unlock_irqrestore(&chip->lock, flags);
180 return;
181 }
182
183 /* not alternate function: set details */
184 switch (cfg) {
185 case PINMUX_TYPE_OUTPUT_LOW:
186 writel(bit, &regs->dirs);
187 writel(bit, &regs->datc);
188 break;
189 case PINMUX_TYPE_OUTPUT_HIGH:
190 writel(bit, &regs->dirs);
191 writel(bit, &regs->dats);
192 break;
193 case PINMUX_TYPE_INPUT:
194 writel(bit, &regs->dirc);
195 val = readl(&regs->pdis) | bit;
196 writel(val, &regs->pdis);
197 break;
198 case PINMUX_TYPE_INPUT_PULLUP:
199 writel(bit, &regs->dirc);
200 val = readl(&regs->pdis) & ~bit;
201 writel(val, &regs->pdis);
202 writel(bit, &regs->dats);
203 break;
204 case PINMUX_TYPE_INPUT_PULLDOWN:
205 writel(bit, &regs->dirc);
206 val = readl(&regs->pdis) & ~bit;
207 writel(val, &regs->pdis);
208 writel(bit, &regs->datc);
209 break;
210 default:
211 err = 1;
212 }
213 spin_unlock_irqrestore(&chip->lock, flags);
214 if (err)
215 pr_err("%s: chip %p, pin %i, cfg %i is invalid\n",
216 __func__, chip, nr, cfg);
217}
218
219/*
220 * Irq methods
221 */
222
223static void gsta_irq_disable(struct irq_data *data)
224{
225 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
226 struct gsta_gpio *chip = gc->private;
227 int nr = data->irq - chip->irq_base;
228 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
229 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
230 u32 val;
231 unsigned long flags;
232
233 spin_lock_irqsave(&chip->lock, flags);
234 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) {
235 val = readl(&regs->rimsc) & ~bit;
236 writel(val, &regs->rimsc);
237 }
238 if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) {
239 val = readl(&regs->fimsc) & ~bit;
240 writel(val, &regs->fimsc);
241 }
242 spin_unlock_irqrestore(&chip->lock, flags);
243 return;
244}
245
246static void gsta_irq_enable(struct irq_data *data)
247{
248 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
249 struct gsta_gpio *chip = gc->private;
250 int nr = data->irq - chip->irq_base;
251 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK];
252 u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK);
253 u32 val;
254 int type;
255 unsigned long flags;
256
257 type = chip->irq_type[nr];
258
259 spin_lock_irqsave(&chip->lock, flags);
260 val = readl(&regs->rimsc);
261 if (type & IRQ_TYPE_EDGE_RISING)
262 writel(val | bit, &regs->rimsc);
263 else
264 writel(val & ~bit, &regs->rimsc);
265 val = readl(&regs->rimsc);
266 if (type & IRQ_TYPE_EDGE_FALLING)
267 writel(val | bit, &regs->fimsc);
268 else
269 writel(val & ~bit, &regs->fimsc);
270 spin_unlock_irqrestore(&chip->lock, flags);
271 return;
272}
273
274static int gsta_irq_type(struct irq_data *d, unsigned int type)
275{
276 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
277 struct gsta_gpio *chip = gc->private;
278 int nr = d->irq - chip->irq_base;
279
280 /* We only support edge interrupts */
281 if (!(type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) {
282 pr_debug("%s: unsupported type 0x%x\n", __func__, type);
283 return -EINVAL;
284 }
285
286 chip->irq_type[nr] = type; /* used for enable/disable */
287
288 gsta_irq_enable(d);
289 return 0;
290}
291
292static irqreturn_t gsta_gpio_handler(int irq, void *dev_id)
293{
294 struct gsta_gpio *chip = dev_id;
295 struct gsta_regs __iomem *regs;
296 u32 is;
297 int i, nr, base;
298 irqreturn_t ret = IRQ_NONE;
299
300 for (i = 0; i < GSTA_NR_BLOCKS; i++) {
301 regs = chip->regs[i];
302 base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK;
303 while ((is = readl(&regs->is))) {
304 nr = __ffs(is);
305 irq = base + nr;
306 generic_handle_irq(irq);
307 writel(1 << nr, &regs->ic);
308 ret = IRQ_HANDLED;
309 }
310 }
311 return ret;
312}
313
314static int gsta_alloc_irq_chip(struct gsta_gpio *chip)
315{
316 struct irq_chip_generic *gc;
317 struct irq_chip_type *ct;
318 int rv;
319
320 gc = devm_irq_alloc_generic_chip(chip->dev, KBUILD_MODNAME, 1,
321 chip->irq_base,
322 chip->reg_base, handle_simple_irq);
323 if (!gc)
324 return -ENOMEM;
325
326 gc->private = chip;
327 ct = gc->chip_types;
328
329 ct->chip.irq_set_type = gsta_irq_type;
330 ct->chip.irq_disable = gsta_irq_disable;
331 ct->chip.irq_enable = gsta_irq_enable;
332
333 /* FIXME: this makes at most 32 interrupts. Request 0 by now */
334 rv = devm_irq_setup_generic_chip(chip->dev, gc,
335 0 /* IRQ_MSK(GSTA_GPIO_PER_BLOCK) */,
336 0, IRQ_NOREQUEST | IRQ_NOPROBE, 0);
337 if (rv)
338 return rv;
339
340 /* Set up all all 128 interrupts: code from setup_generic_chip */
341 {
342 struct irq_chip_type *ct = gc->chip_types;
343 int i, j;
344 for (j = 0; j < GSTA_NR_GPIO; j++) {
345 i = chip->irq_base + j;
346 irq_set_chip_and_handler(i, &ct->chip, ct->handler);
347 irq_set_chip_data(i, gc);
348 irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
349 }
350 gc->irq_cnt = i - gc->irq_base;
351 }
352
353 return 0;
354}
355
356/* The platform device used here is instantiated by the MFD device */
357static int gsta_probe(struct platform_device *dev)
358{
359 int i, err;
360 struct pci_dev *pdev;
361 struct sta2x11_gpio_pdata *gpio_pdata;
362 struct gsta_gpio *chip;
363 struct resource *res;
364
365 pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev);
366 gpio_pdata = dev_get_platdata(&pdev->dev);
367
368 if (gpio_pdata == NULL)
369 dev_err(&dev->dev, "no gpio config\n");
370 pr_debug("gpio config: %p\n", gpio_pdata);
371
372 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
373
374 chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL);
375 if (!chip)
376 return -ENOMEM;
377 chip->dev = &dev->dev;
378 chip->reg_base = devm_ioremap_resource(&dev->dev, res);
379 if (IS_ERR(chip->reg_base))
380 return PTR_ERR(chip->reg_base);
381
382 for (i = 0; i < GSTA_NR_BLOCKS; i++) {
383 chip->regs[i] = chip->reg_base + i * 4096;
384 /* disable all irqs */
385 writel(0, &chip->regs[i]->rimsc);
386 writel(0, &chip->regs[i]->fimsc);
387 writel(~0, &chip->regs[i]->ic);
388 }
389 spin_lock_init(&chip->lock);
390 gsta_gpio_setup(chip);
391 if (gpio_pdata)
392 for (i = 0; i < GSTA_NR_GPIO; i++)
393 gsta_set_config(chip, i, gpio_pdata->pinconfig[i]);
394
395 /* 384 was used in previous code: be compatible for other drivers */
396 err = devm_irq_alloc_descs(&dev->dev, -1, 384,
397 GSTA_NR_GPIO, NUMA_NO_NODE);
398 if (err < 0) {
399 dev_warn(&dev->dev, "sta2x11 gpio: Can't get irq base (%i)\n",
400 -err);
401 return err;
402 }
403 chip->irq_base = err;
404
405 err = gsta_alloc_irq_chip(chip);
406 if (err)
407 return err;
408
409 err = devm_request_irq(&dev->dev, pdev->irq, gsta_gpio_handler,
410 IRQF_SHARED, KBUILD_MODNAME, chip);
411 if (err < 0) {
412 dev_err(&dev->dev, "sta2x11 gpio: Can't request irq (%i)\n",
413 -err);
414 return err;
415 }
416
417 err = devm_gpiochip_add_data(&dev->dev, &chip->gpio, chip);
418 if (err < 0) {
419 dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n",
420 -err);
421 return err;
422 }
423
424 platform_set_drvdata(dev, chip);
425 return 0;
426}
427
428static struct platform_driver sta2x11_gpio_platform_driver = {
429 .driver = {
430 .name = "sta2x11-gpio",
431 .suppress_bind_attrs = true,
432 },
433 .probe = gsta_probe,
434};
435builtin_platform_driver(sta2x11_gpio_platform_driver);
436

Warning: That file was not part of the compilation database. It may have many parsing errors.