1/*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#ifndef __AMDGPU_GEM_H__
24#define __AMDGPU_GEM_H__
25
26#include <drm/amdgpu_drm.h>
27#include <drm/drm_gem.h>
28
29/*
30 * GEM.
31 */
32
33#define AMDGPU_GEM_DOMAIN_MAX 0x3
34#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, gem_base)
35
36void amdgpu_gem_object_free(struct drm_gem_object *obj);
37int amdgpu_gem_object_open(struct drm_gem_object *obj,
38 struct drm_file *file_priv);
39void amdgpu_gem_object_close(struct drm_gem_object *obj,
40 struct drm_file *file_priv);
41unsigned long amdgpu_gem_timeout(uint64_t timeout_ns);
42struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
43struct drm_gem_object *
44amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
45 struct dma_buf_attachment *attach,
46 struct sg_table *sg);
47struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
48 struct drm_gem_object *gobj,
49 int flags);
50struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
51 struct dma_buf *dma_buf);
52struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
53void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
54void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
55int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
56
57extern const struct dma_buf_ops amdgpu_dmabuf_ops;
58
59/*
60 * GEM objects.
61 */
62void amdgpu_gem_force_release(struct amdgpu_device *adev);
63int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
64 int alignment, u32 initial_domain,
65 u64 flags, enum ttm_bo_type type,
66 struct reservation_object *resv,
67 struct drm_gem_object **obj);
68
69int amdgpu_mode_dumb_create(struct drm_file *file_priv,
70 struct drm_device *dev,
71 struct drm_mode_create_dumb *args);
72int amdgpu_mode_dumb_mmap(struct drm_file *filp,
73 struct drm_device *dev,
74 uint32_t handle, uint64_t *offset_p);
75
76int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
77 struct drm_file *filp);
78int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data,
79 struct drm_file *filp);
80int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
81 struct drm_file *filp);
82int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
83 struct drm_file *filp);
84int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
85 struct drm_file *filp);
86int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
87 struct drm_file *filp);
88int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
89 struct drm_file *filp);
90
91int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
92 struct drm_file *filp);
93
94#endif
95