1 | /* |
2 | * Copyright 2012-15 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: AMD |
23 | * |
24 | */ |
25 | |
26 | #ifndef __DAL_GRPH_OBJECT_ID_H__ |
27 | #define __DAL_GRPH_OBJECT_ID_H__ |
28 | |
29 | /* Types of graphics objects */ |
30 | enum object_type { |
31 | OBJECT_TYPE_UNKNOWN = 0, |
32 | |
33 | /* Direct ATOM BIOS translation */ |
34 | OBJECT_TYPE_GPU, |
35 | OBJECT_TYPE_ENCODER, |
36 | OBJECT_TYPE_CONNECTOR, |
37 | OBJECT_TYPE_ROUTER, |
38 | OBJECT_TYPE_GENERIC, |
39 | |
40 | /* Driver specific */ |
41 | OBJECT_TYPE_AUDIO, |
42 | OBJECT_TYPE_CONTROLLER, |
43 | OBJECT_TYPE_CLOCK_SOURCE, |
44 | OBJECT_TYPE_ENGINE, |
45 | |
46 | OBJECT_TYPE_COUNT |
47 | }; |
48 | |
49 | /* Enumeration inside one type of graphics objects */ |
50 | enum object_enum_id { |
51 | ENUM_ID_UNKNOWN = 0, |
52 | ENUM_ID_1, |
53 | ENUM_ID_2, |
54 | ENUM_ID_3, |
55 | ENUM_ID_4, |
56 | ENUM_ID_5, |
57 | ENUM_ID_6, |
58 | ENUM_ID_7, |
59 | |
60 | ENUM_ID_COUNT |
61 | }; |
62 | |
63 | /* Generic object ids */ |
64 | enum generic_id { |
65 | GENERIC_ID_UNKNOWN = 0, |
66 | GENERIC_ID_MXM_OPM, |
67 | GENERIC_ID_GLSYNC, |
68 | GENERIC_ID_STEREO, |
69 | |
70 | GENERIC_ID_COUNT |
71 | }; |
72 | |
73 | /* Controller object ids */ |
74 | enum controller_id { |
75 | CONTROLLER_ID_UNDEFINED = 0, |
76 | CONTROLLER_ID_D0, |
77 | CONTROLLER_ID_D1, |
78 | CONTROLLER_ID_D2, |
79 | CONTROLLER_ID_D3, |
80 | CONTROLLER_ID_D4, |
81 | CONTROLLER_ID_D5, |
82 | CONTROLLER_ID_UNDERLAY0, |
83 | CONTROLLER_ID_MAX = CONTROLLER_ID_UNDERLAY0 |
84 | }; |
85 | |
86 | #define IS_UNDERLAY_CONTROLLER(ctrlr_id) (ctrlr_id >= CONTROLLER_ID_UNDERLAY0) |
87 | |
88 | /* |
89 | * ClockSource object ids. |
90 | * We maintain the order matching (more or less) ATOM BIOS |
91 | * to improve optimized acquire |
92 | */ |
93 | enum clock_source_id { |
94 | CLOCK_SOURCE_ID_UNDEFINED = 0, |
95 | CLOCK_SOURCE_ID_PLL0, |
96 | CLOCK_SOURCE_ID_PLL1, |
97 | CLOCK_SOURCE_ID_PLL2, |
98 | CLOCK_SOURCE_ID_EXTERNAL, /* ID (Phy) ref. clk. for DP */ |
99 | CLOCK_SOURCE_ID_DCPLL, |
100 | CLOCK_SOURCE_ID_DFS, /* DENTIST */ |
101 | CLOCK_SOURCE_ID_VCE, /* VCE does not need a real PLL */ |
102 | /* Used to distinguish between programming pixel clock and ID (Phy) clock */ |
103 | CLOCK_SOURCE_ID_DP_DTO, |
104 | |
105 | CLOCK_SOURCE_COMBO_PHY_PLL0, /*combo PHY PLL defines (DC 11.2 and up)*/ |
106 | CLOCK_SOURCE_COMBO_PHY_PLL1, |
107 | CLOCK_SOURCE_COMBO_PHY_PLL2, |
108 | CLOCK_SOURCE_COMBO_PHY_PLL3, |
109 | CLOCK_SOURCE_COMBO_PHY_PLL4, |
110 | CLOCK_SOURCE_COMBO_PHY_PLL5, |
111 | CLOCK_SOURCE_COMBO_DISPLAY_PLL0 |
112 | }; |
113 | |
114 | /* Encoder object ids */ |
115 | enum encoder_id { |
116 | ENCODER_ID_UNKNOWN = 0, |
117 | |
118 | /* Radeon Class Display Hardware */ |
119 | ENCODER_ID_INTERNAL_LVDS, |
120 | ENCODER_ID_INTERNAL_TMDS1, |
121 | ENCODER_ID_INTERNAL_TMDS2, |
122 | ENCODER_ID_INTERNAL_DAC1, |
123 | ENCODER_ID_INTERNAL_DAC2, /* TV/CV DAC */ |
124 | |
125 | /* External Third Party Encoders */ |
126 | ENCODER_ID_INTERNAL_LVTM1, /* not used for Radeon */ |
127 | ENCODER_ID_INTERNAL_HDMI, |
128 | |
129 | /* Kaledisope (KLDSCP) Class Display Hardware */ |
130 | ENCODER_ID_INTERNAL_KLDSCP_TMDS1, |
131 | ENCODER_ID_INTERNAL_KLDSCP_DAC1, |
132 | ENCODER_ID_INTERNAL_KLDSCP_DAC2, /* Shared with CV/TV and CRT */ |
133 | /* External TMDS (dual link) */ |
134 | ENCODER_ID_EXTERNAL_MVPU_FPGA, /* MVPU FPGA chip */ |
135 | ENCODER_ID_INTERNAL_DDI, |
136 | ENCODER_ID_INTERNAL_UNIPHY, |
137 | ENCODER_ID_INTERNAL_KLDSCP_LVTMA, |
138 | ENCODER_ID_INTERNAL_UNIPHY1, |
139 | ENCODER_ID_INTERNAL_UNIPHY2, |
140 | ENCODER_ID_EXTERNAL_NUTMEG, |
141 | ENCODER_ID_EXTERNAL_TRAVIS, |
142 | |
143 | ENCODER_ID_INTERNAL_WIRELESS, /* Internal wireless display encoder */ |
144 | ENCODER_ID_INTERNAL_UNIPHY3, |
145 | ENCODER_ID_INTERNAL_VIRTUAL, |
146 | }; |
147 | |
148 | /* Connector object ids */ |
149 | enum connector_id { |
150 | CONNECTOR_ID_UNKNOWN = 0, |
151 | CONNECTOR_ID_SINGLE_LINK_DVII = 1, |
152 | CONNECTOR_ID_DUAL_LINK_DVII = 2, |
153 | CONNECTOR_ID_SINGLE_LINK_DVID = 3, |
154 | CONNECTOR_ID_DUAL_LINK_DVID = 4, |
155 | CONNECTOR_ID_VGA = 5, |
156 | CONNECTOR_ID_HDMI_TYPE_A = 12, |
157 | CONNECTOR_ID_LVDS = 14, |
158 | CONNECTOR_ID_PCIE = 16, |
159 | CONNECTOR_ID_HARDCODE_DVI = 18, |
160 | CONNECTOR_ID_DISPLAY_PORT = 19, |
161 | CONNECTOR_ID_EDP = 20, |
162 | CONNECTOR_ID_MXM = 21, |
163 | CONNECTOR_ID_WIRELESS = 22, |
164 | CONNECTOR_ID_MIRACAST = 23, |
165 | CONNECTOR_ID_USBC = 24, |
166 | |
167 | CONNECTOR_ID_VIRTUAL = 100 |
168 | }; |
169 | |
170 | /* Audio object ids */ |
171 | enum audio_id { |
172 | AUDIO_ID_UNKNOWN = 0, |
173 | AUDIO_ID_INTERNAL_AZALIA |
174 | }; |
175 | |
176 | /* Engine object ids */ |
177 | enum engine_id { |
178 | ENGINE_ID_DIGA, |
179 | ENGINE_ID_DIGB, |
180 | ENGINE_ID_DIGC, |
181 | ENGINE_ID_DIGD, |
182 | ENGINE_ID_DIGE, |
183 | ENGINE_ID_DIGF, |
184 | ENGINE_ID_DIGG, |
185 | ENGINE_ID_DACA, |
186 | ENGINE_ID_DACB, |
187 | ENGINE_ID_VCE, /* wireless display pseudo-encoder */ |
188 | ENGINE_ID_HPO_0, |
189 | ENGINE_ID_HPO_1, |
190 | ENGINE_ID_HPO_DP_0, |
191 | ENGINE_ID_HPO_DP_1, |
192 | ENGINE_ID_HPO_DP_2, |
193 | ENGINE_ID_HPO_DP_3, |
194 | ENGINE_ID_VIRTUAL, |
195 | |
196 | ENGINE_ID_COUNT, |
197 | ENGINE_ID_UNKNOWN = (-1L) |
198 | }; |
199 | |
200 | enum transmitter_color_depth { |
201 | TRANSMITTER_COLOR_DEPTH_24 = 0, /* 8 bits */ |
202 | TRANSMITTER_COLOR_DEPTH_30, /* 10 bits */ |
203 | TRANSMITTER_COLOR_DEPTH_36, /* 12 bits */ |
204 | TRANSMITTER_COLOR_DEPTH_48 /* 16 bits */ |
205 | }; |
206 | |
207 | enum dp_alt_mode { |
208 | DP_Alt_mode__Unknown = 0, |
209 | DP_Alt_mode__Connect, |
210 | DP_Alt_mode__NoConnect, |
211 | }; |
212 | /* |
213 | ***************************************************************************** |
214 | * graphics_object_id struct |
215 | * |
216 | * graphics_object_id is a very simple struct wrapping 32bit Graphics |
217 | * Object identication |
218 | * |
219 | * This struct should stay very simple |
220 | * No dependencies at all (no includes) |
221 | * No debug messages or asserts |
222 | * No #ifndef and preprocessor directives |
223 | * No grow in space (no more data member) |
224 | ***************************************************************************** |
225 | */ |
226 | |
227 | struct graphics_object_id { |
228 | uint32_t id:8; |
229 | uint32_t enum_id:4; |
230 | uint32_t type:4; |
231 | uint32_t reserved:16; /* for padding. total size should be u32 */ |
232 | }; |
233 | |
234 | /* some simple functions for convenient graphics_object_id handle */ |
235 | |
236 | static inline struct graphics_object_id dal_graphics_object_id_init( |
237 | uint32_t id, |
238 | enum object_enum_id enum_id, |
239 | enum object_type type) |
240 | { |
241 | struct graphics_object_id result = { |
242 | id, enum_id, type, 0 |
243 | }; |
244 | |
245 | return result; |
246 | } |
247 | |
248 | /* Based on internal data members memory layout */ |
249 | static inline uint32_t dal_graphics_object_id_to_uint( |
250 | struct graphics_object_id id) |
251 | { |
252 | return id.id + (id.enum_id << 0x8) + (id.type << 0xc); |
253 | } |
254 | |
255 | static inline enum controller_id dal_graphics_object_id_get_controller_id( |
256 | struct graphics_object_id id) |
257 | { |
258 | if (id.type == OBJECT_TYPE_CONTROLLER) |
259 | return (enum controller_id) id.id; |
260 | return CONTROLLER_ID_UNDEFINED; |
261 | } |
262 | |
263 | static inline enum clock_source_id dal_graphics_object_id_get_clock_source_id( |
264 | struct graphics_object_id id) |
265 | { |
266 | if (id.type == OBJECT_TYPE_CLOCK_SOURCE) |
267 | return (enum clock_source_id) id.id; |
268 | return CLOCK_SOURCE_ID_UNDEFINED; |
269 | } |
270 | |
271 | static inline enum encoder_id dal_graphics_object_id_get_encoder_id( |
272 | struct graphics_object_id id) |
273 | { |
274 | if (id.type == OBJECT_TYPE_ENCODER) |
275 | return (enum encoder_id) id.id; |
276 | return ENCODER_ID_UNKNOWN; |
277 | } |
278 | |
279 | static inline enum connector_id dal_graphics_object_id_get_connector_id( |
280 | struct graphics_object_id id) |
281 | { |
282 | if (id.type == OBJECT_TYPE_CONNECTOR) |
283 | return (enum connector_id) id.id; |
284 | return CONNECTOR_ID_UNKNOWN; |
285 | } |
286 | |
287 | static inline enum audio_id dal_graphics_object_id_get_audio_id( |
288 | struct graphics_object_id id) |
289 | { |
290 | if (id.type == OBJECT_TYPE_AUDIO) |
291 | return (enum audio_id) id.id; |
292 | return AUDIO_ID_UNKNOWN; |
293 | } |
294 | |
295 | static inline enum engine_id dal_graphics_object_id_get_engine_id( |
296 | struct graphics_object_id id) |
297 | { |
298 | if (id.type == OBJECT_TYPE_ENGINE) |
299 | return (enum engine_id) id.id; |
300 | return ENGINE_ID_UNKNOWN; |
301 | } |
302 | |
303 | static inline bool dal_graphics_object_id_equal( |
304 | struct graphics_object_id id_1, |
305 | struct graphics_object_id id_2) |
306 | { |
307 | if ((id_1.id == id_2.id) && (id_1.enum_id == id_2.enum_id) && |
308 | (id_1.type == id_2.type)) { |
309 | return true; |
310 | } |
311 | return false; |
312 | } |
313 | #endif |
314 | |