1/* SPDX-License-Identifier: MIT */
2#ifndef __NOUVEAU_BO_H__
3#define __NOUVEAU_BO_H__
4#include <drm/drm_gem.h>
5#include <drm/ttm/ttm_bo.h>
6#include <drm/ttm/ttm_placement.h>
7
8struct nouveau_channel;
9struct nouveau_cli;
10struct nouveau_drm;
11struct nouveau_fence;
12
13struct nouveau_bo {
14 struct ttm_buffer_object bo;
15 struct ttm_placement placement;
16 u32 valid_domains;
17 struct ttm_place placements[3];
18 struct ttm_place busy_placements[3];
19 bool force_coherent;
20 struct ttm_bo_kmap_obj kmap;
21 struct list_head head;
22 struct list_head io_reserve_lru;
23
24 /* protected by ttm_bo_reserve() */
25 struct drm_file *reserved_by;
26 struct list_head entry;
27 int pbbo_index;
28 bool validate_mapped;
29 bool no_share;
30
31 /* GPU address space is independent of CPU word size */
32 uint64_t offset;
33
34 struct list_head vma_list;
35
36 unsigned contig:1;
37 unsigned page:5;
38 unsigned kind:8;
39 unsigned comp:3;
40 unsigned zeta:3;
41 unsigned mode;
42
43 struct nouveau_drm_tile *tile;
44};
45
46static inline struct nouveau_bo *
47nouveau_bo(struct ttm_buffer_object *bo)
48{
49 return container_of(bo, struct nouveau_bo, bo);
50}
51
52static inline int
53nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pnvbo)
54{
55 struct nouveau_bo *prev;
56
57 if (!pnvbo)
58 return -EINVAL;
59 prev = *pnvbo;
60
61 if (ref) {
62 ttm_bo_get(bo: &ref->bo);
63 *pnvbo = nouveau_bo(bo: &ref->bo);
64 } else {
65 *pnvbo = NULL;
66 }
67 if (prev)
68 ttm_bo_put(bo: &prev->bo);
69
70 return 0;
71}
72
73extern struct ttm_device_funcs nouveau_bo_driver;
74
75void nouveau_bo_move_init(struct nouveau_drm *);
76struct nouveau_bo *nouveau_bo_alloc(struct nouveau_cli *, u64 *size, int *align,
77 u32 domain, u32 tile_mode, u32 tile_flags, bool internal);
78int nouveau_bo_init(struct nouveau_bo *, u64 size, int align, u32 domain,
79 struct sg_table *sg, struct dma_resv *robj);
80int nouveau_bo_new(struct nouveau_cli *, u64 size, int align, u32 domain,
81 u32 tile_mode, u32 tile_flags, struct sg_table *sg,
82 struct dma_resv *robj,
83 struct nouveau_bo **);
84int nouveau_bo_pin(struct nouveau_bo *, u32 flags, bool contig);
85int nouveau_bo_unpin(struct nouveau_bo *);
86int nouveau_bo_map(struct nouveau_bo *);
87void nouveau_bo_unmap(struct nouveau_bo *);
88void nouveau_bo_placement_set(struct nouveau_bo *, u32 type, u32 busy);
89void nouveau_bo_wr16(struct nouveau_bo *, unsigned index, u16 val);
90u32 nouveau_bo_rd32(struct nouveau_bo *, unsigned index);
91void nouveau_bo_wr32(struct nouveau_bo *, unsigned index, u32 val);
92vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo);
93void nouveau_bo_fence(struct nouveau_bo *, struct nouveau_fence *, bool exclusive);
94int nouveau_bo_validate(struct nouveau_bo *, bool interruptible,
95 bool no_wait_gpu);
96void nouveau_bo_sync_for_device(struct nouveau_bo *nvbo);
97void nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo);
98void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo);
99void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo);
100
101/* TODO: submit equivalent to TTM generic API upstream? */
102static inline void __iomem *
103nvbo_kmap_obj_iovirtual(struct nouveau_bo *nvbo)
104{
105 bool is_iomem;
106 void __iomem *ioptr = (void __force __iomem *)ttm_kmap_obj_virtual(
107 map: &nvbo->kmap, is_iomem: &is_iomem);
108 WARN_ON_ONCE(ioptr && !is_iomem);
109 return ioptr;
110}
111
112static inline void
113nouveau_bo_unmap_unpin_unref(struct nouveau_bo **pnvbo)
114{
115 if (*pnvbo) {
116 nouveau_bo_unmap(*pnvbo);
117 nouveau_bo_unpin(*pnvbo);
118 nouveau_bo_ref(NULL, pnvbo);
119 }
120}
121
122static inline int
123nouveau_bo_new_pin_map(struct nouveau_cli *cli, u64 size, int align, u32 domain,
124 struct nouveau_bo **pnvbo)
125{
126 int ret = nouveau_bo_new(cli, size, align, domain,
127 tile_mode: 0, tile_flags: 0, NULL, NULL, pnvbo);
128 if (ret == 0) {
129 ret = nouveau_bo_pin(*pnvbo, flags: domain, contig: true);
130 if (ret == 0) {
131 ret = nouveau_bo_map(*pnvbo);
132 if (ret == 0)
133 return ret;
134 nouveau_bo_unpin(*pnvbo);
135 }
136 nouveau_bo_ref(NULL, pnvbo);
137 }
138 return ret;
139}
140
141int nv04_bo_move_init(struct nouveau_channel *, u32);
142int nv04_bo_move_m2mf(struct nouveau_channel *, struct ttm_buffer_object *,
143 struct ttm_resource *, struct ttm_resource *);
144
145int nv50_bo_move_init(struct nouveau_channel *, u32);
146int nv50_bo_move_m2mf(struct nouveau_channel *, struct ttm_buffer_object *,
147 struct ttm_resource *, struct ttm_resource *);
148
149int nv84_bo_move_exec(struct nouveau_channel *, struct ttm_buffer_object *,
150 struct ttm_resource *, struct ttm_resource *);
151
152int nva3_bo_move_copy(struct nouveau_channel *, struct ttm_buffer_object *,
153 struct ttm_resource *, struct ttm_resource *);
154
155int nvc0_bo_move_init(struct nouveau_channel *, u32);
156int nvc0_bo_move_m2mf(struct nouveau_channel *, struct ttm_buffer_object *,
157 struct ttm_resource *, struct ttm_resource *);
158
159int nvc0_bo_move_copy(struct nouveau_channel *, struct ttm_buffer_object *,
160 struct ttm_resource *, struct ttm_resource *);
161
162int nve0_bo_move_init(struct nouveau_channel *, u32);
163int nve0_bo_move_copy(struct nouveau_channel *, struct ttm_buffer_object *,
164 struct ttm_resource *, struct ttm_resource *);
165
166#define NVBO_WR32_(b,o,dr,f) nouveau_bo_wr32((b), (o)/4 + (dr), (f))
167#define NVBO_RD32_(b,o,dr) nouveau_bo_rd32((b), (o)/4 + (dr))
168#define NVBO_RD32(A...) DRF_RD(NVBO_RD32_, ##A)
169#define NVBO_RV32(A...) DRF_RV(NVBO_RD32_, ##A)
170#define NVBO_TV32(A...) DRF_TV(NVBO_RD32_, ##A)
171#define NVBO_TD32(A...) DRF_TD(NVBO_RD32_, ##A)
172#define NVBO_WR32(A...) DRF_WR( NVBO_WR32_, ##A)
173#define NVBO_WV32(A...) DRF_WV( NVBO_WR32_, ##A)
174#define NVBO_WD32(A...) DRF_WD( NVBO_WR32_, ##A)
175#define NVBO_MR32(A...) DRF_MR(NVBO_RD32_, NVBO_WR32_, u32, ##A)
176#define NVBO_MV32(A...) DRF_MV(NVBO_RD32_, NVBO_WR32_, u32, ##A)
177#define NVBO_MD32(A...) DRF_MD(NVBO_RD32_, NVBO_WR32_, u32, ##A)
178#endif
179

source code of linux/drivers/gpu/drm/nouveau/nouveau_bo.h