1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25#include <linux/module.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28#include <asm/unaligned.h>
29
30#include <drm/drm_util.h>
31
32#define ATOM_DEBUG
33
34#include "atom.h"
35#include "atom-names.h"
36#include "atom-bits.h"
37#include "radeon.h"
38
39#define ATOM_COND_ABOVE 0
40#define ATOM_COND_ABOVEOREQUAL 1
41#define ATOM_COND_ALWAYS 2
42#define ATOM_COND_BELOW 3
43#define ATOM_COND_BELOWOREQUAL 4
44#define ATOM_COND_EQUAL 5
45#define ATOM_COND_NOTEQUAL 6
46
47#define ATOM_PORT_ATI 0
48#define ATOM_PORT_PCI 1
49#define ATOM_PORT_SYSIO 2
50
51#define ATOM_UNIT_MICROSEC 0
52#define ATOM_UNIT_MILLISEC 1
53
54#define PLL_INDEX 2
55#define PLL_DATA 3
56
57typedef struct {
58 struct atom_context *ctx;
59 uint32_t *ps, *ws;
60 int ps_shift;
61 uint16_t start;
62 unsigned last_jump;
63 unsigned long last_jump_jiffies;
64 bool abort;
65} atom_exec_context;
66
67int atom_debug = 0;
68static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
69int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
70
71static uint32_t atom_arg_mask[8] = {
72 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
73 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
74};
75static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
76
77static int atom_dst_to_src[8][4] = {
78 /* translate destination alignment field to the source alignment encoding */
79 {0, 0, 0, 0},
80 {1, 2, 3, 0},
81 {1, 2, 3, 0},
82 {1, 2, 3, 0},
83 {4, 5, 6, 7},
84 {4, 5, 6, 7},
85 {4, 5, 6, 7},
86 {4, 5, 6, 7},
87};
88static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
89
90static int debug_depth = 0;
91#ifdef ATOM_DEBUG
92static void debug_print_spaces(int n)
93{
94 while (n--)
95 printk(" ");
96}
97
98#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
99#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
100#else
101#define DEBUG(...) do { } while (0)
102#define SDEBUG(...) do { } while (0)
103#endif
104
105static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
106 uint32_t index, uint32_t data)
107{
108 struct radeon_device *rdev = ctx->card->dev->dev_private;
109 uint32_t temp = 0xCDCDCDCD;
110
111 while (1)
112 switch (CU8(base)) {
113 case ATOM_IIO_NOP:
114 base++;
115 break;
116 case ATOM_IIO_READ:
117 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
118 base += 3;
119 break;
120 case ATOM_IIO_WRITE:
121 if (rdev->family == CHIP_RV515)
122 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
123 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
124 base += 3;
125 break;
126 case ATOM_IIO_CLEAR:
127 temp &=
128 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
129 CU8(base + 2));
130 base += 3;
131 break;
132 case ATOM_IIO_SET:
133 temp |=
134 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
135 2);
136 base += 3;
137 break;
138 case ATOM_IIO_MOVE_INDEX:
139 temp &=
140 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
141 CU8(base + 3));
142 temp |=
143 ((index >> CU8(base + 2)) &
144 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
145 3);
146 base += 4;
147 break;
148 case ATOM_IIO_MOVE_DATA:
149 temp &=
150 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
151 CU8(base + 3));
152 temp |=
153 ((data >> CU8(base + 2)) &
154 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
155 3);
156 base += 4;
157 break;
158 case ATOM_IIO_MOVE_ATTR:
159 temp &=
160 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
161 CU8(base + 3));
162 temp |=
163 ((ctx->
164 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
165 CU8
166 (base
167 +
168 1))))
169 << CU8(base + 3);
170 base += 4;
171 break;
172 case ATOM_IIO_END:
173 return temp;
174 default:
175 pr_info("Unknown IIO opcode\n");
176 return 0;
177 }
178}
179
180static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
181 int *ptr, uint32_t *saved, int print)
182{
183 uint32_t idx, val = 0xCDCDCDCD, align, arg;
184 struct atom_context *gctx = ctx->ctx;
185 arg = attr & 7;
186 align = (attr >> 3) & 7;
187 switch (arg) {
188 case ATOM_ARG_REG:
189 idx = U16(*ptr);
190 (*ptr) += 2;
191 if (print)
192 DEBUG("REG[0x%04X]", idx);
193 idx += gctx->reg_block;
194 switch (gctx->io_mode) {
195 case ATOM_IO_MM:
196 val = gctx->card->reg_read(gctx->card, idx);
197 break;
198 case ATOM_IO_PCI:
199 pr_info("PCI registers are not implemented\n");
200 return 0;
201 case ATOM_IO_SYSIO:
202 pr_info("SYSIO registers are not implemented\n");
203 return 0;
204 default:
205 if (!(gctx->io_mode & 0x80)) {
206 pr_info("Bad IO mode\n");
207 return 0;
208 }
209 if (!gctx->iio[gctx->io_mode & 0x7F]) {
210 pr_info("Undefined indirect IO read method %d\n",
211 gctx->io_mode & 0x7F);
212 return 0;
213 }
214 val =
215 atom_iio_execute(gctx,
216 gctx->iio[gctx->io_mode & 0x7F],
217 idx, 0);
218 }
219 break;
220 case ATOM_ARG_PS:
221 idx = U8(*ptr);
222 (*ptr)++;
223 /* get_unaligned_le32 avoids unaligned accesses from atombios
224 * tables, noticed on a DEC Alpha. */
225 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
226 if (print)
227 DEBUG("PS[0x%02X,0x%04X]", idx, val);
228 break;
229 case ATOM_ARG_WS:
230 idx = U8(*ptr);
231 (*ptr)++;
232 if (print)
233 DEBUG("WS[0x%02X]", idx);
234 switch (idx) {
235 case ATOM_WS_QUOTIENT:
236 val = gctx->divmul[0];
237 break;
238 case ATOM_WS_REMAINDER:
239 val = gctx->divmul[1];
240 break;
241 case ATOM_WS_DATAPTR:
242 val = gctx->data_block;
243 break;
244 case ATOM_WS_SHIFT:
245 val = gctx->shift;
246 break;
247 case ATOM_WS_OR_MASK:
248 val = 1 << gctx->shift;
249 break;
250 case ATOM_WS_AND_MASK:
251 val = ~(1 << gctx->shift);
252 break;
253 case ATOM_WS_FB_WINDOW:
254 val = gctx->fb_base;
255 break;
256 case ATOM_WS_ATTRIBUTES:
257 val = gctx->io_attr;
258 break;
259 case ATOM_WS_REGPTR:
260 val = gctx->reg_block;
261 break;
262 default:
263 val = ctx->ws[idx];
264 }
265 break;
266 case ATOM_ARG_ID:
267 idx = U16(*ptr);
268 (*ptr) += 2;
269 if (print) {
270 if (gctx->data_block)
271 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
272 else
273 DEBUG("ID[0x%04X]", idx);
274 }
275 val = U32(idx + gctx->data_block);
276 break;
277 case ATOM_ARG_FB:
278 idx = U8(*ptr);
279 (*ptr)++;
280 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
281 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
282 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
283 val = 0;
284 } else
285 val = gctx->scratch[(gctx->fb_base / 4) + idx];
286 if (print)
287 DEBUG("FB[0x%02X]", idx);
288 break;
289 case ATOM_ARG_IMM:
290 switch (align) {
291 case ATOM_SRC_DWORD:
292 val = U32(*ptr);
293 (*ptr) += 4;
294 if (print)
295 DEBUG("IMM 0x%08X\n", val);
296 return val;
297 case ATOM_SRC_WORD0:
298 case ATOM_SRC_WORD8:
299 case ATOM_SRC_WORD16:
300 val = U16(*ptr);
301 (*ptr) += 2;
302 if (print)
303 DEBUG("IMM 0x%04X\n", val);
304 return val;
305 case ATOM_SRC_BYTE0:
306 case ATOM_SRC_BYTE8:
307 case ATOM_SRC_BYTE16:
308 case ATOM_SRC_BYTE24:
309 val = U8(*ptr);
310 (*ptr)++;
311 if (print)
312 DEBUG("IMM 0x%02X\n", val);
313 return val;
314 }
315 return 0;
316 case ATOM_ARG_PLL:
317 idx = U8(*ptr);
318 (*ptr)++;
319 if (print)
320 DEBUG("PLL[0x%02X]", idx);
321 val = gctx->card->pll_read(gctx->card, idx);
322 break;
323 case ATOM_ARG_MC:
324 idx = U8(*ptr);
325 (*ptr)++;
326 if (print)
327 DEBUG("MC[0x%02X]", idx);
328 val = gctx->card->mc_read(gctx->card, idx);
329 break;
330 }
331 if (saved)
332 *saved = val;
333 val &= atom_arg_mask[align];
334 val >>= atom_arg_shift[align];
335 if (print)
336 switch (align) {
337 case ATOM_SRC_DWORD:
338 DEBUG(".[31:0] -> 0x%08X\n", val);
339 break;
340 case ATOM_SRC_WORD0:
341 DEBUG(".[15:0] -> 0x%04X\n", val);
342 break;
343 case ATOM_SRC_WORD8:
344 DEBUG(".[23:8] -> 0x%04X\n", val);
345 break;
346 case ATOM_SRC_WORD16:
347 DEBUG(".[31:16] -> 0x%04X\n", val);
348 break;
349 case ATOM_SRC_BYTE0:
350 DEBUG(".[7:0] -> 0x%02X\n", val);
351 break;
352 case ATOM_SRC_BYTE8:
353 DEBUG(".[15:8] -> 0x%02X\n", val);
354 break;
355 case ATOM_SRC_BYTE16:
356 DEBUG(".[23:16] -> 0x%02X\n", val);
357 break;
358 case ATOM_SRC_BYTE24:
359 DEBUG(".[31:24] -> 0x%02X\n", val);
360 break;
361 }
362 return val;
363}
364
365static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
366{
367 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
368 switch (arg) {
369 case ATOM_ARG_REG:
370 case ATOM_ARG_ID:
371 (*ptr) += 2;
372 break;
373 case ATOM_ARG_PLL:
374 case ATOM_ARG_MC:
375 case ATOM_ARG_PS:
376 case ATOM_ARG_WS:
377 case ATOM_ARG_FB:
378 (*ptr)++;
379 break;
380 case ATOM_ARG_IMM:
381 switch (align) {
382 case ATOM_SRC_DWORD:
383 (*ptr) += 4;
384 return;
385 case ATOM_SRC_WORD0:
386 case ATOM_SRC_WORD8:
387 case ATOM_SRC_WORD16:
388 (*ptr) += 2;
389 return;
390 case ATOM_SRC_BYTE0:
391 case ATOM_SRC_BYTE8:
392 case ATOM_SRC_BYTE16:
393 case ATOM_SRC_BYTE24:
394 (*ptr)++;
395 return;
396 }
397 return;
398 }
399}
400
401static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
402{
403 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
404}
405
406static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
407{
408 uint32_t val = 0xCDCDCDCD;
409
410 switch (align) {
411 case ATOM_SRC_DWORD:
412 val = U32(*ptr);
413 (*ptr) += 4;
414 break;
415 case ATOM_SRC_WORD0:
416 case ATOM_SRC_WORD8:
417 case ATOM_SRC_WORD16:
418 val = U16(*ptr);
419 (*ptr) += 2;
420 break;
421 case ATOM_SRC_BYTE0:
422 case ATOM_SRC_BYTE8:
423 case ATOM_SRC_BYTE16:
424 case ATOM_SRC_BYTE24:
425 val = U8(*ptr);
426 (*ptr)++;
427 break;
428 }
429 return val;
430}
431
432static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
433 int *ptr, uint32_t *saved, int print)
434{
435 return atom_get_src_int(ctx,
436 arg | atom_dst_to_src[(attr >> 3) &
437 7][(attr >> 6) & 3] << 3,
438 ptr, saved, print);
439}
440
441static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
442{
443 atom_skip_src_int(ctx,
444 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
445 3] << 3, ptr);
446}
447
448static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
449 int *ptr, uint32_t val, uint32_t saved)
450{
451 uint32_t align =
452 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
453 val, idx;
454 struct atom_context *gctx = ctx->ctx;
455 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
456 val <<= atom_arg_shift[align];
457 val &= atom_arg_mask[align];
458 saved &= ~atom_arg_mask[align];
459 val |= saved;
460 switch (arg) {
461 case ATOM_ARG_REG:
462 idx = U16(*ptr);
463 (*ptr) += 2;
464 DEBUG("REG[0x%04X]", idx);
465 idx += gctx->reg_block;
466 switch (gctx->io_mode) {
467 case ATOM_IO_MM:
468 if (idx == 0)
469 gctx->card->reg_write(gctx->card, idx,
470 val << 2);
471 else
472 gctx->card->reg_write(gctx->card, idx, val);
473 break;
474 case ATOM_IO_PCI:
475 pr_info("PCI registers are not implemented\n");
476 return;
477 case ATOM_IO_SYSIO:
478 pr_info("SYSIO registers are not implemented\n");
479 return;
480 default:
481 if (!(gctx->io_mode & 0x80)) {
482 pr_info("Bad IO mode\n");
483 return;
484 }
485 if (!gctx->iio[gctx->io_mode & 0xFF]) {
486 pr_info("Undefined indirect IO write method %d\n",
487 gctx->io_mode & 0x7F);
488 return;
489 }
490 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
491 idx, val);
492 }
493 break;
494 case ATOM_ARG_PS:
495 idx = U8(*ptr);
496 (*ptr)++;
497 DEBUG("PS[0x%02X]", idx);
498 ctx->ps[idx] = cpu_to_le32(val);
499 break;
500 case ATOM_ARG_WS:
501 idx = U8(*ptr);
502 (*ptr)++;
503 DEBUG("WS[0x%02X]", idx);
504 switch (idx) {
505 case ATOM_WS_QUOTIENT:
506 gctx->divmul[0] = val;
507 break;
508 case ATOM_WS_REMAINDER:
509 gctx->divmul[1] = val;
510 break;
511 case ATOM_WS_DATAPTR:
512 gctx->data_block = val;
513 break;
514 case ATOM_WS_SHIFT:
515 gctx->shift = val;
516 break;
517 case ATOM_WS_OR_MASK:
518 case ATOM_WS_AND_MASK:
519 break;
520 case ATOM_WS_FB_WINDOW:
521 gctx->fb_base = val;
522 break;
523 case ATOM_WS_ATTRIBUTES:
524 gctx->io_attr = val;
525 break;
526 case ATOM_WS_REGPTR:
527 gctx->reg_block = val;
528 break;
529 default:
530 ctx->ws[idx] = val;
531 }
532 break;
533 case ATOM_ARG_FB:
534 idx = U8(*ptr);
535 (*ptr)++;
536 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
537 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
538 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
539 } else
540 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
541 DEBUG("FB[0x%02X]", idx);
542 break;
543 case ATOM_ARG_PLL:
544 idx = U8(*ptr);
545 (*ptr)++;
546 DEBUG("PLL[0x%02X]", idx);
547 gctx->card->pll_write(gctx->card, idx, val);
548 break;
549 case ATOM_ARG_MC:
550 idx = U8(*ptr);
551 (*ptr)++;
552 DEBUG("MC[0x%02X]", idx);
553 gctx->card->mc_write(gctx->card, idx, val);
554 return;
555 }
556 switch (align) {
557 case ATOM_SRC_DWORD:
558 DEBUG(".[31:0] <- 0x%08X\n", old_val);
559 break;
560 case ATOM_SRC_WORD0:
561 DEBUG(".[15:0] <- 0x%04X\n", old_val);
562 break;
563 case ATOM_SRC_WORD8:
564 DEBUG(".[23:8] <- 0x%04X\n", old_val);
565 break;
566 case ATOM_SRC_WORD16:
567 DEBUG(".[31:16] <- 0x%04X\n", old_val);
568 break;
569 case ATOM_SRC_BYTE0:
570 DEBUG(".[7:0] <- 0x%02X\n", old_val);
571 break;
572 case ATOM_SRC_BYTE8:
573 DEBUG(".[15:8] <- 0x%02X\n", old_val);
574 break;
575 case ATOM_SRC_BYTE16:
576 DEBUG(".[23:16] <- 0x%02X\n", old_val);
577 break;
578 case ATOM_SRC_BYTE24:
579 DEBUG(".[31:24] <- 0x%02X\n", old_val);
580 break;
581 }
582}
583
584static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
585{
586 uint8_t attr = U8((*ptr)++);
587 uint32_t dst, src, saved;
588 int dptr = *ptr;
589 SDEBUG(" dst: ");
590 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
591 SDEBUG(" src: ");
592 src = atom_get_src(ctx, attr, ptr);
593 dst += src;
594 SDEBUG(" dst: ");
595 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
596}
597
598static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
599{
600 uint8_t attr = U8((*ptr)++);
601 uint32_t dst, src, saved;
602 int dptr = *ptr;
603 SDEBUG(" dst: ");
604 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
605 SDEBUG(" src: ");
606 src = atom_get_src(ctx, attr, ptr);
607 dst &= src;
608 SDEBUG(" dst: ");
609 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
610}
611
612static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
613{
614 printk("ATOM BIOS beeped!\n");
615}
616
617static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
618{
619 int idx = U8((*ptr)++);
620 int r = 0;
621
622 if (idx < ATOM_TABLE_NAMES_CNT)
623 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
624 else
625 SDEBUG(" table: %d\n", idx);
626 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
627 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
628 if (r) {
629 ctx->abort = true;
630 }
631}
632
633static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
634{
635 uint8_t attr = U8((*ptr)++);
636 uint32_t saved;
637 int dptr = *ptr;
638 attr &= 0x38;
639 attr |= atom_def_dst[attr >> 3] << 6;
640 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
641 SDEBUG(" dst: ");
642 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
643}
644
645static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
646{
647 uint8_t attr = U8((*ptr)++);
648 uint32_t dst, src;
649 SDEBUG(" src1: ");
650 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
651 SDEBUG(" src2: ");
652 src = atom_get_src(ctx, attr, ptr);
653 ctx->ctx->cs_equal = (dst == src);
654 ctx->ctx->cs_above = (dst > src);
655 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
656 ctx->ctx->cs_above ? "GT" : "LE");
657}
658
659static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
660{
661 unsigned count = U8((*ptr)++);
662 SDEBUG(" count: %d\n", count);
663 if (arg == ATOM_UNIT_MICROSEC)
664 udelay(count);
665 else if (!drm_can_sleep())
666 mdelay(count);
667 else
668 msleep(count);
669}
670
671static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
672{
673 uint8_t attr = U8((*ptr)++);
674 uint32_t dst, src;
675 SDEBUG(" src1: ");
676 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
677 SDEBUG(" src2: ");
678 src = atom_get_src(ctx, attr, ptr);
679 if (src != 0) {
680 ctx->ctx->divmul[0] = dst / src;
681 ctx->ctx->divmul[1] = dst % src;
682 } else {
683 ctx->ctx->divmul[0] = 0;
684 ctx->ctx->divmul[1] = 0;
685 }
686}
687
688static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
689{
690 /* functionally, a nop */
691}
692
693static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
694{
695 int execute = 0, target = U16(*ptr);
696 unsigned long cjiffies;
697
698 (*ptr) += 2;
699 switch (arg) {
700 case ATOM_COND_ABOVE:
701 execute = ctx->ctx->cs_above;
702 break;
703 case ATOM_COND_ABOVEOREQUAL:
704 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
705 break;
706 case ATOM_COND_ALWAYS:
707 execute = 1;
708 break;
709 case ATOM_COND_BELOW:
710 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
711 break;
712 case ATOM_COND_BELOWOREQUAL:
713 execute = !ctx->ctx->cs_above;
714 break;
715 case ATOM_COND_EQUAL:
716 execute = ctx->ctx->cs_equal;
717 break;
718 case ATOM_COND_NOTEQUAL:
719 execute = !ctx->ctx->cs_equal;
720 break;
721 }
722 if (arg != ATOM_COND_ALWAYS)
723 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
724 SDEBUG(" target: 0x%04X\n", target);
725 if (execute) {
726 if (ctx->last_jump == (ctx->start + target)) {
727 cjiffies = jiffies;
728 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
729 cjiffies -= ctx->last_jump_jiffies;
730 if ((jiffies_to_msecs(cjiffies) > 5000)) {
731 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
732 ctx->abort = true;
733 }
734 } else {
735 /* jiffies wrap around we will just wait a little longer */
736 ctx->last_jump_jiffies = jiffies;
737 }
738 } else {
739 ctx->last_jump = ctx->start + target;
740 ctx->last_jump_jiffies = jiffies;
741 }
742 *ptr = ctx->start + target;
743 }
744}
745
746static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
747{
748 uint8_t attr = U8((*ptr)++);
749 uint32_t dst, mask, src, saved;
750 int dptr = *ptr;
751 SDEBUG(" dst: ");
752 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
753 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
754 SDEBUG(" mask: 0x%08x", mask);
755 SDEBUG(" src: ");
756 src = atom_get_src(ctx, attr, ptr);
757 dst &= mask;
758 dst |= src;
759 SDEBUG(" dst: ");
760 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
761}
762
763static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
764{
765 uint8_t attr = U8((*ptr)++);
766 uint32_t src, saved;
767 int dptr = *ptr;
768 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
769 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
770 else {
771 atom_skip_dst(ctx, arg, attr, ptr);
772 saved = 0xCDCDCDCD;
773 }
774 SDEBUG(" src: ");
775 src = atom_get_src(ctx, attr, ptr);
776 SDEBUG(" dst: ");
777 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
778}
779
780static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
781{
782 uint8_t attr = U8((*ptr)++);
783 uint32_t dst, src;
784 SDEBUG(" src1: ");
785 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
786 SDEBUG(" src2: ");
787 src = atom_get_src(ctx, attr, ptr);
788 ctx->ctx->divmul[0] = dst * src;
789}
790
791static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
792{
793 /* nothing */
794}
795
796static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
797{
798 uint8_t attr = U8((*ptr)++);
799 uint32_t dst, src, saved;
800 int dptr = *ptr;
801 SDEBUG(" dst: ");
802 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
803 SDEBUG(" src: ");
804 src = atom_get_src(ctx, attr, ptr);
805 dst |= src;
806 SDEBUG(" dst: ");
807 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
808}
809
810static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
811{
812 uint8_t val = U8((*ptr)++);
813 SDEBUG("POST card output: 0x%02X\n", val);
814}
815
816static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
817{
818 pr_info("unimplemented!\n");
819}
820
821static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
822{
823 pr_info("unimplemented!\n");
824}
825
826static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
827{
828 pr_info("unimplemented!\n");
829}
830
831static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
832{
833 int idx = U8(*ptr);
834 (*ptr)++;
835 SDEBUG(" block: %d\n", idx);
836 if (!idx)
837 ctx->ctx->data_block = 0;
838 else if (idx == 255)
839 ctx->ctx->data_block = ctx->start;
840 else
841 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
842 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
843}
844
845static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
846{
847 uint8_t attr = U8((*ptr)++);
848 SDEBUG(" fb_base: ");
849 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
850}
851
852static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
853{
854 int port;
855 switch (arg) {
856 case ATOM_PORT_ATI:
857 port = U16(*ptr);
858 if (port < ATOM_IO_NAMES_CNT)
859 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
860 else
861 SDEBUG(" port: %d\n", port);
862 if (!port)
863 ctx->ctx->io_mode = ATOM_IO_MM;
864 else
865 ctx->ctx->io_mode = ATOM_IO_IIO | port;
866 (*ptr) += 2;
867 break;
868 case ATOM_PORT_PCI:
869 ctx->ctx->io_mode = ATOM_IO_PCI;
870 (*ptr)++;
871 break;
872 case ATOM_PORT_SYSIO:
873 ctx->ctx->io_mode = ATOM_IO_SYSIO;
874 (*ptr)++;
875 break;
876 }
877}
878
879static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
880{
881 ctx->ctx->reg_block = U16(*ptr);
882 (*ptr) += 2;
883 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
884}
885
886static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
887{
888 uint8_t attr = U8((*ptr)++), shift;
889 uint32_t saved, dst;
890 int dptr = *ptr;
891 attr &= 0x38;
892 attr |= atom_def_dst[attr >> 3] << 6;
893 SDEBUG(" dst: ");
894 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
895 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
896 SDEBUG(" shift: %d\n", shift);
897 dst <<= shift;
898 SDEBUG(" dst: ");
899 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
900}
901
902static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
903{
904 uint8_t attr = U8((*ptr)++), shift;
905 uint32_t saved, dst;
906 int dptr = *ptr;
907 attr &= 0x38;
908 attr |= atom_def_dst[attr >> 3] << 6;
909 SDEBUG(" dst: ");
910 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
911 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
912 SDEBUG(" shift: %d\n", shift);
913 dst >>= shift;
914 SDEBUG(" dst: ");
915 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
916}
917
918static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
919{
920 uint8_t attr = U8((*ptr)++), shift;
921 uint32_t saved, dst;
922 int dptr = *ptr;
923 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
924 SDEBUG(" dst: ");
925 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
926 /* op needs to full dst value */
927 dst = saved;
928 shift = atom_get_src(ctx, attr, ptr);
929 SDEBUG(" shift: %d\n", shift);
930 dst <<= shift;
931 dst &= atom_arg_mask[dst_align];
932 dst >>= atom_arg_shift[dst_align];
933 SDEBUG(" dst: ");
934 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
935}
936
937static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
938{
939 uint8_t attr = U8((*ptr)++), shift;
940 uint32_t saved, dst;
941 int dptr = *ptr;
942 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
943 SDEBUG(" dst: ");
944 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
945 /* op needs to full dst value */
946 dst = saved;
947 shift = atom_get_src(ctx, attr, ptr);
948 SDEBUG(" shift: %d\n", shift);
949 dst >>= shift;
950 dst &= atom_arg_mask[dst_align];
951 dst >>= atom_arg_shift[dst_align];
952 SDEBUG(" dst: ");
953 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
954}
955
956static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
957{
958 uint8_t attr = U8((*ptr)++);
959 uint32_t dst, src, saved;
960 int dptr = *ptr;
961 SDEBUG(" dst: ");
962 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
963 SDEBUG(" src: ");
964 src = atom_get_src(ctx, attr, ptr);
965 dst -= src;
966 SDEBUG(" dst: ");
967 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
968}
969
970static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
971{
972 uint8_t attr = U8((*ptr)++);
973 uint32_t src, val, target;
974 SDEBUG(" switch: ");
975 src = atom_get_src(ctx, attr, ptr);
976 while (U16(*ptr) != ATOM_CASE_END)
977 if (U8(*ptr) == ATOM_CASE_MAGIC) {
978 (*ptr)++;
979 SDEBUG(" case: ");
980 val =
981 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
982 ptr);
983 target = U16(*ptr);
984 if (val == src) {
985 SDEBUG(" target: %04X\n", target);
986 *ptr = ctx->start + target;
987 return;
988 }
989 (*ptr) += 2;
990 } else {
991 pr_info("Bad case\n");
992 return;
993 }
994 (*ptr) += 2;
995}
996
997static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
998{
999 uint8_t attr = U8((*ptr)++);
1000 uint32_t dst, src;
1001 SDEBUG(" src1: ");
1002 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1003 SDEBUG(" src2: ");
1004 src = atom_get_src(ctx, attr, ptr);
1005 ctx->ctx->cs_equal = ((dst & src) == 0);
1006 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1007}
1008
1009static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1010{
1011 uint8_t attr = U8((*ptr)++);
1012 uint32_t dst, src, saved;
1013 int dptr = *ptr;
1014 SDEBUG(" dst: ");
1015 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1016 SDEBUG(" src: ");
1017 src = atom_get_src(ctx, attr, ptr);
1018 dst ^= src;
1019 SDEBUG(" dst: ");
1020 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1021}
1022
1023static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1024{
1025 pr_info("unimplemented!\n");
1026}
1027
1028static struct {
1029 void (*func) (atom_exec_context *, int *, int);
1030 int arg;
1031} opcode_table[ATOM_OP_CNT] = {
1032 {
1033 NULL, 0}, {
1034 atom_op_move, ATOM_ARG_REG}, {
1035 atom_op_move, ATOM_ARG_PS}, {
1036 atom_op_move, ATOM_ARG_WS}, {
1037 atom_op_move, ATOM_ARG_FB}, {
1038 atom_op_move, ATOM_ARG_PLL}, {
1039 atom_op_move, ATOM_ARG_MC}, {
1040 atom_op_and, ATOM_ARG_REG}, {
1041 atom_op_and, ATOM_ARG_PS}, {
1042 atom_op_and, ATOM_ARG_WS}, {
1043 atom_op_and, ATOM_ARG_FB}, {
1044 atom_op_and, ATOM_ARG_PLL}, {
1045 atom_op_and, ATOM_ARG_MC}, {
1046 atom_op_or, ATOM_ARG_REG}, {
1047 atom_op_or, ATOM_ARG_PS}, {
1048 atom_op_or, ATOM_ARG_WS}, {
1049 atom_op_or, ATOM_ARG_FB}, {
1050 atom_op_or, ATOM_ARG_PLL}, {
1051 atom_op_or, ATOM_ARG_MC}, {
1052 atom_op_shift_left, ATOM_ARG_REG}, {
1053 atom_op_shift_left, ATOM_ARG_PS}, {
1054 atom_op_shift_left, ATOM_ARG_WS}, {
1055 atom_op_shift_left, ATOM_ARG_FB}, {
1056 atom_op_shift_left, ATOM_ARG_PLL}, {
1057 atom_op_shift_left, ATOM_ARG_MC}, {
1058 atom_op_shift_right, ATOM_ARG_REG}, {
1059 atom_op_shift_right, ATOM_ARG_PS}, {
1060 atom_op_shift_right, ATOM_ARG_WS}, {
1061 atom_op_shift_right, ATOM_ARG_FB}, {
1062 atom_op_shift_right, ATOM_ARG_PLL}, {
1063 atom_op_shift_right, ATOM_ARG_MC}, {
1064 atom_op_mul, ATOM_ARG_REG}, {
1065 atom_op_mul, ATOM_ARG_PS}, {
1066 atom_op_mul, ATOM_ARG_WS}, {
1067 atom_op_mul, ATOM_ARG_FB}, {
1068 atom_op_mul, ATOM_ARG_PLL}, {
1069 atom_op_mul, ATOM_ARG_MC}, {
1070 atom_op_div, ATOM_ARG_REG}, {
1071 atom_op_div, ATOM_ARG_PS}, {
1072 atom_op_div, ATOM_ARG_WS}, {
1073 atom_op_div, ATOM_ARG_FB}, {
1074 atom_op_div, ATOM_ARG_PLL}, {
1075 atom_op_div, ATOM_ARG_MC}, {
1076 atom_op_add, ATOM_ARG_REG}, {
1077 atom_op_add, ATOM_ARG_PS}, {
1078 atom_op_add, ATOM_ARG_WS}, {
1079 atom_op_add, ATOM_ARG_FB}, {
1080 atom_op_add, ATOM_ARG_PLL}, {
1081 atom_op_add, ATOM_ARG_MC}, {
1082 atom_op_sub, ATOM_ARG_REG}, {
1083 atom_op_sub, ATOM_ARG_PS}, {
1084 atom_op_sub, ATOM_ARG_WS}, {
1085 atom_op_sub, ATOM_ARG_FB}, {
1086 atom_op_sub, ATOM_ARG_PLL}, {
1087 atom_op_sub, ATOM_ARG_MC}, {
1088 atom_op_setport, ATOM_PORT_ATI}, {
1089 atom_op_setport, ATOM_PORT_PCI}, {
1090 atom_op_setport, ATOM_PORT_SYSIO}, {
1091 atom_op_setregblock, 0}, {
1092 atom_op_setfbbase, 0}, {
1093 atom_op_compare, ATOM_ARG_REG}, {
1094 atom_op_compare, ATOM_ARG_PS}, {
1095 atom_op_compare, ATOM_ARG_WS}, {
1096 atom_op_compare, ATOM_ARG_FB}, {
1097 atom_op_compare, ATOM_ARG_PLL}, {
1098 atom_op_compare, ATOM_ARG_MC}, {
1099 atom_op_switch, 0}, {
1100 atom_op_jump, ATOM_COND_ALWAYS}, {
1101 atom_op_jump, ATOM_COND_EQUAL}, {
1102 atom_op_jump, ATOM_COND_BELOW}, {
1103 atom_op_jump, ATOM_COND_ABOVE}, {
1104 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1105 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1106 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1107 atom_op_test, ATOM_ARG_REG}, {
1108 atom_op_test, ATOM_ARG_PS}, {
1109 atom_op_test, ATOM_ARG_WS}, {
1110 atom_op_test, ATOM_ARG_FB}, {
1111 atom_op_test, ATOM_ARG_PLL}, {
1112 atom_op_test, ATOM_ARG_MC}, {
1113 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1114 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1115 atom_op_calltable, 0}, {
1116 atom_op_repeat, 0}, {
1117 atom_op_clear, ATOM_ARG_REG}, {
1118 atom_op_clear, ATOM_ARG_PS}, {
1119 atom_op_clear, ATOM_ARG_WS}, {
1120 atom_op_clear, ATOM_ARG_FB}, {
1121 atom_op_clear, ATOM_ARG_PLL}, {
1122 atom_op_clear, ATOM_ARG_MC}, {
1123 atom_op_nop, 0}, {
1124 atom_op_eot, 0}, {
1125 atom_op_mask, ATOM_ARG_REG}, {
1126 atom_op_mask, ATOM_ARG_PS}, {
1127 atom_op_mask, ATOM_ARG_WS}, {
1128 atom_op_mask, ATOM_ARG_FB}, {
1129 atom_op_mask, ATOM_ARG_PLL}, {
1130 atom_op_mask, ATOM_ARG_MC}, {
1131 atom_op_postcard, 0}, {
1132 atom_op_beep, 0}, {
1133 atom_op_savereg, 0}, {
1134 atom_op_restorereg, 0}, {
1135 atom_op_setdatablock, 0}, {
1136 atom_op_xor, ATOM_ARG_REG}, {
1137 atom_op_xor, ATOM_ARG_PS}, {
1138 atom_op_xor, ATOM_ARG_WS}, {
1139 atom_op_xor, ATOM_ARG_FB}, {
1140 atom_op_xor, ATOM_ARG_PLL}, {
1141 atom_op_xor, ATOM_ARG_MC}, {
1142 atom_op_shl, ATOM_ARG_REG}, {
1143 atom_op_shl, ATOM_ARG_PS}, {
1144 atom_op_shl, ATOM_ARG_WS}, {
1145 atom_op_shl, ATOM_ARG_FB}, {
1146 atom_op_shl, ATOM_ARG_PLL}, {
1147 atom_op_shl, ATOM_ARG_MC}, {
1148 atom_op_shr, ATOM_ARG_REG}, {
1149 atom_op_shr, ATOM_ARG_PS}, {
1150 atom_op_shr, ATOM_ARG_WS}, {
1151 atom_op_shr, ATOM_ARG_FB}, {
1152 atom_op_shr, ATOM_ARG_PLL}, {
1153 atom_op_shr, ATOM_ARG_MC}, {
1154atom_op_debug, 0},};
1155
1156static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1157{
1158 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1159 int len, ws, ps, ptr;
1160 unsigned char op;
1161 atom_exec_context ectx;
1162 int ret = 0;
1163
1164 if (!base)
1165 return -EINVAL;
1166
1167 len = CU16(base + ATOM_CT_SIZE_PTR);
1168 ws = CU8(base + ATOM_CT_WS_PTR);
1169 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1170 ptr = base + ATOM_CT_CODE_PTR;
1171
1172 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1173
1174 ectx.ctx = ctx;
1175 ectx.ps_shift = ps / 4;
1176 ectx.start = base;
1177 ectx.ps = params;
1178 ectx.abort = false;
1179 ectx.last_jump = 0;
1180 if (ws)
1181 ectx.ws = kcalloc(4, ws, GFP_KERNEL);
1182 else
1183 ectx.ws = NULL;
1184
1185 debug_depth++;
1186 while (1) {
1187 op = CU8(ptr++);
1188 if (op < ATOM_OP_NAMES_CNT)
1189 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1190 else
1191 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1192 if (ectx.abort) {
1193 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1194 base, len, ws, ps, ptr - 1);
1195 ret = -EINVAL;
1196 goto free;
1197 }
1198
1199 if (op < ATOM_OP_CNT && op > 0)
1200 opcode_table[op].func(&ectx, &ptr,
1201 opcode_table[op].arg);
1202 else
1203 break;
1204
1205 if (op == ATOM_OP_EOT)
1206 break;
1207 }
1208 debug_depth--;
1209 SDEBUG("<<\n");
1210
1211free:
1212 if (ws)
1213 kfree(ectx.ws);
1214 return ret;
1215}
1216
1217int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1218{
1219 int r;
1220
1221 mutex_lock(&ctx->mutex);
1222 /* reset data block */
1223 ctx->data_block = 0;
1224 /* reset reg block */
1225 ctx->reg_block = 0;
1226 /* reset fb window */
1227 ctx->fb_base = 0;
1228 /* reset io mode */
1229 ctx->io_mode = ATOM_IO_MM;
1230 /* reset divmul */
1231 ctx->divmul[0] = 0;
1232 ctx->divmul[1] = 0;
1233 r = atom_execute_table_locked(ctx, index, params);
1234 mutex_unlock(&ctx->mutex);
1235 return r;
1236}
1237
1238int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1239{
1240 int r;
1241 mutex_lock(&ctx->scratch_mutex);
1242 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1243 mutex_unlock(&ctx->scratch_mutex);
1244 return r;
1245}
1246
1247static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1248
1249static void atom_index_iio(struct atom_context *ctx, int base)
1250{
1251 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1252 if (!ctx->iio)
1253 return;
1254 while (CU8(base) == ATOM_IIO_START) {
1255 ctx->iio[CU8(base + 1)] = base + 2;
1256 base += 2;
1257 while (CU8(base) != ATOM_IIO_END)
1258 base += atom_iio_len[CU8(base)];
1259 base += 3;
1260 }
1261}
1262
1263struct atom_context *atom_parse(struct card_info *card, void *bios)
1264{
1265 int base;
1266 struct atom_context *ctx =
1267 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1268 char *str;
1269 char name[512];
1270 int i;
1271
1272 if (!ctx)
1273 return NULL;
1274
1275 ctx->card = card;
1276 ctx->bios = bios;
1277
1278 if (CU16(0) != ATOM_BIOS_MAGIC) {
1279 pr_info("Invalid BIOS magic\n");
1280 kfree(ctx);
1281 return NULL;
1282 }
1283 if (strncmp
1284 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1285 strlen(ATOM_ATI_MAGIC))) {
1286 pr_info("Invalid ATI magic\n");
1287 kfree(ctx);
1288 return NULL;
1289 }
1290
1291 base = CU16(ATOM_ROM_TABLE_PTR);
1292 if (strncmp
1293 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1294 strlen(ATOM_ROM_MAGIC))) {
1295 pr_info("Invalid ATOM magic\n");
1296 kfree(ctx);
1297 return NULL;
1298 }
1299
1300 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1301 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1302 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1303 if (!ctx->iio) {
1304 atom_destroy(ctx);
1305 return NULL;
1306 }
1307
1308 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1309 while (*str && ((*str == '\n') || (*str == '\r')))
1310 str++;
1311 /* name string isn't always 0 terminated */
1312 for (i = 0; i < 511; i++) {
1313 name[i] = str[i];
1314 if (name[i] < '.' || name[i] > 'z') {
1315 name[i] = 0;
1316 break;
1317 }
1318 }
1319 pr_info("ATOM BIOS: %s\n", name);
1320
1321 return ctx;
1322}
1323
1324int atom_asic_init(struct atom_context *ctx)
1325{
1326 struct radeon_device *rdev = ctx->card->dev->dev_private;
1327 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1328 uint32_t ps[16];
1329 int ret;
1330
1331 memset(ps, 0, 64);
1332
1333 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1334 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1335 if (!ps[0] || !ps[1])
1336 return 1;
1337
1338 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1339 return 1;
1340 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1341 if (ret)
1342 return ret;
1343
1344 memset(ps, 0, 64);
1345
1346 if (rdev->family < CHIP_R600) {
1347 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1348 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1349 }
1350 return ret;
1351}
1352
1353void atom_destroy(struct atom_context *ctx)
1354{
1355 kfree(ctx->iio);
1356 kfree(ctx);
1357}
1358
1359bool atom_parse_data_header(struct atom_context *ctx, int index,
1360 uint16_t * size, uint8_t * frev, uint8_t * crev,
1361 uint16_t * data_start)
1362{
1363 int offset = index * 2 + 4;
1364 int idx = CU16(ctx->data_table + offset);
1365 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1366
1367 if (!mdt[index])
1368 return false;
1369
1370 if (size)
1371 *size = CU16(idx);
1372 if (frev)
1373 *frev = CU8(idx + 2);
1374 if (crev)
1375 *crev = CU8(idx + 3);
1376 *data_start = idx;
1377 return true;
1378}
1379
1380bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1381 uint8_t * crev)
1382{
1383 int offset = index * 2 + 4;
1384 int idx = CU16(ctx->cmd_table + offset);
1385 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1386
1387 if (!mct[index])
1388 return false;
1389
1390 if (frev)
1391 *frev = CU8(idx + 2);
1392 if (crev)
1393 *crev = CU8(idx + 3);
1394 return true;
1395}
1396
1397int atom_allocate_fb_scratch(struct atom_context *ctx)
1398{
1399 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1400 uint16_t data_offset;
1401 int usage_bytes = 0;
1402 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1403
1404 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1405 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1406
1407 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1408 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1409 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1410
1411 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1412 }
1413 ctx->scratch_size_bytes = 0;
1414 if (usage_bytes == 0)
1415 usage_bytes = 20 * 1024;
1416 /* allocate some scratch memory */
1417 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1418 if (!ctx->scratch)
1419 return -ENOMEM;
1420 ctx->scratch_size_bytes = usage_bytes;
1421 return 0;
1422}
1423