1 | /* |
2 | * Copyright 2009 Advanced Micro Devices, Inc. |
3 | * Copyright 2009 Red Hat Inc. |
4 | * |
5 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * copy of this software and associated documentation files (the "Software"), |
7 | * to deal in the Software without restriction, including without limitation |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * Software is furnished to do so, subject to the following conditions: |
11 | * |
12 | * The above copyright notice and this permission notice shall be included in |
13 | * all copies or substantial portions of the Software. |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
21 | * OTHER DEALINGS IN THE SOFTWARE. |
22 | * |
23 | * Authors: Dave Airlie |
24 | * Alex Deucher |
25 | * Jerome Glisse |
26 | */ |
27 | #ifndef AVIVOD_H |
28 | #define AVIVOD_H |
29 | |
30 | |
31 | #define D1CRTC_CONTROL 0x6080 |
32 | #define CRTC_EN (1 << 0) |
33 | #define D1CRTC_STATUS 0x609c |
34 | #define D1CRTC_UPDATE_LOCK 0x60E8 |
35 | #define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 |
36 | #define D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 |
37 | |
38 | #define D2CRTC_CONTROL 0x6880 |
39 | #define D2CRTC_STATUS 0x689c |
40 | #define D2CRTC_UPDATE_LOCK 0x68E8 |
41 | #define D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910 |
42 | #define D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918 |
43 | |
44 | #define D1VGA_CONTROL 0x0330 |
45 | #define DVGA_CONTROL_MODE_ENABLE (1 << 0) |
46 | #define DVGA_CONTROL_TIMING_SELECT (1 << 8) |
47 | #define DVGA_CONTROL_SYNC_POLARITY_SELECT (1 << 9) |
48 | #define DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1 << 10) |
49 | #define DVGA_CONTROL_OVERSCAN_COLOR_EN (1 << 16) |
50 | #define DVGA_CONTROL_ROTATE (1 << 24) |
51 | #define D2VGA_CONTROL 0x0338 |
52 | |
53 | #define VGA_HDP_CONTROL 0x328 |
54 | #define VGA_MEM_PAGE_SELECT_EN (1 << 0) |
55 | #define VGA_MEMORY_DISABLE (1 << 4) |
56 | #define VGA_RBBM_LOCK_DISABLE (1 << 8) |
57 | #define VGA_SOFT_RESET (1 << 16) |
58 | #define VGA_MEMORY_BASE_ADDRESS 0x0310 |
59 | #define VGA_RENDER_CONTROL 0x0300 |
60 | #define VGA_VSTATUS_CNTL_MASK 0x00030000 |
61 | |
62 | #endif |
63 | |