| 1 | /* |
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| 2 | * Copyright 2011 Advanced Micro Devices, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | * |
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| 22 | */ |
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| 23 | #ifndef __BTC_DPM_H__ |
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| 24 | #define __BTC_DPM_H__ |
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| 25 | |
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| 26 | #include "radeon.h" |
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| 27 | #include "rv770_dpm.h" |
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| 28 | |
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| 29 | #define BTC_RLP_UVD_DFLT 20 |
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| 30 | #define BTC_RMP_UVD_DFLT 50 |
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| 31 | #define BTC_LHP_UVD_DFLT 50 |
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| 32 | #define BTC_LMP_UVD_DFLT 20 |
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| 33 | #define BARTS_MGCGCGTSSMCTRL_DFLT 0x81944000 |
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| 34 | #define TURKS_MGCGCGTSSMCTRL_DFLT 0x6e944000 |
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| 35 | #define CAICOS_MGCGCGTSSMCTRL_DFLT 0x46944040 |
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| 36 | #define BTC_CGULVPARAMETER_DFLT 0x00040035 |
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| 37 | #define BTC_CGULVCONTROL_DFLT 0x00001450 |
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| 38 | |
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| 39 | extern u32 btc_valid_sclk[40]; |
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| 40 | |
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| 41 | void btc_read_arb_registers(struct radeon_device *rdev); |
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| 42 | void btc_program_mgcg_hw_sequence(struct radeon_device *rdev, |
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| 43 | const u32 *sequence, u32 count); |
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| 44 | void btc_skip_blacklist_clocks(struct radeon_device *rdev, |
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| 45 | const u32 max_sclk, const u32 max_mclk, |
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| 46 | u32 *sclk, u32 *mclk); |
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| 47 | void btc_adjust_clock_combinations(struct radeon_device *rdev, |
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| 48 | const struct radeon_clock_and_voltage_limits *max_limits, |
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| 49 | struct rv7xx_pl *pl); |
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| 50 | void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table, |
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| 51 | u32 clock, u16 max_voltage, u16 *voltage); |
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| 52 | void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table, |
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| 53 | u32 *max_clock); |
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| 54 | void btc_apply_voltage_delta_rules(struct radeon_device *rdev, |
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| 55 | u16 max_vddc, u16 max_vddci, |
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| 56 | u16 *vddc, u16 *vddci); |
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| 57 | bool btc_dpm_enabled(struct radeon_device *rdev); |
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| 58 | int btc_reset_to_default(struct radeon_device *rdev); |
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| 59 | void btc_notify_uvd_to_smc(struct radeon_device *rdev, |
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| 60 | struct radeon_ps *radeon_new_state); |
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| 61 | |
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| 62 | #endif |
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| 63 | |
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