1/*
2 * Copyright 2010 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Alex Deucher
23 */
24#ifndef __NI_REG_H__
25#define __NI_REG_H__
26
27/* northern islands - DCE5 */
28
29#define NI_INPUT_GAMMA_CONTROL 0x6840
30# define NI_GRPH_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 0)
31# define NI_INPUT_GAMMA_USE_LUT 0
32# define NI_INPUT_GAMMA_BYPASS 1
33# define NI_INPUT_GAMMA_SRGB_24 2
34# define NI_INPUT_GAMMA_XVYCC_222 3
35# define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4)
36
37#define NI_PRESCALE_GRPH_CONTROL 0x68b4
38# define NI_GRPH_PRESCALE_BYPASS (1 << 4)
39
40#define NI_PRESCALE_OVL_CONTROL 0x68c4
41# define NI_OVL_PRESCALE_BYPASS (1 << 4)
42
43#define NI_INPUT_CSC_CONTROL 0x68d4
44# define NI_INPUT_CSC_GRPH_MODE(x) (((x) & 0x3) << 0)
45# define NI_INPUT_CSC_BYPASS 0
46# define NI_INPUT_CSC_PROG_COEFF 1
47# define NI_INPUT_CSC_PROG_SHARED_MATRIXA 2
48# define NI_INPUT_CSC_OVL_MODE(x) (((x) & 0x3) << 4)
49
50#define NI_OUTPUT_CSC_CONTROL 0x68f0
51# define NI_OUTPUT_CSC_GRPH_MODE(x) (((x) & 0x7) << 0)
52# define NI_OUTPUT_CSC_BYPASS 0
53# define NI_OUTPUT_CSC_TV_RGB 1
54# define NI_OUTPUT_CSC_YCBCR_601 2
55# define NI_OUTPUT_CSC_YCBCR_709 3
56# define NI_OUTPUT_CSC_PROG_COEFF 4
57# define NI_OUTPUT_CSC_PROG_SHARED_MATRIXB 5
58# define NI_OUTPUT_CSC_OVL_MODE(x) (((x) & 0x7) << 4)
59
60#define NI_DEGAMMA_CONTROL 0x6960
61# define NI_GRPH_DEGAMMA_MODE(x) (((x) & 0x3) << 0)
62# define NI_DEGAMMA_BYPASS 0
63# define NI_DEGAMMA_SRGB_24 1
64# define NI_DEGAMMA_XVYCC_222 2
65# define NI_OVL_DEGAMMA_MODE(x) (((x) & 0x3) << 4)
66# define NI_ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8)
67# define NI_CURSOR_DEGAMMA_MODE(x) (((x) & 0x3) << 12)
68
69#define NI_GAMUT_REMAP_CONTROL 0x6964
70# define NI_GRPH_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 0)
71# define NI_GAMUT_REMAP_BYPASS 0
72# define NI_GAMUT_REMAP_PROG_COEFF 1
73# define NI_GAMUT_REMAP_PROG_SHARED_MATRIXA 2
74# define NI_GAMUT_REMAP_PROG_SHARED_MATRIXB 3
75# define NI_OVL_GAMUT_REMAP_MODE(x) (((x) & 0x3) << 4)
76
77#define NI_REGAMMA_CONTROL 0x6a80
78# define NI_GRPH_REGAMMA_MODE(x) (((x) & 0x7) << 0)
79# define NI_REGAMMA_BYPASS 0
80# define NI_REGAMMA_SRGB_24 1
81# define NI_REGAMMA_XVYCC_222 2
82# define NI_REGAMMA_PROG_A 3
83# define NI_REGAMMA_PROG_B 4
84# define NI_OVL_REGAMMA_MODE(x) (((x) & 0x7) << 4)
85
86#define NI_DP_MSE_LINK_TIMING 0x73a0
87# define NI_DP_MSE_LINK_FRAME (((x) & 0x3ff) << 0)
88# define NI_DP_MSE_LINK_LINE (((x) & 0x3) << 16)
89
90#define NI_DP_MSE_MISC_CNTL 0x736c
91# define NI_DP_MSE_BLANK_CODE (((x) & 0x1) << 0)
92# define NI_DP_MSE_TIMESTAMP_MODE (((x) & 0x1) << 4)
93# define NI_DP_MSE_ZERO_ENCODER (((x) & 0x1) << 8)
94
95#define NI_DP_MSE_RATE_CNTL 0x7384
96# define NI_DP_MSE_RATE_Y(x) (((x) & 0x3ffffff) << 0)
97# define NI_DP_MSE_RATE_X(x) (((x) & 0x3f) << 26)
98
99#define NI_DP_MSE_RATE_UPDATE 0x738c
100
101#define NI_DP_MSE_SAT0 0x7390
102# define NI_DP_MSE_SAT_SRC0(x) (((x) & 0x7) << 0)
103# define NI_DP_MSE_SAT_SLOT_COUNT0(x) (((x) & 0x3f) << 8)
104# define NI_DP_MSE_SAT_SRC1(x) (((x) & 0x7) << 16)
105# define NI_DP_MSE_SAT_SLOT_COUNT1(x) (((x) & 0x3f) << 24)
106
107#define NI_DP_MSE_SAT1 0x7394
108
109#define NI_DP_MSE_SAT2 0x7398
110
111#define NI_DP_MSE_SAT_UPDATE 0x739c
112# define NI_DP_MSE_SAT_UPDATE_MASK 0x3
113# define NI_DP_MSE_16_MTP_KEEPOUT 0x100
114
115#define NI_DIG_BE_CNTL 0x7140
116# define NI_DIG_FE_SOURCE_SELECT(x) (((x) & 0x7f) << 8)
117# define NI_DIG_FE_DIG_MODE(x) (((x) & 0x7) << 16)
118# define NI_DIG_MODE_DP_SST 0
119# define NI_DIG_MODE_LVDS 1
120# define NI_DIG_MODE_TMDS_DVI 2
121# define NI_DIG_MODE_TMDS_HDMI 3
122# define NI_DIG_MODE_DP_MST 5
123# define NI_DIG_HPD_SELECT(x) (((x) & 0x7) << 28)
124
125#define NI_DIG_FE_CNTL 0x7000
126# define NI_DIG_SOURCE_SELECT(x) (((x) & 0x3) << 0)
127# define NI_DIG_STEREOSYNC_SELECT(x) (((x) & 0x3) << 4)
128# define NI_DIG_STEREOSYNC_GATE_EN(x) (((x) & 0x1) << 8)
129# define NI_DIG_DUAL_LINK_ENABLE(x) (((x) & 0x1) << 16)
130# define NI_DIG_SWAP(x) (((x) & 0x1) << 18)
131# define NI_DIG_SYMCLK_FE_ON (0x1 << 24)
132#endif
133

source code of linux/drivers/gpu/drm/radeon/ni_reg.h