1 | /* |
2 | * Copyright 2009 Jerome Glisse. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: Jerome Glisse |
23 | */ |
24 | |
25 | #include <drm/radeon_drm.h> |
26 | #include "radeon_reg.h" |
27 | #include "radeon.h" |
28 | |
29 | #define RADEON_BENCHMARK_COPY_BLIT 1 |
30 | #define RADEON_BENCHMARK_COPY_DMA 0 |
31 | |
32 | #define RADEON_BENCHMARK_ITERATIONS 1024 |
33 | #define RADEON_BENCHMARK_COMMON_MODES_N 17 |
34 | |
35 | static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, |
36 | uint64_t saddr, uint64_t daddr, |
37 | int flag, int n, |
38 | struct dma_resv *resv) |
39 | { |
40 | unsigned long start_jiffies; |
41 | unsigned long end_jiffies; |
42 | struct radeon_fence *fence = NULL; |
43 | int i, r; |
44 | |
45 | start_jiffies = jiffies; |
46 | for (i = 0; i < n; i++) { |
47 | switch (flag) { |
48 | case RADEON_BENCHMARK_COPY_DMA: |
49 | fence = radeon_copy_dma(rdev, saddr, daddr, |
50 | size / RADEON_GPU_PAGE_SIZE, |
51 | resv); |
52 | break; |
53 | case RADEON_BENCHMARK_COPY_BLIT: |
54 | fence = radeon_copy_blit(rdev, saddr, daddr, |
55 | size / RADEON_GPU_PAGE_SIZE, |
56 | resv); |
57 | break; |
58 | default: |
59 | DRM_ERROR("Unknown copy method\n" ); |
60 | return -EINVAL; |
61 | } |
62 | if (IS_ERR(ptr: fence)) |
63 | return PTR_ERR(ptr: fence); |
64 | |
65 | r = radeon_fence_wait(fence, interruptible: false); |
66 | radeon_fence_unref(fence: &fence); |
67 | if (r) |
68 | return r; |
69 | } |
70 | end_jiffies = jiffies; |
71 | return jiffies_to_msecs(j: end_jiffies - start_jiffies); |
72 | } |
73 | |
74 | |
75 | static void radeon_benchmark_log_results(int n, unsigned size, |
76 | unsigned int time, |
77 | unsigned sdomain, unsigned ddomain, |
78 | char *kind) |
79 | { |
80 | unsigned int throughput = (n * (size >> 10)) / time; |
81 | DRM_INFO("radeon: %s %u bo moves of %u kB from" |
82 | " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n" , |
83 | kind, n, size >> 10, sdomain, ddomain, time, |
84 | throughput * 8, throughput); |
85 | } |
86 | |
87 | static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, |
88 | unsigned sdomain, unsigned ddomain) |
89 | { |
90 | struct radeon_bo *dobj = NULL; |
91 | struct radeon_bo *sobj = NULL; |
92 | uint64_t saddr, daddr; |
93 | int r, n; |
94 | int time; |
95 | |
96 | n = RADEON_BENCHMARK_ITERATIONS; |
97 | r = radeon_bo_create(rdev, size, PAGE_SIZE, kernel: true, domain: sdomain, flags: 0, NULL, NULL, bo_ptr: &sobj); |
98 | if (r) { |
99 | goto out_cleanup; |
100 | } |
101 | r = radeon_bo_reserve(bo: sobj, no_intr: false); |
102 | if (unlikely(r != 0)) |
103 | goto out_cleanup; |
104 | r = radeon_bo_pin(bo: sobj, domain: sdomain, gpu_addr: &saddr); |
105 | radeon_bo_unreserve(bo: sobj); |
106 | if (r) { |
107 | goto out_cleanup; |
108 | } |
109 | r = radeon_bo_create(rdev, size, PAGE_SIZE, kernel: true, domain: ddomain, flags: 0, NULL, NULL, bo_ptr: &dobj); |
110 | if (r) { |
111 | goto out_cleanup; |
112 | } |
113 | r = radeon_bo_reserve(bo: dobj, no_intr: false); |
114 | if (unlikely(r != 0)) |
115 | goto out_cleanup; |
116 | r = radeon_bo_pin(bo: dobj, domain: ddomain, gpu_addr: &daddr); |
117 | radeon_bo_unreserve(bo: dobj); |
118 | if (r) { |
119 | goto out_cleanup; |
120 | } |
121 | |
122 | if (rdev->asic->copy.dma) { |
123 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
124 | RADEON_BENCHMARK_COPY_DMA, n, |
125 | resv: dobj->tbo.base.resv); |
126 | if (time < 0) |
127 | goto out_cleanup; |
128 | if (time > 0) |
129 | radeon_benchmark_log_results(n, size, time, |
130 | sdomain, ddomain, kind: "dma" ); |
131 | } |
132 | |
133 | if (rdev->asic->copy.blit) { |
134 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
135 | RADEON_BENCHMARK_COPY_BLIT, n, |
136 | resv: dobj->tbo.base.resv); |
137 | if (time < 0) |
138 | goto out_cleanup; |
139 | if (time > 0) |
140 | radeon_benchmark_log_results(n, size, time, |
141 | sdomain, ddomain, kind: "blit" ); |
142 | } |
143 | |
144 | out_cleanup: |
145 | if (sobj) { |
146 | r = radeon_bo_reserve(bo: sobj, no_intr: false); |
147 | if (likely(r == 0)) { |
148 | radeon_bo_unpin(bo: sobj); |
149 | radeon_bo_unreserve(bo: sobj); |
150 | } |
151 | radeon_bo_unref(bo: &sobj); |
152 | } |
153 | if (dobj) { |
154 | r = radeon_bo_reserve(bo: dobj, no_intr: false); |
155 | if (likely(r == 0)) { |
156 | radeon_bo_unpin(bo: dobj); |
157 | radeon_bo_unreserve(bo: dobj); |
158 | } |
159 | radeon_bo_unref(bo: &dobj); |
160 | } |
161 | |
162 | if (r) { |
163 | DRM_ERROR("Error while benchmarking BO move.\n" ); |
164 | } |
165 | } |
166 | |
167 | void radeon_benchmark(struct radeon_device *rdev, int test_number) |
168 | { |
169 | int i; |
170 | int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = { |
171 | 640 * 480 * 4, |
172 | 720 * 480 * 4, |
173 | 800 * 600 * 4, |
174 | 848 * 480 * 4, |
175 | 1024 * 768 * 4, |
176 | 1152 * 768 * 4, |
177 | 1280 * 720 * 4, |
178 | 1280 * 800 * 4, |
179 | 1280 * 854 * 4, |
180 | 1280 * 960 * 4, |
181 | 1280 * 1024 * 4, |
182 | 1440 * 900 * 4, |
183 | 1400 * 1050 * 4, |
184 | 1680 * 1050 * 4, |
185 | 1600 * 1200 * 4, |
186 | 1920 * 1080 * 4, |
187 | 1920 * 1200 * 4 |
188 | }; |
189 | |
190 | switch (test_number) { |
191 | case 1: |
192 | /* simple test, VRAM to GTT and GTT to VRAM */ |
193 | radeon_benchmark_move(rdev, size: 1024*1024, RADEON_GEM_DOMAIN_GTT, |
194 | RADEON_GEM_DOMAIN_VRAM); |
195 | radeon_benchmark_move(rdev, size: 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
196 | RADEON_GEM_DOMAIN_GTT); |
197 | break; |
198 | case 2: |
199 | /* simple test, VRAM to VRAM */ |
200 | radeon_benchmark_move(rdev, size: 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
201 | RADEON_GEM_DOMAIN_VRAM); |
202 | break; |
203 | case 3: |
204 | /* GTT to VRAM, buffer size sweep, powers of 2 */ |
205 | for (i = 1; i <= 16384; i <<= 1) |
206 | radeon_benchmark_move(rdev, size: i * RADEON_GPU_PAGE_SIZE, |
207 | RADEON_GEM_DOMAIN_GTT, |
208 | RADEON_GEM_DOMAIN_VRAM); |
209 | break; |
210 | case 4: |
211 | /* VRAM to GTT, buffer size sweep, powers of 2 */ |
212 | for (i = 1; i <= 16384; i <<= 1) |
213 | radeon_benchmark_move(rdev, size: i * RADEON_GPU_PAGE_SIZE, |
214 | RADEON_GEM_DOMAIN_VRAM, |
215 | RADEON_GEM_DOMAIN_GTT); |
216 | break; |
217 | case 5: |
218 | /* VRAM to VRAM, buffer size sweep, powers of 2 */ |
219 | for (i = 1; i <= 16384; i <<= 1) |
220 | radeon_benchmark_move(rdev, size: i * RADEON_GPU_PAGE_SIZE, |
221 | RADEON_GEM_DOMAIN_VRAM, |
222 | RADEON_GEM_DOMAIN_VRAM); |
223 | break; |
224 | case 6: |
225 | /* GTT to VRAM, buffer size sweep, common modes */ |
226 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
227 | radeon_benchmark_move(rdev, size: common_modes[i], |
228 | RADEON_GEM_DOMAIN_GTT, |
229 | RADEON_GEM_DOMAIN_VRAM); |
230 | break; |
231 | case 7: |
232 | /* VRAM to GTT, buffer size sweep, common modes */ |
233 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
234 | radeon_benchmark_move(rdev, size: common_modes[i], |
235 | RADEON_GEM_DOMAIN_VRAM, |
236 | RADEON_GEM_DOMAIN_GTT); |
237 | break; |
238 | case 8: |
239 | /* VRAM to VRAM, buffer size sweep, common modes */ |
240 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
241 | radeon_benchmark_move(rdev, size: common_modes[i], |
242 | RADEON_GEM_DOMAIN_VRAM, |
243 | RADEON_GEM_DOMAIN_VRAM); |
244 | break; |
245 | |
246 | default: |
247 | DRM_ERROR("Unknown benchmark\n" ); |
248 | } |
249 | } |
250 | |