1 | /* |
2 | * Copyright 2007-8 Advanced Micro Devices, Inc. |
3 | * Copyright 2008 Red Hat Inc. |
4 | * |
5 | * Permission is hereby granted, free of charge, to any person obtaining a |
6 | * copy of this software and associated documentation files (the "Software"), |
7 | * to deal in the Software without restriction, including without limitation |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
9 | * and/or sell copies of the Software, and to permit persons to whom the |
10 | * Software is furnished to do so, subject to the following conditions: |
11 | * |
12 | * The above copyright notice and this permission notice shall be included in |
13 | * all copies or substantial portions of the Software. |
14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
21 | * OTHER DEALINGS IN THE SOFTWARE. |
22 | * |
23 | * Authors: Dave Airlie |
24 | * Alex Deucher |
25 | */ |
26 | |
27 | #include <linux/pci.h> |
28 | |
29 | #include <drm/drm_device.h> |
30 | #include <drm/radeon_drm.h> |
31 | |
32 | #include <acpi/video.h> |
33 | |
34 | #include "radeon.h" |
35 | #include "radeon_atombios.h" |
36 | #include "radeon_legacy_encoders.h" |
37 | #include "atom.h" |
38 | |
39 | static uint32_t radeon_encoder_clones(struct drm_encoder *encoder) |
40 | { |
41 | struct drm_device *dev = encoder->dev; |
42 | struct radeon_device *rdev = dev->dev_private; |
43 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
44 | struct drm_encoder *clone_encoder; |
45 | uint32_t index_mask = 0; |
46 | int count; |
47 | |
48 | /* DIG routing gets problematic */ |
49 | if (rdev->family >= CHIP_R600) |
50 | return index_mask; |
51 | /* LVDS/TV are too wacky */ |
52 | if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT) |
53 | return index_mask; |
54 | /* DVO requires 2x ppll clocks depending on tmds chip */ |
55 | if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) |
56 | return index_mask; |
57 | |
58 | count = -1; |
59 | list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) { |
60 | struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder); |
61 | |
62 | count++; |
63 | |
64 | if (clone_encoder == encoder) |
65 | continue; |
66 | if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT)) |
67 | continue; |
68 | if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT) |
69 | continue; |
70 | else |
71 | index_mask |= (1 << count); |
72 | } |
73 | return index_mask; |
74 | } |
75 | |
76 | void radeon_setup_encoder_clones(struct drm_device *dev) |
77 | { |
78 | struct drm_encoder *encoder; |
79 | |
80 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
81 | encoder->possible_clones = radeon_encoder_clones(encoder); |
82 | } |
83 | } |
84 | |
85 | uint32_t |
86 | radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac) |
87 | { |
88 | struct radeon_device *rdev = dev->dev_private; |
89 | uint32_t ret = 0; |
90 | |
91 | switch (supported_device) { |
92 | case ATOM_DEVICE_CRT1_SUPPORT: |
93 | case ATOM_DEVICE_TV1_SUPPORT: |
94 | case ATOM_DEVICE_TV2_SUPPORT: |
95 | case ATOM_DEVICE_CRT2_SUPPORT: |
96 | case ATOM_DEVICE_CV_SUPPORT: |
97 | switch (dac) { |
98 | case 1: /* dac a */ |
99 | if ((rdev->family == CHIP_RS300) || |
100 | (rdev->family == CHIP_RS400) || |
101 | (rdev->family == CHIP_RS480)) |
102 | ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; |
103 | else if (ASIC_IS_AVIVO(rdev)) |
104 | ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1; |
105 | else |
106 | ret = ENCODER_INTERNAL_DAC1_ENUM_ID1; |
107 | break; |
108 | case 2: /* dac b */ |
109 | if (ASIC_IS_AVIVO(rdev)) |
110 | ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1; |
111 | else { |
112 | /* if (rdev->family == CHIP_R200) |
113 | * ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
114 | * else |
115 | */ |
116 | ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; |
117 | } |
118 | break; |
119 | case 3: /* external dac */ |
120 | if (ASIC_IS_AVIVO(rdev)) |
121 | ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; |
122 | else |
123 | ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
124 | break; |
125 | } |
126 | break; |
127 | case ATOM_DEVICE_LCD1_SUPPORT: |
128 | if (ASIC_IS_AVIVO(rdev)) |
129 | ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; |
130 | else |
131 | ret = ENCODER_INTERNAL_LVDS_ENUM_ID1; |
132 | break; |
133 | case ATOM_DEVICE_DFP1_SUPPORT: |
134 | if ((rdev->family == CHIP_RS300) || |
135 | (rdev->family == CHIP_RS400) || |
136 | (rdev->family == CHIP_RS480)) |
137 | ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
138 | else if (ASIC_IS_AVIVO(rdev)) |
139 | ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1; |
140 | else |
141 | ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1; |
142 | break; |
143 | case ATOM_DEVICE_LCD2_SUPPORT: |
144 | case ATOM_DEVICE_DFP2_SUPPORT: |
145 | if ((rdev->family == CHIP_RS600) || |
146 | (rdev->family == CHIP_RS690) || |
147 | (rdev->family == CHIP_RS740)) |
148 | ret = ENCODER_INTERNAL_DDI_ENUM_ID1; |
149 | else if (ASIC_IS_AVIVO(rdev)) |
150 | ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; |
151 | else |
152 | ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
153 | break; |
154 | case ATOM_DEVICE_DFP3_SUPPORT: |
155 | ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; |
156 | break; |
157 | } |
158 | |
159 | return ret; |
160 | } |
161 | |
162 | static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder, |
163 | struct drm_connector *connector) |
164 | { |
165 | struct drm_device *dev = radeon_encoder->base.dev; |
166 | struct radeon_device *rdev = dev->dev_private; |
167 | bool use_bl = false; |
168 | |
169 | if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))) |
170 | return; |
171 | |
172 | if (radeon_backlight == 0) { |
173 | use_bl = false; |
174 | } else if (radeon_backlight == 1) { |
175 | use_bl = true; |
176 | } else if (radeon_backlight == -1) { |
177 | /* Quirks */ |
178 | /* Amilo Xi 2550 only works with acpi bl */ |
179 | if ((rdev->pdev->device == 0x9583) && |
180 | (rdev->pdev->subsystem_vendor == 0x1734) && |
181 | (rdev->pdev->subsystem_device == 0x1107)) |
182 | use_bl = false; |
183 | /* Older PPC macs use on-GPU backlight controller */ |
184 | #ifndef CONFIG_PPC_PMAC |
185 | /* disable native backlight control on older asics */ |
186 | else if (rdev->family < CHIP_R600) |
187 | use_bl = false; |
188 | #endif |
189 | else |
190 | use_bl = true; |
191 | } |
192 | |
193 | if (use_bl) { |
194 | if (rdev->is_atom_bios) |
195 | radeon_atom_backlight_init(radeon_encoder, drm_connector: connector); |
196 | else |
197 | radeon_legacy_backlight_init(radeon_encoder, drm_connector: connector); |
198 | } |
199 | |
200 | /* |
201 | * If there is no native backlight device (which may happen even when |
202 | * use_bl==true) try registering an ACPI video backlight device instead. |
203 | */ |
204 | if (!rdev->mode_info.bl_encoder) |
205 | acpi_video_register_backlight(); |
206 | } |
207 | |
208 | void |
209 | radeon_link_encoder_connector(struct drm_device *dev) |
210 | { |
211 | struct drm_connector *connector; |
212 | struct radeon_connector *radeon_connector; |
213 | struct drm_encoder *encoder; |
214 | struct radeon_encoder *radeon_encoder; |
215 | |
216 | /* walk the list and link encoders to connectors */ |
217 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
218 | radeon_connector = to_radeon_connector(connector); |
219 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
220 | radeon_encoder = to_radeon_encoder(encoder); |
221 | if (radeon_encoder->devices & radeon_connector->devices) { |
222 | drm_connector_attach_encoder(connector, encoder); |
223 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) |
224 | radeon_encoder_add_backlight(radeon_encoder, connector); |
225 | } |
226 | } |
227 | } |
228 | } |
229 | |
230 | void radeon_encoder_set_active_device(struct drm_encoder *encoder) |
231 | { |
232 | struct drm_device *dev = encoder->dev; |
233 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
234 | struct drm_connector *connector; |
235 | |
236 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
237 | if (connector->encoder == encoder) { |
238 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
239 | |
240 | radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices; |
241 | DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n" , |
242 | radeon_encoder->active_device, radeon_encoder->devices, |
243 | radeon_connector->devices, encoder->encoder_type); |
244 | } |
245 | } |
246 | } |
247 | |
248 | struct drm_connector * |
249 | radeon_get_connector_for_encoder(struct drm_encoder *encoder) |
250 | { |
251 | struct drm_device *dev = encoder->dev; |
252 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
253 | struct drm_connector *connector; |
254 | struct radeon_connector *radeon_connector; |
255 | |
256 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
257 | radeon_connector = to_radeon_connector(connector); |
258 | if (radeon_encoder->active_device & radeon_connector->devices) |
259 | return connector; |
260 | } |
261 | return NULL; |
262 | } |
263 | |
264 | struct drm_connector * |
265 | radeon_get_connector_for_encoder_init(struct drm_encoder *encoder) |
266 | { |
267 | struct drm_device *dev = encoder->dev; |
268 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
269 | struct drm_connector *connector; |
270 | struct radeon_connector *radeon_connector; |
271 | |
272 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
273 | radeon_connector = to_radeon_connector(connector); |
274 | if (radeon_encoder->devices & radeon_connector->devices) |
275 | return connector; |
276 | } |
277 | return NULL; |
278 | } |
279 | |
280 | struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder) |
281 | { |
282 | struct drm_device *dev = encoder->dev; |
283 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
284 | struct drm_encoder *other_encoder; |
285 | struct radeon_encoder *other_radeon_encoder; |
286 | |
287 | if (radeon_encoder->is_ext_encoder) |
288 | return NULL; |
289 | |
290 | list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) { |
291 | if (other_encoder == encoder) |
292 | continue; |
293 | other_radeon_encoder = to_radeon_encoder(other_encoder); |
294 | if (other_radeon_encoder->is_ext_encoder && |
295 | (radeon_encoder->devices & other_radeon_encoder->devices)) |
296 | return other_encoder; |
297 | } |
298 | return NULL; |
299 | } |
300 | |
301 | u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder) |
302 | { |
303 | struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder); |
304 | |
305 | if (other_encoder) { |
306 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder); |
307 | |
308 | switch (radeon_encoder->encoder_id) { |
309 | case ENCODER_OBJECT_ID_TRAVIS: |
310 | case ENCODER_OBJECT_ID_NUTMEG: |
311 | return radeon_encoder->encoder_id; |
312 | default: |
313 | return ENCODER_OBJECT_ID_NONE; |
314 | } |
315 | } |
316 | return ENCODER_OBJECT_ID_NONE; |
317 | } |
318 | |
319 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, |
320 | struct drm_display_mode *adjusted_mode) |
321 | { |
322 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
323 | struct drm_device *dev = encoder->dev; |
324 | struct radeon_device *rdev = dev->dev_private; |
325 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
326 | unsigned int hblank = native_mode->htotal - native_mode->hdisplay; |
327 | unsigned int vblank = native_mode->vtotal - native_mode->vdisplay; |
328 | unsigned int hover = native_mode->hsync_start - native_mode->hdisplay; |
329 | unsigned int vover = native_mode->vsync_start - native_mode->vdisplay; |
330 | unsigned int hsync_width = native_mode->hsync_end - native_mode->hsync_start; |
331 | unsigned int vsync_width = native_mode->vsync_end - native_mode->vsync_start; |
332 | |
333 | adjusted_mode->clock = native_mode->clock; |
334 | adjusted_mode->flags = native_mode->flags; |
335 | |
336 | if (ASIC_IS_AVIVO(rdev)) { |
337 | adjusted_mode->hdisplay = native_mode->hdisplay; |
338 | adjusted_mode->vdisplay = native_mode->vdisplay; |
339 | } |
340 | |
341 | adjusted_mode->htotal = native_mode->hdisplay + hblank; |
342 | adjusted_mode->hsync_start = native_mode->hdisplay + hover; |
343 | adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; |
344 | |
345 | adjusted_mode->vtotal = native_mode->vdisplay + vblank; |
346 | adjusted_mode->vsync_start = native_mode->vdisplay + vover; |
347 | adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; |
348 | |
349 | drm_mode_set_crtcinfo(p: adjusted_mode, CRTC_INTERLACE_HALVE_V); |
350 | |
351 | if (ASIC_IS_AVIVO(rdev)) { |
352 | adjusted_mode->crtc_hdisplay = native_mode->hdisplay; |
353 | adjusted_mode->crtc_vdisplay = native_mode->vdisplay; |
354 | } |
355 | |
356 | adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank; |
357 | adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; |
358 | adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; |
359 | |
360 | adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; |
361 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover; |
362 | adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width; |
363 | |
364 | } |
365 | |
366 | bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, |
367 | u32 pixel_clock) |
368 | { |
369 | struct drm_device *dev = encoder->dev; |
370 | struct radeon_device *rdev = dev->dev_private; |
371 | struct drm_connector *connector; |
372 | struct radeon_connector *radeon_connector; |
373 | struct radeon_connector_atom_dig *dig_connector; |
374 | |
375 | connector = radeon_get_connector_for_encoder(encoder); |
376 | /* if we don't have an active device yet, just use one of |
377 | * the connectors tied to the encoder. |
378 | */ |
379 | if (!connector) |
380 | connector = radeon_get_connector_for_encoder_init(encoder); |
381 | radeon_connector = to_radeon_connector(connector); |
382 | |
383 | switch (connector->connector_type) { |
384 | case DRM_MODE_CONNECTOR_DVII: |
385 | case DRM_MODE_CONNECTOR_HDMIB: |
386 | if (radeon_connector->use_digital) { |
387 | /* HDMI 1.3 supports up to 340 Mhz over single link */ |
388 | if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(edid: radeon_connector_edid(connector))) { |
389 | if (pixel_clock > 340000) |
390 | return true; |
391 | else |
392 | return false; |
393 | } else { |
394 | if (pixel_clock > 165000) |
395 | return true; |
396 | else |
397 | return false; |
398 | } |
399 | } else |
400 | return false; |
401 | case DRM_MODE_CONNECTOR_DVID: |
402 | case DRM_MODE_CONNECTOR_HDMIA: |
403 | case DRM_MODE_CONNECTOR_DisplayPort: |
404 | dig_connector = radeon_connector->con_priv; |
405 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
406 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) |
407 | return false; |
408 | else { |
409 | /* HDMI 1.3 supports up to 340 Mhz over single link */ |
410 | if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(edid: radeon_connector_edid(connector))) { |
411 | if (pixel_clock > 340000) |
412 | return true; |
413 | else |
414 | return false; |
415 | } else { |
416 | if (pixel_clock > 165000) |
417 | return true; |
418 | else |
419 | return false; |
420 | } |
421 | } |
422 | default: |
423 | return false; |
424 | } |
425 | } |
426 | |
427 | bool radeon_encoder_is_digital(struct drm_encoder *encoder) |
428 | { |
429 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
430 | |
431 | switch (radeon_encoder->encoder_id) { |
432 | case ENCODER_OBJECT_ID_INTERNAL_LVDS: |
433 | case ENCODER_OBJECT_ID_INTERNAL_TMDS1: |
434 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: |
435 | case ENCODER_OBJECT_ID_INTERNAL_LVTM1: |
436 | case ENCODER_OBJECT_ID_INTERNAL_DVO1: |
437 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: |
438 | case ENCODER_OBJECT_ID_INTERNAL_DDI: |
439 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
440 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
441 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
442 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
443 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3: |
444 | return true; |
445 | default: |
446 | return false; |
447 | } |
448 | } |
449 | |