1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * INA3221 Triple Current/Voltage Monitor |
4 | * |
5 | * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ |
6 | * Andrew F. Davis <afd@ti.com> |
7 | */ |
8 | |
9 | #include <linux/debugfs.h> |
10 | #include <linux/hwmon.h> |
11 | #include <linux/hwmon-sysfs.h> |
12 | #include <linux/i2c.h> |
13 | #include <linux/module.h> |
14 | #include <linux/mutex.h> |
15 | #include <linux/of.h> |
16 | #include <linux/pm_runtime.h> |
17 | #include <linux/regmap.h> |
18 | #include <linux/util_macros.h> |
19 | |
20 | #define INA3221_DRIVER_NAME "ina3221" |
21 | |
22 | #define INA3221_CONFIG 0x00 |
23 | #define INA3221_SHUNT1 0x01 |
24 | #define INA3221_BUS1 0x02 |
25 | #define INA3221_SHUNT2 0x03 |
26 | #define INA3221_BUS2 0x04 |
27 | #define INA3221_SHUNT3 0x05 |
28 | #define INA3221_BUS3 0x06 |
29 | #define INA3221_CRIT1 0x07 |
30 | #define INA3221_WARN1 0x08 |
31 | #define INA3221_CRIT2 0x09 |
32 | #define INA3221_WARN2 0x0a |
33 | #define INA3221_CRIT3 0x0b |
34 | #define INA3221_WARN3 0x0c |
35 | #define INA3221_SHUNT_SUM 0x0d |
36 | #define INA3221_CRIT_SUM 0x0e |
37 | #define INA3221_MASK_ENABLE 0x0f |
38 | |
39 | #define INA3221_CONFIG_MODE_MASK GENMASK(2, 0) |
40 | #define INA3221_CONFIG_MODE_POWERDOWN 0 |
41 | #define INA3221_CONFIG_MODE_SHUNT BIT(0) |
42 | #define INA3221_CONFIG_MODE_BUS BIT(1) |
43 | #define INA3221_CONFIG_MODE_CONTINUOUS BIT(2) |
44 | #define INA3221_CONFIG_VSH_CT_SHIFT 3 |
45 | #define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3) |
46 | #define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3) |
47 | #define INA3221_CONFIG_VBUS_CT_SHIFT 6 |
48 | #define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6) |
49 | #define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6) |
50 | #define INA3221_CONFIG_AVG_SHIFT 9 |
51 | #define INA3221_CONFIG_AVG_MASK GENMASK(11, 9) |
52 | #define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9) |
53 | #define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12) |
54 | #define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x)) |
55 | |
56 | #define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12) |
57 | |
58 | #define INA3221_CONFIG_DEFAULT 0x7127 |
59 | #define INA3221_RSHUNT_DEFAULT 10000 |
60 | |
61 | enum ina3221_fields { |
62 | /* Configuration */ |
63 | F_RST, |
64 | |
65 | /* Status Flags */ |
66 | F_CVRF, |
67 | |
68 | /* Warning Flags */ |
69 | F_WF3, F_WF2, F_WF1, |
70 | |
71 | /* Alert Flags: SF is the summation-alert flag */ |
72 | F_SF, F_CF3, F_CF2, F_CF1, |
73 | |
74 | /* sentinel */ |
75 | F_MAX_FIELDS |
76 | }; |
77 | |
78 | static const struct reg_field ina3221_reg_fields[] = { |
79 | [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15), |
80 | |
81 | [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0), |
82 | [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3), |
83 | [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4), |
84 | [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5), |
85 | [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6), |
86 | [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7), |
87 | [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8), |
88 | [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9), |
89 | }; |
90 | |
91 | enum ina3221_channels { |
92 | INA3221_CHANNEL1, |
93 | INA3221_CHANNEL2, |
94 | INA3221_CHANNEL3, |
95 | INA3221_NUM_CHANNELS |
96 | }; |
97 | |
98 | /** |
99 | * struct ina3221_input - channel input source specific information |
100 | * @label: label of channel input source |
101 | * @shunt_resistor: shunt resistor value of channel input source |
102 | * @disconnected: connection status of channel input source |
103 | * @summation_disable: channel summation status of input source |
104 | */ |
105 | struct ina3221_input { |
106 | const char *label; |
107 | int shunt_resistor; |
108 | bool disconnected; |
109 | bool summation_disable; |
110 | }; |
111 | |
112 | /** |
113 | * struct ina3221_data - device specific information |
114 | * @pm_dev: Device pointer for pm runtime |
115 | * @regmap: Register map of the device |
116 | * @fields: Register fields of the device |
117 | * @inputs: Array of channel input source specific structures |
118 | * @lock: mutex lock to serialize sysfs attribute accesses |
119 | * @debugfs: Pointer to debugfs entry for device |
120 | * @reg_config: Register value of INA3221_CONFIG |
121 | * @summation_shunt_resistor: equivalent shunt resistor value for summation |
122 | * @summation_channel_control: Value written to SCC field in INA3221_MASK_ENABLE |
123 | * @single_shot: running in single-shot operating mode |
124 | */ |
125 | struct ina3221_data { |
126 | struct device *pm_dev; |
127 | struct regmap *regmap; |
128 | struct regmap_field *fields[F_MAX_FIELDS]; |
129 | struct ina3221_input inputs[INA3221_NUM_CHANNELS]; |
130 | struct mutex lock; |
131 | struct dentry *debugfs; |
132 | u32 reg_config; |
133 | int summation_shunt_resistor; |
134 | u32 summation_channel_control; |
135 | |
136 | bool single_shot; |
137 | }; |
138 | |
139 | static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel) |
140 | { |
141 | /* Summation channel checks shunt resistor values */ |
142 | if (channel > INA3221_CHANNEL3) |
143 | return ina->summation_shunt_resistor != 0; |
144 | |
145 | return pm_runtime_active(dev: ina->pm_dev) && |
146 | (ina->reg_config & INA3221_CONFIG_CHx_EN(channel)); |
147 | } |
148 | |
149 | /* |
150 | * Helper function to return the resistor value for current summation. |
151 | * |
152 | * There is a condition to calculate current summation -- all the shunt |
153 | * resistor values should be the same, so as to simply fit the formula: |
154 | * current summation = shunt voltage summation / shunt resistor |
155 | * |
156 | * Returns the equivalent shunt resistor value on success or 0 on failure |
157 | */ |
158 | static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina) |
159 | { |
160 | struct ina3221_input *input = ina->inputs; |
161 | int i, shunt_resistor = 0; |
162 | |
163 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
164 | if (input[i].disconnected || !input[i].shunt_resistor || |
165 | input[i].summation_disable) |
166 | continue; |
167 | if (!shunt_resistor) { |
168 | /* Found the reference shunt resistor value */ |
169 | shunt_resistor = input[i].shunt_resistor; |
170 | } else { |
171 | /* No summation if resistor values are different */ |
172 | if (shunt_resistor != input[i].shunt_resistor) |
173 | return 0; |
174 | } |
175 | } |
176 | |
177 | return shunt_resistor; |
178 | } |
179 | |
180 | /* Lookup table for Bus and Shunt conversion times in usec */ |
181 | static const u16 ina3221_conv_time[] = { |
182 | 140, 204, 332, 588, 1100, 2116, 4156, 8244, |
183 | }; |
184 | |
185 | /* Lookup table for number of samples using in averaging mode */ |
186 | static const int ina3221_avg_samples[] = { |
187 | 1, 4, 16, 64, 128, 256, 512, 1024, |
188 | }; |
189 | |
190 | /* Converting update_interval in msec to conversion time in usec */ |
191 | static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval) |
192 | { |
193 | u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); |
194 | u32 samples_idx = INA3221_CONFIG_AVG(config); |
195 | u32 samples = ina3221_avg_samples[samples_idx]; |
196 | |
197 | /* Bisect the result to Bus and Shunt conversion times */ |
198 | return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples); |
199 | } |
200 | |
201 | /* Converting CONFIG register value to update_interval in usec */ |
202 | static inline u32 ina3221_reg_to_interval_us(u16 config) |
203 | { |
204 | u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); |
205 | u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config); |
206 | u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config); |
207 | u32 vbus_ct = ina3221_conv_time[vbus_ct_idx]; |
208 | u32 vsh_ct = ina3221_conv_time[vsh_ct_idx]; |
209 | |
210 | /* Calculate total conversion time */ |
211 | return channels * (vbus_ct + vsh_ct); |
212 | } |
213 | |
214 | static inline int ina3221_wait_for_data(struct ina3221_data *ina) |
215 | { |
216 | u32 wait, cvrf; |
217 | |
218 | wait = ina3221_reg_to_interval_us(config: ina->reg_config); |
219 | |
220 | /* Polling the CVRF bit to make sure read data is ready */ |
221 | return regmap_field_read_poll_timeout(ina->fields[F_CVRF], |
222 | cvrf, cvrf, wait, wait * 2); |
223 | } |
224 | |
225 | static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg, |
226 | int *val) |
227 | { |
228 | unsigned int regval; |
229 | int ret; |
230 | |
231 | ret = regmap_read(map: ina->regmap, reg, val: ®val); |
232 | if (ret) |
233 | return ret; |
234 | |
235 | /* |
236 | * Shunt Voltage Sum register has 14-bit value with 1-bit shift |
237 | * Other Shunt Voltage registers have 12 bits with 3-bit shift |
238 | */ |
239 | if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM) |
240 | *val = sign_extend32(value: regval >> 1, index: 14); |
241 | else |
242 | *val = sign_extend32(value: regval >> 3, index: 12); |
243 | |
244 | return 0; |
245 | } |
246 | |
247 | static const u8 ina3221_in_reg[] = { |
248 | INA3221_BUS1, |
249 | INA3221_BUS2, |
250 | INA3221_BUS3, |
251 | INA3221_SHUNT1, |
252 | INA3221_SHUNT2, |
253 | INA3221_SHUNT3, |
254 | INA3221_SHUNT_SUM, |
255 | }; |
256 | |
257 | static int ina3221_read_chip(struct device *dev, u32 attr, long *val) |
258 | { |
259 | struct ina3221_data *ina = dev_get_drvdata(dev); |
260 | int regval; |
261 | |
262 | switch (attr) { |
263 | case hwmon_chip_samples: |
264 | regval = INA3221_CONFIG_AVG(ina->reg_config); |
265 | *val = ina3221_avg_samples[regval]; |
266 | return 0; |
267 | case hwmon_chip_update_interval: |
268 | /* Return in msec */ |
269 | *val = ina3221_reg_to_interval_us(config: ina->reg_config); |
270 | *val = DIV_ROUND_CLOSEST(*val, 1000); |
271 | return 0; |
272 | default: |
273 | return -EOPNOTSUPP; |
274 | } |
275 | } |
276 | |
277 | static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val) |
278 | { |
279 | const bool is_shunt = channel > INA3221_CHANNEL3; |
280 | struct ina3221_data *ina = dev_get_drvdata(dev); |
281 | u8 reg = ina3221_in_reg[channel]; |
282 | int regval, ret; |
283 | |
284 | /* |
285 | * Translate shunt channel index to sensor channel index except |
286 | * the 7th channel (6 since being 0-aligned) is for summation. |
287 | */ |
288 | if (channel != 6) |
289 | channel %= INA3221_NUM_CHANNELS; |
290 | |
291 | switch (attr) { |
292 | case hwmon_in_input: |
293 | if (!ina3221_is_enabled(ina, channel)) |
294 | return -ENODATA; |
295 | |
296 | /* Write CONFIG register to trigger a single-shot measurement */ |
297 | if (ina->single_shot) { |
298 | regmap_write(map: ina->regmap, INA3221_CONFIG, |
299 | val: ina->reg_config); |
300 | |
301 | ret = ina3221_wait_for_data(ina); |
302 | if (ret) |
303 | return ret; |
304 | } |
305 | |
306 | ret = ina3221_read_value(ina, reg, val: ®val); |
307 | if (ret) |
308 | return ret; |
309 | |
310 | /* |
311 | * Scale of shunt voltage (uV): LSB is 40uV |
312 | * Scale of bus voltage (mV): LSB is 8mV |
313 | */ |
314 | *val = regval * (is_shunt ? 40 : 8); |
315 | return 0; |
316 | case hwmon_in_enable: |
317 | *val = ina3221_is_enabled(ina, channel); |
318 | return 0; |
319 | default: |
320 | return -EOPNOTSUPP; |
321 | } |
322 | } |
323 | |
324 | static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = { |
325 | [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2, |
326 | INA3221_SHUNT3, INA3221_SHUNT_SUM }, |
327 | [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 }, |
328 | [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2, |
329 | INA3221_CRIT3, INA3221_CRIT_SUM }, |
330 | [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 }, |
331 | [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF }, |
332 | }; |
333 | |
334 | static int ina3221_read_curr(struct device *dev, u32 attr, |
335 | int channel, long *val) |
336 | { |
337 | struct ina3221_data *ina = dev_get_drvdata(dev); |
338 | struct ina3221_input *input = ina->inputs; |
339 | u8 reg = ina3221_curr_reg[attr][channel]; |
340 | int resistance_uo, voltage_nv; |
341 | int regval, ret; |
342 | |
343 | if (channel > INA3221_CHANNEL3) |
344 | resistance_uo = ina->summation_shunt_resistor; |
345 | else |
346 | resistance_uo = input[channel].shunt_resistor; |
347 | |
348 | switch (attr) { |
349 | case hwmon_curr_input: |
350 | if (!ina3221_is_enabled(ina, channel)) |
351 | return -ENODATA; |
352 | |
353 | /* Write CONFIG register to trigger a single-shot measurement */ |
354 | if (ina->single_shot) { |
355 | regmap_write(map: ina->regmap, INA3221_CONFIG, |
356 | val: ina->reg_config); |
357 | |
358 | ret = ina3221_wait_for_data(ina); |
359 | if (ret) |
360 | return ret; |
361 | } |
362 | |
363 | fallthrough; |
364 | case hwmon_curr_crit: |
365 | case hwmon_curr_max: |
366 | if (!resistance_uo) |
367 | return -ENODATA; |
368 | |
369 | ret = ina3221_read_value(ina, reg, val: ®val); |
370 | if (ret) |
371 | return ret; |
372 | |
373 | /* Scale of shunt voltage: LSB is 40uV (40000nV) */ |
374 | voltage_nv = regval * 40000; |
375 | /* Return current in mA */ |
376 | *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo); |
377 | return 0; |
378 | case hwmon_curr_crit_alarm: |
379 | case hwmon_curr_max_alarm: |
380 | /* No actual register read if channel is disabled */ |
381 | if (!ina3221_is_enabled(ina, channel)) { |
382 | /* Return 0 for alert flags */ |
383 | *val = 0; |
384 | return 0; |
385 | } |
386 | ret = regmap_field_read(field: ina->fields[reg], val: ®val); |
387 | if (ret) |
388 | return ret; |
389 | *val = regval; |
390 | return 0; |
391 | default: |
392 | return -EOPNOTSUPP; |
393 | } |
394 | } |
395 | |
396 | static int ina3221_write_chip(struct device *dev, u32 attr, long val) |
397 | { |
398 | struct ina3221_data *ina = dev_get_drvdata(dev); |
399 | int ret, idx; |
400 | u32 tmp; |
401 | |
402 | switch (attr) { |
403 | case hwmon_chip_samples: |
404 | idx = find_closest(val, ina3221_avg_samples, |
405 | ARRAY_SIZE(ina3221_avg_samples)); |
406 | |
407 | tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) | |
408 | (idx << INA3221_CONFIG_AVG_SHIFT); |
409 | ret = regmap_write(map: ina->regmap, INA3221_CONFIG, val: tmp); |
410 | if (ret) |
411 | return ret; |
412 | |
413 | /* Update reg_config accordingly */ |
414 | ina->reg_config = tmp; |
415 | return 0; |
416 | case hwmon_chip_update_interval: |
417 | tmp = ina3221_interval_ms_to_conv_time(config: ina->reg_config, interval: val); |
418 | idx = find_closest(tmp, ina3221_conv_time, |
419 | ARRAY_SIZE(ina3221_conv_time)); |
420 | |
421 | /* Update Bus and Shunt voltage conversion times */ |
422 | tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK; |
423 | tmp = (ina->reg_config & ~tmp) | |
424 | (idx << INA3221_CONFIG_VBUS_CT_SHIFT) | |
425 | (idx << INA3221_CONFIG_VSH_CT_SHIFT); |
426 | ret = regmap_write(map: ina->regmap, INA3221_CONFIG, val: tmp); |
427 | if (ret) |
428 | return ret; |
429 | |
430 | /* Update reg_config accordingly */ |
431 | ina->reg_config = tmp; |
432 | return 0; |
433 | default: |
434 | return -EOPNOTSUPP; |
435 | } |
436 | } |
437 | |
438 | static int ina3221_write_curr(struct device *dev, u32 attr, |
439 | int channel, long val) |
440 | { |
441 | struct ina3221_data *ina = dev_get_drvdata(dev); |
442 | struct ina3221_input *input = ina->inputs; |
443 | u8 reg = ina3221_curr_reg[attr][channel]; |
444 | int resistance_uo, current_ma, voltage_uv; |
445 | int regval; |
446 | |
447 | if (channel > INA3221_CHANNEL3) |
448 | resistance_uo = ina->summation_shunt_resistor; |
449 | else |
450 | resistance_uo = input[channel].shunt_resistor; |
451 | |
452 | if (!resistance_uo) |
453 | return -EOPNOTSUPP; |
454 | |
455 | /* clamp current */ |
456 | current_ma = clamp_val(val, |
457 | INT_MIN / resistance_uo, |
458 | INT_MAX / resistance_uo); |
459 | |
460 | voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000); |
461 | |
462 | /* clamp voltage */ |
463 | voltage_uv = clamp_val(voltage_uv, -163800, 163800); |
464 | |
465 | /* |
466 | * Formula to convert voltage_uv to register value: |
467 | * regval = (voltage_uv / scale) << shift |
468 | * Note: |
469 | * The scale is 40uV for all shunt voltage registers |
470 | * Shunt Voltage Sum register left-shifts 1 bit |
471 | * All other Shunt Voltage registers shift 3 bits |
472 | * Results: |
473 | * SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV |
474 | * SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV |
475 | */ |
476 | if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM) |
477 | regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe; |
478 | else |
479 | regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8; |
480 | |
481 | return regmap_write(map: ina->regmap, reg, val: regval); |
482 | } |
483 | |
484 | static int ina3221_write_enable(struct device *dev, int channel, bool enable) |
485 | { |
486 | struct ina3221_data *ina = dev_get_drvdata(dev); |
487 | u16 config, mask = INA3221_CONFIG_CHx_EN(channel); |
488 | u16 config_old = ina->reg_config & mask; |
489 | u32 tmp; |
490 | int ret; |
491 | |
492 | config = enable ? mask : 0; |
493 | |
494 | /* Bypass if enable status is not being changed */ |
495 | if (config_old == config) |
496 | return 0; |
497 | |
498 | /* For enabling routine, increase refcount and resume() at first */ |
499 | if (enable) { |
500 | ret = pm_runtime_resume_and_get(dev: ina->pm_dev); |
501 | if (ret < 0) { |
502 | dev_err(dev, "Failed to get PM runtime\n" ); |
503 | return ret; |
504 | } |
505 | } |
506 | |
507 | /* Enable or disable the channel */ |
508 | tmp = (ina->reg_config & ~mask) | (config & mask); |
509 | ret = regmap_write(map: ina->regmap, INA3221_CONFIG, val: tmp); |
510 | if (ret) |
511 | goto fail; |
512 | |
513 | /* Cache the latest config register value */ |
514 | ina->reg_config = tmp; |
515 | |
516 | /* For disabling routine, decrease refcount or suspend() at last */ |
517 | if (!enable) |
518 | pm_runtime_put_sync(dev: ina->pm_dev); |
519 | |
520 | return 0; |
521 | |
522 | fail: |
523 | if (enable) { |
524 | dev_err(dev, "Failed to enable channel %d: error %d\n" , |
525 | channel, ret); |
526 | pm_runtime_put_sync(dev: ina->pm_dev); |
527 | } |
528 | |
529 | return ret; |
530 | } |
531 | |
532 | static int ina3221_read(struct device *dev, enum hwmon_sensor_types type, |
533 | u32 attr, int channel, long *val) |
534 | { |
535 | struct ina3221_data *ina = dev_get_drvdata(dev); |
536 | int ret; |
537 | |
538 | mutex_lock(&ina->lock); |
539 | |
540 | switch (type) { |
541 | case hwmon_chip: |
542 | ret = ina3221_read_chip(dev, attr, val); |
543 | break; |
544 | case hwmon_in: |
545 | /* 0-align channel ID */ |
546 | ret = ina3221_read_in(dev, attr, channel: channel - 1, val); |
547 | break; |
548 | case hwmon_curr: |
549 | ret = ina3221_read_curr(dev, attr, channel, val); |
550 | break; |
551 | default: |
552 | ret = -EOPNOTSUPP; |
553 | break; |
554 | } |
555 | |
556 | mutex_unlock(lock: &ina->lock); |
557 | |
558 | return ret; |
559 | } |
560 | |
561 | static int ina3221_write(struct device *dev, enum hwmon_sensor_types type, |
562 | u32 attr, int channel, long val) |
563 | { |
564 | struct ina3221_data *ina = dev_get_drvdata(dev); |
565 | int ret; |
566 | |
567 | mutex_lock(&ina->lock); |
568 | |
569 | switch (type) { |
570 | case hwmon_chip: |
571 | ret = ina3221_write_chip(dev, attr, val); |
572 | break; |
573 | case hwmon_in: |
574 | /* 0-align channel ID */ |
575 | ret = ina3221_write_enable(dev, channel: channel - 1, enable: val); |
576 | break; |
577 | case hwmon_curr: |
578 | ret = ina3221_write_curr(dev, attr, channel, val); |
579 | break; |
580 | default: |
581 | ret = -EOPNOTSUPP; |
582 | break; |
583 | } |
584 | |
585 | mutex_unlock(lock: &ina->lock); |
586 | |
587 | return ret; |
588 | } |
589 | |
590 | static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type, |
591 | u32 attr, int channel, const char **str) |
592 | { |
593 | struct ina3221_data *ina = dev_get_drvdata(dev); |
594 | int index = channel - 1; |
595 | |
596 | if (channel == 7) |
597 | *str = "sum of shunt voltages" ; |
598 | else |
599 | *str = ina->inputs[index].label; |
600 | |
601 | return 0; |
602 | } |
603 | |
604 | static umode_t ina3221_is_visible(const void *drvdata, |
605 | enum hwmon_sensor_types type, |
606 | u32 attr, int channel) |
607 | { |
608 | const struct ina3221_data *ina = drvdata; |
609 | const struct ina3221_input *input = NULL; |
610 | |
611 | switch (type) { |
612 | case hwmon_chip: |
613 | switch (attr) { |
614 | case hwmon_chip_samples: |
615 | case hwmon_chip_update_interval: |
616 | return 0644; |
617 | default: |
618 | return 0; |
619 | } |
620 | case hwmon_in: |
621 | /* Ignore in0_ */ |
622 | if (channel == 0) |
623 | return 0; |
624 | |
625 | switch (attr) { |
626 | case hwmon_in_label: |
627 | if (channel - 1 <= INA3221_CHANNEL3) |
628 | input = &ina->inputs[channel - 1]; |
629 | else if (channel == 7) |
630 | return 0444; |
631 | /* Hide label node if label is not provided */ |
632 | return (input && input->label) ? 0444 : 0; |
633 | case hwmon_in_input: |
634 | return 0444; |
635 | case hwmon_in_enable: |
636 | return 0644; |
637 | default: |
638 | return 0; |
639 | } |
640 | case hwmon_curr: |
641 | switch (attr) { |
642 | case hwmon_curr_input: |
643 | case hwmon_curr_crit_alarm: |
644 | case hwmon_curr_max_alarm: |
645 | return 0444; |
646 | case hwmon_curr_crit: |
647 | case hwmon_curr_max: |
648 | return 0644; |
649 | default: |
650 | return 0; |
651 | } |
652 | default: |
653 | return 0; |
654 | } |
655 | } |
656 | |
657 | #define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \ |
658 | HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \ |
659 | HWMON_C_MAX | HWMON_C_MAX_ALARM) |
660 | |
661 | static const struct hwmon_channel_info * const ina3221_info[] = { |
662 | HWMON_CHANNEL_INFO(chip, |
663 | HWMON_C_SAMPLES, |
664 | HWMON_C_UPDATE_INTERVAL), |
665 | HWMON_CHANNEL_INFO(in, |
666 | /* 0: dummy, skipped in is_visible */ |
667 | HWMON_I_INPUT, |
668 | /* 1-3: input voltage Channels */ |
669 | HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, |
670 | HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, |
671 | HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, |
672 | /* 4-6: shunt voltage Channels */ |
673 | HWMON_I_INPUT, |
674 | HWMON_I_INPUT, |
675 | HWMON_I_INPUT, |
676 | /* 7: summation of shunt voltage channels */ |
677 | HWMON_I_INPUT | HWMON_I_LABEL), |
678 | HWMON_CHANNEL_INFO(curr, |
679 | /* 1-3: current channels*/ |
680 | INA3221_HWMON_CURR_CONFIG, |
681 | INA3221_HWMON_CURR_CONFIG, |
682 | INA3221_HWMON_CURR_CONFIG, |
683 | /* 4: summation of current channels */ |
684 | HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM), |
685 | NULL |
686 | }; |
687 | |
688 | static const struct hwmon_ops ina3221_hwmon_ops = { |
689 | .is_visible = ina3221_is_visible, |
690 | .read_string = ina3221_read_string, |
691 | .read = ina3221_read, |
692 | .write = ina3221_write, |
693 | }; |
694 | |
695 | static const struct hwmon_chip_info ina3221_chip_info = { |
696 | .ops = &ina3221_hwmon_ops, |
697 | .info = ina3221_info, |
698 | }; |
699 | |
700 | /* Extra attribute groups */ |
701 | static ssize_t ina3221_shunt_show(struct device *dev, |
702 | struct device_attribute *attr, char *buf) |
703 | { |
704 | struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
705 | struct ina3221_data *ina = dev_get_drvdata(dev); |
706 | unsigned int channel = sd_attr->index; |
707 | struct ina3221_input *input = &ina->inputs[channel]; |
708 | |
709 | return sysfs_emit(buf, fmt: "%d\n" , input->shunt_resistor); |
710 | } |
711 | |
712 | static ssize_t ina3221_shunt_store(struct device *dev, |
713 | struct device_attribute *attr, |
714 | const char *buf, size_t count) |
715 | { |
716 | struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
717 | struct ina3221_data *ina = dev_get_drvdata(dev); |
718 | unsigned int channel = sd_attr->index; |
719 | struct ina3221_input *input = &ina->inputs[channel]; |
720 | int val; |
721 | int ret; |
722 | |
723 | ret = kstrtoint(s: buf, base: 0, res: &val); |
724 | if (ret) |
725 | return ret; |
726 | |
727 | val = clamp_val(val, 1, INT_MAX); |
728 | |
729 | input->shunt_resistor = val; |
730 | |
731 | /* Update summation_shunt_resistor for summation channel */ |
732 | ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); |
733 | |
734 | return count; |
735 | } |
736 | |
737 | /* shunt resistance */ |
738 | static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1); |
739 | static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2); |
740 | static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3); |
741 | |
742 | static struct attribute *ina3221_attrs[] = { |
743 | &sensor_dev_attr_shunt1_resistor.dev_attr.attr, |
744 | &sensor_dev_attr_shunt2_resistor.dev_attr.attr, |
745 | &sensor_dev_attr_shunt3_resistor.dev_attr.attr, |
746 | NULL, |
747 | }; |
748 | ATTRIBUTE_GROUPS(ina3221); |
749 | |
750 | static const struct regmap_range ina3221_yes_ranges[] = { |
751 | regmap_reg_range(INA3221_CONFIG, INA3221_BUS3), |
752 | regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM), |
753 | regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE), |
754 | }; |
755 | |
756 | static const struct regmap_access_table ina3221_volatile_table = { |
757 | .yes_ranges = ina3221_yes_ranges, |
758 | .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges), |
759 | }; |
760 | |
761 | static const struct regmap_config ina3221_regmap_config = { |
762 | .reg_bits = 8, |
763 | .val_bits = 16, |
764 | |
765 | .cache_type = REGCACHE_RBTREE, |
766 | .volatile_table = &ina3221_volatile_table, |
767 | }; |
768 | |
769 | static int ina3221_probe_child_from_dt(struct device *dev, |
770 | struct device_node *child, |
771 | struct ina3221_data *ina) |
772 | { |
773 | struct ina3221_input *input; |
774 | u32 val; |
775 | int ret; |
776 | |
777 | ret = of_property_read_u32(np: child, propname: "reg" , out_value: &val); |
778 | if (ret) { |
779 | dev_err(dev, "missing reg property of %pOFn\n" , child); |
780 | return ret; |
781 | } else if (val > INA3221_CHANNEL3) { |
782 | dev_err(dev, "invalid reg %d of %pOFn\n" , val, child); |
783 | return -EINVAL; |
784 | } |
785 | |
786 | input = &ina->inputs[val]; |
787 | |
788 | /* Log the disconnected channel input */ |
789 | if (!of_device_is_available(device: child)) { |
790 | input->disconnected = true; |
791 | return 0; |
792 | } |
793 | |
794 | /* Save the connected input label if available */ |
795 | of_property_read_string(np: child, propname: "label" , out_string: &input->label); |
796 | |
797 | /* summation channel control */ |
798 | input->summation_disable = of_property_read_bool(np: child, propname: "ti,summation-disable" ); |
799 | |
800 | /* Overwrite default shunt resistor value optionally */ |
801 | if (!of_property_read_u32(np: child, propname: "shunt-resistor-micro-ohms" , out_value: &val)) { |
802 | if (val < 1 || val > INT_MAX) { |
803 | dev_err(dev, "invalid shunt resistor value %u of %pOFn\n" , |
804 | val, child); |
805 | return -EINVAL; |
806 | } |
807 | input->shunt_resistor = val; |
808 | } |
809 | |
810 | return 0; |
811 | } |
812 | |
813 | static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina) |
814 | { |
815 | const struct device_node *np = dev->of_node; |
816 | struct device_node *child; |
817 | int ret; |
818 | |
819 | /* Compatible with non-DT platforms */ |
820 | if (!np) |
821 | return 0; |
822 | |
823 | ina->single_shot = of_property_read_bool(np, propname: "ti,single-shot" ); |
824 | |
825 | for_each_child_of_node(np, child) { |
826 | ret = ina3221_probe_child_from_dt(dev, child, ina); |
827 | if (ret) { |
828 | of_node_put(node: child); |
829 | return ret; |
830 | } |
831 | } |
832 | |
833 | return 0; |
834 | } |
835 | |
836 | static int ina3221_probe(struct i2c_client *client) |
837 | { |
838 | struct device *dev = &client->dev; |
839 | struct ina3221_data *ina; |
840 | struct device *hwmon_dev; |
841 | char name[32]; |
842 | int i, ret; |
843 | |
844 | ina = devm_kzalloc(dev, size: sizeof(*ina), GFP_KERNEL); |
845 | if (!ina) |
846 | return -ENOMEM; |
847 | |
848 | ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config); |
849 | if (IS_ERR(ptr: ina->regmap)) { |
850 | dev_err(dev, "Unable to allocate register map\n" ); |
851 | return PTR_ERR(ptr: ina->regmap); |
852 | } |
853 | |
854 | for (i = 0; i < F_MAX_FIELDS; i++) { |
855 | ina->fields[i] = devm_regmap_field_alloc(dev, |
856 | regmap: ina->regmap, |
857 | reg_field: ina3221_reg_fields[i]); |
858 | if (IS_ERR(ptr: ina->fields[i])) { |
859 | dev_err(dev, "Unable to allocate regmap fields\n" ); |
860 | return PTR_ERR(ptr: ina->fields[i]); |
861 | } |
862 | } |
863 | |
864 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) |
865 | ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT; |
866 | |
867 | ret = ina3221_probe_from_dt(dev, ina); |
868 | if (ret) { |
869 | dev_err(dev, "Unable to probe from device tree\n" ); |
870 | return ret; |
871 | } |
872 | |
873 | /* The driver will be reset, so use reset value */ |
874 | ina->reg_config = INA3221_CONFIG_DEFAULT; |
875 | |
876 | /* Clear continuous bit to use single-shot mode */ |
877 | if (ina->single_shot) |
878 | ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS; |
879 | |
880 | /* Disable channels if their inputs are disconnected */ |
881 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
882 | if (ina->inputs[i].disconnected) |
883 | ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i); |
884 | } |
885 | |
886 | /* Initialize summation_shunt_resistor for summation channel control */ |
887 | ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); |
888 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
889 | if (!ina->inputs[i].summation_disable) |
890 | ina->summation_channel_control |= BIT(14 - i); |
891 | } |
892 | |
893 | ina->pm_dev = dev; |
894 | mutex_init(&ina->lock); |
895 | dev_set_drvdata(dev, data: ina); |
896 | |
897 | /* Enable PM runtime -- status is suspended by default */ |
898 | pm_runtime_enable(dev: ina->pm_dev); |
899 | |
900 | /* Initialize (resume) the device */ |
901 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
902 | if (ina->inputs[i].disconnected) |
903 | continue; |
904 | /* Match the refcount with number of enabled channels */ |
905 | ret = pm_runtime_get_sync(dev: ina->pm_dev); |
906 | if (ret < 0) |
907 | goto fail; |
908 | } |
909 | |
910 | hwmon_dev = devm_hwmon_device_register_with_info(dev, name: client->name, drvdata: ina, |
911 | info: &ina3221_chip_info, |
912 | extra_groups: ina3221_groups); |
913 | if (IS_ERR(ptr: hwmon_dev)) { |
914 | dev_err(dev, "Unable to register hwmon device\n" ); |
915 | ret = PTR_ERR(ptr: hwmon_dev); |
916 | goto fail; |
917 | } |
918 | |
919 | scnprintf(buf: name, size: sizeof(name), fmt: "%s-%s" , INA3221_DRIVER_NAME, dev_name(dev)); |
920 | ina->debugfs = debugfs_create_dir(name, NULL); |
921 | |
922 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
923 | scnprintf(buf: name, size: sizeof(name), fmt: "in%d_summation_disable" , i); |
924 | debugfs_create_bool(name, mode: 0400, parent: ina->debugfs, |
925 | value: &ina->inputs[i].summation_disable); |
926 | } |
927 | |
928 | return 0; |
929 | |
930 | fail: |
931 | pm_runtime_disable(dev: ina->pm_dev); |
932 | pm_runtime_set_suspended(dev: ina->pm_dev); |
933 | /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ |
934 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) |
935 | pm_runtime_put_noidle(dev: ina->pm_dev); |
936 | mutex_destroy(lock: &ina->lock); |
937 | |
938 | return ret; |
939 | } |
940 | |
941 | static void ina3221_remove(struct i2c_client *client) |
942 | { |
943 | struct ina3221_data *ina = dev_get_drvdata(dev: &client->dev); |
944 | int i; |
945 | |
946 | debugfs_remove_recursive(dentry: ina->debugfs); |
947 | |
948 | pm_runtime_disable(dev: ina->pm_dev); |
949 | pm_runtime_set_suspended(dev: ina->pm_dev); |
950 | |
951 | /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ |
952 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) |
953 | pm_runtime_put_noidle(dev: ina->pm_dev); |
954 | |
955 | mutex_destroy(lock: &ina->lock); |
956 | } |
957 | |
958 | static int ina3221_suspend(struct device *dev) |
959 | { |
960 | struct ina3221_data *ina = dev_get_drvdata(dev); |
961 | int ret; |
962 | |
963 | /* Save config register value and enable cache-only */ |
964 | ret = regmap_read(map: ina->regmap, INA3221_CONFIG, val: &ina->reg_config); |
965 | if (ret) |
966 | return ret; |
967 | |
968 | /* Set to power-down mode for power saving */ |
969 | ret = regmap_update_bits(map: ina->regmap, INA3221_CONFIG, |
970 | INA3221_CONFIG_MODE_MASK, |
971 | INA3221_CONFIG_MODE_POWERDOWN); |
972 | if (ret) |
973 | return ret; |
974 | |
975 | regcache_cache_only(map: ina->regmap, enable: true); |
976 | regcache_mark_dirty(map: ina->regmap); |
977 | |
978 | return 0; |
979 | } |
980 | |
981 | static int ina3221_resume(struct device *dev) |
982 | { |
983 | struct ina3221_data *ina = dev_get_drvdata(dev); |
984 | int ret; |
985 | |
986 | regcache_cache_only(map: ina->regmap, enable: false); |
987 | |
988 | /* Software reset the chip */ |
989 | ret = regmap_field_write(field: ina->fields[F_RST], val: true); |
990 | if (ret) { |
991 | dev_err(dev, "Unable to reset device\n" ); |
992 | return ret; |
993 | } |
994 | |
995 | /* Restore cached register values to hardware */ |
996 | ret = regcache_sync(map: ina->regmap); |
997 | if (ret) |
998 | return ret; |
999 | |
1000 | /* Restore config register value to hardware */ |
1001 | ret = regmap_write(map: ina->regmap, INA3221_CONFIG, val: ina->reg_config); |
1002 | if (ret) |
1003 | return ret; |
1004 | |
1005 | /* Initialize summation channel control */ |
1006 | if (ina->summation_shunt_resistor) { |
1007 | /* |
1008 | * Sum only channels that are not disabled for summation. |
1009 | * Shunt measurements of disconnected channels should |
1010 | * be 0, so it does not matter for summation. |
1011 | */ |
1012 | ret = regmap_update_bits(map: ina->regmap, INA3221_MASK_ENABLE, |
1013 | INA3221_MASK_ENABLE_SCC_MASK, |
1014 | val: ina->summation_channel_control); |
1015 | if (ret) { |
1016 | dev_err(dev, "Unable to control summation channel\n" ); |
1017 | return ret; |
1018 | } |
1019 | } |
1020 | |
1021 | return 0; |
1022 | } |
1023 | |
1024 | static DEFINE_RUNTIME_DEV_PM_OPS(ina3221_pm, ina3221_suspend, ina3221_resume, |
1025 | NULL); |
1026 | |
1027 | static const struct of_device_id ina3221_of_match_table[] = { |
1028 | { .compatible = "ti,ina3221" , }, |
1029 | { /* sentinel */ } |
1030 | }; |
1031 | MODULE_DEVICE_TABLE(of, ina3221_of_match_table); |
1032 | |
1033 | static const struct i2c_device_id ina3221_ids[] = { |
1034 | { "ina3221" , 0 }, |
1035 | { /* sentinel */ } |
1036 | }; |
1037 | MODULE_DEVICE_TABLE(i2c, ina3221_ids); |
1038 | |
1039 | static struct i2c_driver ina3221_i2c_driver = { |
1040 | .probe = ina3221_probe, |
1041 | .remove = ina3221_remove, |
1042 | .driver = { |
1043 | .name = INA3221_DRIVER_NAME, |
1044 | .of_match_table = ina3221_of_match_table, |
1045 | .pm = pm_ptr(&ina3221_pm), |
1046 | }, |
1047 | .id_table = ina3221_ids, |
1048 | }; |
1049 | module_i2c_driver(ina3221_i2c_driver); |
1050 | |
1051 | MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>" ); |
1052 | MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver" ); |
1053 | MODULE_LICENSE("GPL v2" ); |
1054 | |