1// SPDX-License-Identifier: GPL-2.0-or-later
2/* tmp401.c
3 *
4 * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
5 * Preliminary tmp411 support by:
6 * Gabriel Konat, Sander Leget, Wouter Willems
7 * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
8 *
9 * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
10 * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
11 */
12
13/*
14 * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
15 *
16 * Note this IC is in some aspect similar to the LM90, but it has quite a
17 * few differences too, for example the local temp has a higher resolution
18 * and thus has 16 bits registers for its value and limit instead of 8 bits.
19 */
20
21#include <linux/bitops.h>
22#include <linux/err.h>
23#include <linux/i2c.h>
24#include <linux/hwmon.h>
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/mutex.h>
28#include <linux/regmap.h>
29#include <linux/slab.h>
30
31/* Addresses to scan */
32static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
33 0x4e, 0x4f, I2C_CLIENT_END };
34
35enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 };
36
37/*
38 * The TMP401 registers, note some registers have different addresses for
39 * reading and writing
40 */
41#define TMP401_STATUS 0x02
42#define TMP401_CONFIG 0x03
43#define TMP401_CONVERSION_RATE 0x04
44#define TMP4XX_N_FACTOR_REG 0x18
45#define TMP43X_BETA_RANGE 0x25
46#define TMP401_TEMP_CRIT_HYST 0x21
47#define TMP401_MANUFACTURER_ID_REG 0xFE
48#define TMP401_DEVICE_ID_REG 0xFF
49
50static const u8 TMP401_TEMP_MSB[7][3] = {
51 { 0x00, 0x01, 0x23 }, /* temp */
52 { 0x06, 0x08, 0x16 }, /* low limit */
53 { 0x05, 0x07, 0x15 }, /* high limit */
54 { 0x20, 0x19, 0x1a }, /* therm (crit) limit */
55 { 0x30, 0x34, 0x00 }, /* lowest */
56 { 0x32, 0xf6, 0x00 }, /* highest */
57};
58
59/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
60static const u8 TMP432_STATUS_REG[] = {
61 0x1b, 0x36, 0x35, 0x37 };
62
63/* Flags */
64#define TMP401_CONFIG_RANGE BIT(2)
65#define TMP401_CONFIG_SHUTDOWN BIT(6)
66#define TMP401_STATUS_LOCAL_CRIT BIT(0)
67#define TMP401_STATUS_REMOTE_CRIT BIT(1)
68#define TMP401_STATUS_REMOTE_OPEN BIT(2)
69#define TMP401_STATUS_REMOTE_LOW BIT(3)
70#define TMP401_STATUS_REMOTE_HIGH BIT(4)
71#define TMP401_STATUS_LOCAL_LOW BIT(5)
72#define TMP401_STATUS_LOCAL_HIGH BIT(6)
73
74/* On TMP432, each status has its own register */
75#define TMP432_STATUS_LOCAL BIT(0)
76#define TMP432_STATUS_REMOTE1 BIT(1)
77#define TMP432_STATUS_REMOTE2 BIT(2)
78
79/* Manufacturer / Device ID's */
80#define TMP401_MANUFACTURER_ID 0x55
81#define TMP401_DEVICE_ID 0x11
82#define TMP411A_DEVICE_ID 0x12
83#define TMP411B_DEVICE_ID 0x13
84#define TMP411C_DEVICE_ID 0x10
85#define TMP431_DEVICE_ID 0x31
86#define TMP432_DEVICE_ID 0x32
87#define TMP435_DEVICE_ID 0x35
88
89/*
90 * Driver data (common to all clients)
91 */
92
93static const struct i2c_device_id tmp401_id[] = {
94 { "tmp401", tmp401 },
95 { "tmp411", tmp411 },
96 { "tmp431", tmp431 },
97 { "tmp432", tmp432 },
98 { "tmp435", tmp435 },
99 { }
100};
101MODULE_DEVICE_TABLE(i2c, tmp401_id);
102
103/*
104 * Client data (each client gets its own)
105 */
106
107struct tmp401_data {
108 struct i2c_client *client;
109 struct regmap *regmap;
110 struct mutex update_lock;
111 enum chips kind;
112
113 bool extended_range;
114
115 /* hwmon API configuration data */
116 u32 chip_channel_config[4];
117 struct hwmon_channel_info chip_info;
118 u32 temp_channel_config[4];
119 struct hwmon_channel_info temp_info;
120 const struct hwmon_channel_info *info[3];
121 struct hwmon_chip_info chip;
122};
123
124/* regmap */
125
126static bool tmp401_regmap_is_volatile(struct device *dev, unsigned int reg)
127{
128 switch (reg) {
129 case 0: /* local temp msb */
130 case 1: /* remote temp msb */
131 case 2: /* status */
132 case 0x10: /* remote temp lsb */
133 case 0x15: /* local temp lsb */
134 case 0x1b: /* status (tmp432) */
135 case 0x23 ... 0x24: /* remote temp 2 msb / lsb */
136 case 0x30 ... 0x37: /* lowest/highest temp; status (tmp432) */
137 return true;
138 default:
139 return false;
140 }
141}
142
143static int tmp401_reg_read(void *context, unsigned int reg, unsigned int *val)
144{
145 struct tmp401_data *data = context;
146 struct i2c_client *client = data->client;
147 int regval;
148
149 switch (reg) {
150 case 0: /* local temp msb */
151 case 1: /* remote temp msb */
152 case 5: /* local temp high limit msb */
153 case 6: /* local temp low limit msb */
154 case 7: /* remote temp ligh limit msb */
155 case 8: /* remote temp low limit msb */
156 case 0x15: /* remote temp 2 high limit msb */
157 case 0x16: /* remote temp 2 low limit msb */
158 case 0x23: /* remote temp 2 msb */
159 case 0x30: /* local temp minimum, tmp411 */
160 case 0x32: /* local temp maximum, tmp411 */
161 case 0x34: /* remote temp minimum, tmp411 */
162 case 0xf6: /* remote temp maximum, tmp411 (really 0x36) */
163 /* work around register overlap between TMP411 and TMP432 */
164 if (reg == 0xf6)
165 reg = 0x36;
166 regval = i2c_smbus_read_word_swapped(client, command: reg);
167 if (regval < 0)
168 return regval;
169 *val = regval;
170 break;
171 case 0x19: /* critical limits, 8-bit registers */
172 case 0x1a:
173 case 0x20:
174 regval = i2c_smbus_read_byte_data(client, command: reg);
175 if (regval < 0)
176 return regval;
177 *val = regval << 8;
178 break;
179 case 0x1b:
180 case 0x35 ... 0x37:
181 if (data->kind == tmp432) {
182 regval = i2c_smbus_read_byte_data(client, command: reg);
183 if (regval < 0)
184 return regval;
185 *val = regval;
186 break;
187 }
188 /* simulate TMP432 status registers */
189 regval = i2c_smbus_read_byte_data(client, TMP401_STATUS);
190 if (regval < 0)
191 return regval;
192 *val = 0;
193 switch (reg) {
194 case 0x1b: /* open / fault */
195 if (regval & TMP401_STATUS_REMOTE_OPEN)
196 *val |= BIT(1);
197 break;
198 case 0x35: /* high limit */
199 if (regval & TMP401_STATUS_LOCAL_HIGH)
200 *val |= BIT(0);
201 if (regval & TMP401_STATUS_REMOTE_HIGH)
202 *val |= BIT(1);
203 break;
204 case 0x36: /* low limit */
205 if (regval & TMP401_STATUS_LOCAL_LOW)
206 *val |= BIT(0);
207 if (regval & TMP401_STATUS_REMOTE_LOW)
208 *val |= BIT(1);
209 break;
210 case 0x37: /* therm / crit limit */
211 if (regval & TMP401_STATUS_LOCAL_CRIT)
212 *val |= BIT(0);
213 if (regval & TMP401_STATUS_REMOTE_CRIT)
214 *val |= BIT(1);
215 break;
216 }
217 break;
218 default:
219 regval = i2c_smbus_read_byte_data(client, command: reg);
220 if (regval < 0)
221 return regval;
222 *val = regval;
223 break;
224 }
225 return 0;
226}
227
228static int tmp401_reg_write(void *context, unsigned int reg, unsigned int val)
229{
230 struct tmp401_data *data = context;
231 struct i2c_client *client = data->client;
232
233 switch (reg) {
234 case 0x05: /* local temp high limit msb */
235 case 0x06: /* local temp low limit msb */
236 case 0x07: /* remote temp ligh limit msb */
237 case 0x08: /* remote temp low limit msb */
238 reg += 6; /* adjust for register write address */
239 fallthrough;
240 case 0x15: /* remote temp 2 high limit msb */
241 case 0x16: /* remote temp 2 low limit msb */
242 return i2c_smbus_write_word_swapped(client, command: reg, value: val);
243 case 0x19: /* critical limits, 8-bit registers */
244 case 0x1a:
245 case 0x20:
246 return i2c_smbus_write_byte_data(client, command: reg, value: val >> 8);
247 case TMP401_CONVERSION_RATE:
248 case TMP401_CONFIG:
249 reg += 6; /* adjust for register write address */
250 fallthrough;
251 default:
252 return i2c_smbus_write_byte_data(client, command: reg, value: val);
253 }
254}
255
256static const struct regmap_config tmp401_regmap_config = {
257 .reg_bits = 8,
258 .val_bits = 16,
259 .cache_type = REGCACHE_RBTREE,
260 .volatile_reg = tmp401_regmap_is_volatile,
261 .reg_read = tmp401_reg_read,
262 .reg_write = tmp401_reg_write,
263};
264
265/* temperature conversion */
266
267static int tmp401_register_to_temp(u16 reg, bool extended)
268{
269 int temp = reg;
270
271 if (extended)
272 temp -= 64 * 256;
273
274 return DIV_ROUND_CLOSEST(temp * 125, 32);
275}
276
277static u16 tmp401_temp_to_register(long temp, bool extended, int zbits)
278{
279 if (extended) {
280 temp = clamp_val(temp, -64000, 191000);
281 temp += 64000;
282 } else {
283 temp = clamp_val(temp, 0, 127000);
284 }
285
286 return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
287}
288
289/* hwmon API functions */
290
291static const u8 tmp401_temp_reg_index[] = {
292 [hwmon_temp_input] = 0,
293 [hwmon_temp_min] = 1,
294 [hwmon_temp_max] = 2,
295 [hwmon_temp_crit] = 3,
296 [hwmon_temp_lowest] = 4,
297 [hwmon_temp_highest] = 5,
298};
299
300static const u8 tmp401_status_reg_index[] = {
301 [hwmon_temp_fault] = 0,
302 [hwmon_temp_min_alarm] = 1,
303 [hwmon_temp_max_alarm] = 2,
304 [hwmon_temp_crit_alarm] = 3,
305};
306
307static int tmp401_temp_read(struct device *dev, u32 attr, int channel, long *val)
308{
309 struct tmp401_data *data = dev_get_drvdata(dev);
310 struct regmap *regmap = data->regmap;
311 unsigned int regval;
312 int reg, ret;
313
314 switch (attr) {
315 case hwmon_temp_input:
316 case hwmon_temp_min:
317 case hwmon_temp_max:
318 case hwmon_temp_crit:
319 case hwmon_temp_lowest:
320 case hwmon_temp_highest:
321 reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
322 ret = regmap_read(map: regmap, reg, val: &regval);
323 if (ret < 0)
324 return ret;
325 *val = tmp401_register_to_temp(reg: regval, extended: data->extended_range);
326 break;
327 case hwmon_temp_crit_hyst:
328 mutex_lock(&data->update_lock);
329 reg = TMP401_TEMP_MSB[3][channel];
330 ret = regmap_read(map: regmap, reg, val: &regval);
331 if (ret < 0)
332 goto unlock;
333 *val = tmp401_register_to_temp(reg: regval, extended: data->extended_range);
334 ret = regmap_read(map: regmap, TMP401_TEMP_CRIT_HYST, val: &regval);
335 if (ret < 0)
336 goto unlock;
337 *val -= regval * 1000;
338unlock:
339 mutex_unlock(lock: &data->update_lock);
340 if (ret < 0)
341 return ret;
342 break;
343 case hwmon_temp_fault:
344 case hwmon_temp_min_alarm:
345 case hwmon_temp_max_alarm:
346 case hwmon_temp_crit_alarm:
347 reg = TMP432_STATUS_REG[tmp401_status_reg_index[attr]];
348 ret = regmap_read(map: regmap, reg, val: &regval);
349 if (ret < 0)
350 return ret;
351 *val = !!(regval & BIT(channel));
352 break;
353 default:
354 return -EOPNOTSUPP;
355 }
356 return 0;
357}
358
359static int tmp401_temp_write(struct device *dev, u32 attr, int channel,
360 long val)
361{
362 struct tmp401_data *data = dev_get_drvdata(dev);
363 struct regmap *regmap = data->regmap;
364 unsigned int regval;
365 int reg, ret, temp;
366
367 mutex_lock(&data->update_lock);
368 switch (attr) {
369 case hwmon_temp_min:
370 case hwmon_temp_max:
371 case hwmon_temp_crit:
372 reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
373 regval = tmp401_temp_to_register(temp: val, extended: data->extended_range,
374 zbits: attr == hwmon_temp_crit ? 8 : 4);
375 ret = regmap_write(map: regmap, reg, val: regval);
376 break;
377 case hwmon_temp_crit_hyst:
378 if (data->extended_range)
379 val = clamp_val(val, -64000, 191000);
380 else
381 val = clamp_val(val, 0, 127000);
382
383 reg = TMP401_TEMP_MSB[3][channel];
384 ret = regmap_read(map: regmap, reg, val: &regval);
385 if (ret < 0)
386 break;
387 temp = tmp401_register_to_temp(reg: regval, extended: data->extended_range);
388 val = clamp_val(val, temp - 255000, temp);
389 regval = ((temp - val) + 500) / 1000;
390 ret = regmap_write(map: regmap, TMP401_TEMP_CRIT_HYST, val: regval);
391 break;
392 default:
393 ret = -EOPNOTSUPP;
394 break;
395 }
396 mutex_unlock(lock: &data->update_lock);
397 return ret;
398}
399
400static int tmp401_chip_read(struct device *dev, u32 attr, int channel, long *val)
401{
402 struct tmp401_data *data = dev_get_drvdata(dev);
403 u32 regval;
404 int ret;
405
406 switch (attr) {
407 case hwmon_chip_update_interval:
408 ret = regmap_read(map: data->regmap, TMP401_CONVERSION_RATE, val: &regval);
409 if (ret < 0)
410 return ret;
411 *val = (1 << (7 - regval)) * 125;
412 break;
413 case hwmon_chip_temp_reset_history:
414 *val = 0;
415 break;
416 default:
417 return -EOPNOTSUPP;
418 }
419
420 return 0;
421}
422
423static int tmp401_set_convrate(struct regmap *regmap, long val)
424{
425 int rate;
426
427 /*
428 * For valid rates, interval can be calculated as
429 * interval = (1 << (7 - rate)) * 125;
430 * Rounded rate is therefore
431 * rate = 7 - __fls(interval * 4 / (125 * 3));
432 * Use clamp_val() to avoid overflows, and to ensure valid input
433 * for __fls.
434 */
435 val = clamp_val(val, 125, 16000);
436 rate = 7 - __fls(word: val * 4 / (125 * 3));
437 return regmap_write(map: regmap, TMP401_CONVERSION_RATE, val: rate);
438}
439
440static int tmp401_chip_write(struct device *dev, u32 attr, int channel, long val)
441{
442 struct tmp401_data *data = dev_get_drvdata(dev);
443 struct regmap *regmap = data->regmap;
444 int err;
445
446 mutex_lock(&data->update_lock);
447 switch (attr) {
448 case hwmon_chip_update_interval:
449 err = tmp401_set_convrate(regmap, val);
450 break;
451 case hwmon_chip_temp_reset_history:
452 if (val != 1) {
453 err = -EINVAL;
454 break;
455 }
456 /*
457 * Reset history by writing any value to any of the
458 * minimum/maximum registers (0x30-0x37).
459 */
460 err = regmap_write(map: regmap, reg: 0x30, val: 0);
461 break;
462 default:
463 err = -EOPNOTSUPP;
464 break;
465 }
466 mutex_unlock(lock: &data->update_lock);
467
468 return err;
469}
470
471static int tmp401_read(struct device *dev, enum hwmon_sensor_types type,
472 u32 attr, int channel, long *val)
473{
474 switch (type) {
475 case hwmon_chip:
476 return tmp401_chip_read(dev, attr, channel, val);
477 case hwmon_temp:
478 return tmp401_temp_read(dev, attr, channel, val);
479 default:
480 return -EOPNOTSUPP;
481 }
482}
483
484static int tmp401_write(struct device *dev, enum hwmon_sensor_types type,
485 u32 attr, int channel, long val)
486{
487 switch (type) {
488 case hwmon_chip:
489 return tmp401_chip_write(dev, attr, channel, val);
490 case hwmon_temp:
491 return tmp401_temp_write(dev, attr, channel, val);
492 default:
493 return -EOPNOTSUPP;
494 }
495}
496
497static umode_t tmp401_is_visible(const void *data, enum hwmon_sensor_types type,
498 u32 attr, int channel)
499{
500 switch (type) {
501 case hwmon_chip:
502 switch (attr) {
503 case hwmon_chip_update_interval:
504 case hwmon_chip_temp_reset_history:
505 return 0644;
506 default:
507 break;
508 }
509 break;
510 case hwmon_temp:
511 switch (attr) {
512 case hwmon_temp_input:
513 case hwmon_temp_min_alarm:
514 case hwmon_temp_max_alarm:
515 case hwmon_temp_crit_alarm:
516 case hwmon_temp_fault:
517 case hwmon_temp_lowest:
518 case hwmon_temp_highest:
519 return 0444;
520 case hwmon_temp_min:
521 case hwmon_temp_max:
522 case hwmon_temp_crit:
523 case hwmon_temp_crit_hyst:
524 return 0644;
525 default:
526 break;
527 }
528 break;
529 default:
530 break;
531 }
532 return 0;
533}
534
535static const struct hwmon_ops tmp401_ops = {
536 .is_visible = tmp401_is_visible,
537 .read = tmp401_read,
538 .write = tmp401_write,
539};
540
541/* chip initialization, detect, probe */
542
543static int tmp401_init_client(struct tmp401_data *data)
544{
545 struct regmap *regmap = data->regmap;
546 u32 config, config_orig;
547 int ret;
548 u32 val = 0;
549 s32 nfactor = 0;
550
551 /* Set conversion rate to 2 Hz */
552 ret = regmap_write(map: regmap, TMP401_CONVERSION_RATE, val: 5);
553 if (ret < 0)
554 return ret;
555
556 /* Start conversions (disable shutdown if necessary) */
557 ret = regmap_read(map: regmap, TMP401_CONFIG, val: &config);
558 if (ret < 0)
559 return ret;
560
561 config_orig = config;
562 config &= ~TMP401_CONFIG_SHUTDOWN;
563
564 if (of_property_read_bool(np: data->client->dev.of_node, propname: "ti,extended-range-enable")) {
565 /* Enable measurement over extended temperature range */
566 config |= TMP401_CONFIG_RANGE;
567 }
568
569 data->extended_range = !!(config & TMP401_CONFIG_RANGE);
570
571 if (config != config_orig) {
572 ret = regmap_write(map: regmap, TMP401_CONFIG, val: config);
573 if (ret < 0)
574 return ret;
575 }
576
577 ret = of_property_read_u32(np: data->client->dev.of_node, propname: "ti,n-factor", out_value: &nfactor);
578 if (!ret) {
579 if (data->kind == tmp401) {
580 dev_err(&data->client->dev, "ti,tmp401 does not support n-factor correction\n");
581 return -EINVAL;
582 }
583 if (nfactor < -128 || nfactor > 127) {
584 dev_err(&data->client->dev, "n-factor is invalid (%d)\n", nfactor);
585 return -EINVAL;
586 }
587 ret = regmap_write(map: regmap, TMP4XX_N_FACTOR_REG, val: (unsigned int)nfactor);
588 if (ret < 0)
589 return ret;
590 }
591
592 ret = of_property_read_u32(np: data->client->dev.of_node, propname: "ti,beta-compensation", out_value: &val);
593 if (!ret) {
594 if (data->kind == tmp401 || data->kind == tmp411) {
595 dev_err(&data->client->dev, "ti,tmp401 or ti,tmp411 does not support beta compensation\n");
596 return -EINVAL;
597 }
598 if (val > 15) {
599 dev_err(&data->client->dev, "beta-compensation is invalid (%u)\n", val);
600 return -EINVAL;
601 }
602 ret = regmap_write(map: regmap, TMP43X_BETA_RANGE, val);
603 if (ret < 0)
604 return ret;
605 }
606
607 return 0;
608}
609
610static int tmp401_detect(struct i2c_client *client,
611 struct i2c_board_info *info)
612{
613 enum chips kind;
614 struct i2c_adapter *adapter = client->adapter;
615 u8 reg;
616
617 if (!i2c_check_functionality(adap: adapter, I2C_FUNC_SMBUS_BYTE_DATA))
618 return -ENODEV;
619
620 /* Detect and identify the chip */
621 reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
622 if (reg != TMP401_MANUFACTURER_ID)
623 return -ENODEV;
624
625 reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
626
627 switch (reg) {
628 case TMP401_DEVICE_ID:
629 if (client->addr != 0x4c)
630 return -ENODEV;
631 kind = tmp401;
632 break;
633 case TMP411A_DEVICE_ID:
634 if (client->addr != 0x4c)
635 return -ENODEV;
636 kind = tmp411;
637 break;
638 case TMP411B_DEVICE_ID:
639 if (client->addr != 0x4d)
640 return -ENODEV;
641 kind = tmp411;
642 break;
643 case TMP411C_DEVICE_ID:
644 if (client->addr != 0x4e)
645 return -ENODEV;
646 kind = tmp411;
647 break;
648 case TMP431_DEVICE_ID:
649 if (client->addr != 0x4c && client->addr != 0x4d)
650 return -ENODEV;
651 kind = tmp431;
652 break;
653 case TMP432_DEVICE_ID:
654 if (client->addr != 0x4c && client->addr != 0x4d)
655 return -ENODEV;
656 kind = tmp432;
657 break;
658 case TMP435_DEVICE_ID:
659 kind = tmp435;
660 break;
661 default:
662 return -ENODEV;
663 }
664
665 reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG);
666 if (reg & 0x1b)
667 return -ENODEV;
668
669 reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE);
670 /* Datasheet says: 0x1-0x6 */
671 if (reg > 15)
672 return -ENODEV;
673
674 strscpy(p: info->type, q: tmp401_id[kind].name, I2C_NAME_SIZE);
675
676 return 0;
677}
678
679static int tmp401_probe(struct i2c_client *client)
680{
681 static const char * const names[] = {
682 "TMP401", "TMP411", "TMP431", "TMP432", "TMP435"
683 };
684 struct device *dev = &client->dev;
685 struct hwmon_channel_info *info;
686 struct device *hwmon_dev;
687 struct tmp401_data *data;
688 int status;
689
690 data = devm_kzalloc(dev, size: sizeof(struct tmp401_data), GFP_KERNEL);
691 if (!data)
692 return -ENOMEM;
693
694 data->client = client;
695 mutex_init(&data->update_lock);
696 data->kind = i2c_match_id(id: tmp401_id, client)->driver_data;
697
698 data->regmap = devm_regmap_init(dev, NULL, data, &tmp401_regmap_config);
699 if (IS_ERR(ptr: data->regmap))
700 return PTR_ERR(ptr: data->regmap);
701
702 /* initialize configuration data */
703 data->chip.ops = &tmp401_ops;
704 data->chip.info = data->info;
705
706 data->info[0] = &data->chip_info;
707 data->info[1] = &data->temp_info;
708
709 info = &data->chip_info;
710 info->type = hwmon_chip;
711 info->config = data->chip_channel_config;
712
713 data->chip_channel_config[0] = HWMON_C_UPDATE_INTERVAL;
714
715 info = &data->temp_info;
716 info->type = hwmon_temp;
717 info->config = data->temp_channel_config;
718
719 data->temp_channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
720 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
721 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
722 data->temp_channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
723 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
724 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
725
726 if (data->kind == tmp411) {
727 data->temp_channel_config[0] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
728 data->temp_channel_config[1] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
729 data->chip_channel_config[0] |= HWMON_C_TEMP_RESET_HISTORY;
730 }
731
732 if (data->kind == tmp432) {
733 data->temp_channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
734 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
735 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
736 }
737
738 /* Initialize the TMP401 chip */
739 status = tmp401_init_client(data);
740 if (status < 0)
741 return status;
742
743 hwmon_dev = devm_hwmon_device_register_with_info(dev, name: client->name, drvdata: data,
744 info: &data->chip, NULL);
745 if (IS_ERR(ptr: hwmon_dev))
746 return PTR_ERR(ptr: hwmon_dev);
747
748 dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
749
750 return 0;
751}
752
753static const struct of_device_id __maybe_unused tmp4xx_of_match[] = {
754 { .compatible = "ti,tmp401", },
755 { .compatible = "ti,tmp411", },
756 { .compatible = "ti,tmp431", },
757 { .compatible = "ti,tmp432", },
758 { .compatible = "ti,tmp435", },
759 { },
760};
761MODULE_DEVICE_TABLE(of, tmp4xx_of_match);
762
763static struct i2c_driver tmp401_driver = {
764 .class = I2C_CLASS_HWMON,
765 .driver = {
766 .name = "tmp401",
767 .of_match_table = of_match_ptr(tmp4xx_of_match),
768 },
769 .probe = tmp401_probe,
770 .id_table = tmp401_id,
771 .detect = tmp401_detect,
772 .address_list = normal_i2c,
773};
774
775module_i2c_driver(tmp401_driver);
776
777MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
778MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
779MODULE_LICENSE("GPL");
780

source code of linux/drivers/hwmon/tmp401.c