1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
5 * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
6 * Philip Edelbrock <phil@netroedge.com>,
7 * and Mark Studebaker <mdsxyz123@yahoo.com>
8 * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de>
9 */
10
11/*
12 * Supports following chips:
13 *
14 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
15 * as99127f 7 3 0 3 0x31 0x12c3 yes no
16 * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
17 * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
18 * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
19 * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
20 *
21 */
22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/i2c.h>
30#include <linux/hwmon.h>
31#include <linux/hwmon-vid.h>
32#include <linux/hwmon-sysfs.h>
33#include <linux/sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36
37#ifdef CONFIG_ISA
38#include <linux/platform_device.h>
39#include <linux/ioport.h>
40#include <linux/io.h>
41#endif
42
43#include "lm75.h"
44
45/* Addresses to scan */
46static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
47 0x2e, 0x2f, I2C_CLIENT_END };
48
49enum chips { w83781d, w83782d, w83783s, as99127f };
50
51/* Insmod parameters */
52static unsigned short force_subclients[4];
53module_param_array(force_subclients, short, NULL, 0);
54MODULE_PARM_DESC(force_subclients,
55 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
56
57static bool reset;
58module_param(reset, bool, 0);
59MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
60
61static bool init = 1;
62module_param(init, bool, 0);
63MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
64
65/* Constants specified below */
66
67/* Length of ISA address segment */
68#define W83781D_EXTENT 8
69
70/* Where are the ISA address/data registers relative to the base address */
71#define W83781D_ADDR_REG_OFFSET 5
72#define W83781D_DATA_REG_OFFSET 6
73
74/* The device registers */
75/* in nr from 0 to 8 */
76#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
77 (0x554 + (((nr) - 7) * 2)))
78#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
79 (0x555 + (((nr) - 7) * 2)))
80#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
81 (0x550 + (nr) - 7))
82
83/* fan nr from 0 to 2 */
84#define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
85#define W83781D_REG_FAN(nr) (0x28 + (nr))
86
87#define W83781D_REG_BANK 0x4E
88#define W83781D_REG_TEMP2_CONFIG 0x152
89#define W83781D_REG_TEMP3_CONFIG 0x252
90/* temp nr from 1 to 3 */
91#define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
92 ((nr == 2) ? (0x0150) : \
93 (0x27)))
94#define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
95 ((nr == 2) ? (0x153) : \
96 (0x3A)))
97#define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
98 ((nr == 2) ? (0x155) : \
99 (0x39)))
100
101#define W83781D_REG_CONFIG 0x40
102
103/* Interrupt status (W83781D, AS99127F) */
104#define W83781D_REG_ALARM1 0x41
105#define W83781D_REG_ALARM2 0x42
106
107/* Real-time status (W83782D, W83783S) */
108#define W83782D_REG_ALARM1 0x459
109#define W83782D_REG_ALARM2 0x45A
110#define W83782D_REG_ALARM3 0x45B
111
112#define W83781D_REG_BEEP_CONFIG 0x4D
113#define W83781D_REG_BEEP_INTS1 0x56
114#define W83781D_REG_BEEP_INTS2 0x57
115#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
116
117#define W83781D_REG_VID_FANDIV 0x47
118
119#define W83781D_REG_CHIPID 0x49
120#define W83781D_REG_WCHIPID 0x58
121#define W83781D_REG_CHIPMAN 0x4F
122#define W83781D_REG_PIN 0x4B
123
124/* 782D/783S only */
125#define W83781D_REG_VBAT 0x5D
126
127/* PWM 782D (1-4) and 783S (1-2) only */
128static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
129#define W83781D_REG_PWMCLK12 0x5C
130#define W83781D_REG_PWMCLK34 0x45C
131
132#define W83781D_REG_I2C_ADDR 0x48
133#define W83781D_REG_I2C_SUBADDR 0x4A
134
135/*
136 * The following are undocumented in the data sheets however we
137 * received the information in an email from Winbond tech support
138 */
139/* Sensor selection - not on 781d */
140#define W83781D_REG_SCFG1 0x5D
141static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
142
143#define W83781D_REG_SCFG2 0x59
144static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
145
146#define W83781D_DEFAULT_BETA 3435
147
148/* Conversions */
149#define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
150#define IN_FROM_REG(val) ((val) * 16)
151
152static inline u8
153FAN_TO_REG(long rpm, int div)
154{
155 if (rpm == 0)
156 return 255;
157 rpm = clamp_val(rpm, 1, 1000000);
158 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
159}
160
161static inline long
162FAN_FROM_REG(u8 val, int div)
163{
164 if (val == 0)
165 return -1;
166 if (val == 255)
167 return 0;
168 return 1350000 / (val * div);
169}
170
171#define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
172#define TEMP_FROM_REG(val) ((val) * 1000)
173
174#define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
175 (~(val)) & 0x7fff : (val) & 0xff7fff)
176#define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
177 (~(val)) & 0x7fff : (val) & 0xff7fff)
178
179#define DIV_FROM_REG(val) (1 << (val))
180
181static inline u8
182DIV_TO_REG(long val, enum chips type)
183{
184 int i;
185 val = clamp_val(val, 1,
186 ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
187 for (i = 0; i < 7; i++) {
188 if (val == 0)
189 break;
190 val >>= 1;
191 }
192 return i;
193}
194
195struct w83781d_data {
196 struct i2c_client *client;
197 struct device *hwmon_dev;
198 struct mutex lock;
199 enum chips type;
200
201 /* For ISA device only */
202 const char *name;
203 int isa_addr;
204
205 struct mutex update_lock;
206 bool valid; /* true if following fields are valid */
207 unsigned long last_updated; /* In jiffies */
208
209 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
210 /* array of 2 pointers to subclients */
211
212 u8 in[9]; /* Register value - 8 & 9 for 782D only */
213 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
214 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
215 u8 fan[3]; /* Register value */
216 u8 fan_min[3]; /* Register value */
217 s8 temp; /* Register value */
218 s8 temp_max; /* Register value */
219 s8 temp_max_hyst; /* Register value */
220 u16 temp_add[2]; /* Register value */
221 u16 temp_max_add[2]; /* Register value */
222 u16 temp_max_hyst_add[2]; /* Register value */
223 u8 fan_div[3]; /* Register encoding, shifted right */
224 u8 vid; /* Register encoding, combined */
225 u32 alarms; /* Register encoding, combined */
226 u32 beep_mask; /* Register encoding, combined */
227 u8 pwm[4]; /* Register value */
228 u8 pwm2_enable; /* Boolean */
229 u16 sens[3]; /*
230 * 782D/783S only.
231 * 1 = pentium diode; 2 = 3904 diode;
232 * 4 = thermistor
233 */
234 u8 vrm;
235};
236
237static struct w83781d_data *w83781d_data_if_isa(void);
238static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
239
240static int w83781d_read_value(struct w83781d_data *data, u16 reg);
241static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
242static struct w83781d_data *w83781d_update_device(struct device *dev);
243static void w83781d_init_device(struct device *dev);
244
245/* following are the sysfs callback functions */
246#define show_in_reg(reg) \
247static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
248 char *buf) \
249{ \
250 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
251 struct w83781d_data *data = w83781d_update_device(dev); \
252 return sprintf(buf, "%ld\n", \
253 (long)IN_FROM_REG(data->reg[attr->index])); \
254}
255show_in_reg(in);
256show_in_reg(in_min);
257show_in_reg(in_max);
258
259#define store_in_reg(REG, reg) \
260static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
261 *da, const char *buf, size_t count) \
262{ \
263 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
264 struct w83781d_data *data = dev_get_drvdata(dev); \
265 int nr = attr->index; \
266 unsigned long val; \
267 int err = kstrtoul(buf, 10, &val); \
268 if (err) \
269 return err; \
270 mutex_lock(&data->update_lock); \
271 data->in_##reg[nr] = IN_TO_REG(val); \
272 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
273 data->in_##reg[nr]); \
274 \
275 mutex_unlock(&data->update_lock); \
276 return count; \
277}
278store_in_reg(MIN, min);
279store_in_reg(MAX, max);
280
281#define sysfs_in_offsets(offset) \
282static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
283 show_in, NULL, offset); \
284static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
285 show_in_min, store_in_min, offset); \
286static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
287 show_in_max, store_in_max, offset)
288
289sysfs_in_offsets(0);
290sysfs_in_offsets(1);
291sysfs_in_offsets(2);
292sysfs_in_offsets(3);
293sysfs_in_offsets(4);
294sysfs_in_offsets(5);
295sysfs_in_offsets(6);
296sysfs_in_offsets(7);
297sysfs_in_offsets(8);
298
299#define show_fan_reg(reg) \
300static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
301 char *buf) \
302{ \
303 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
304 struct w83781d_data *data = w83781d_update_device(dev); \
305 return sprintf(buf, "%ld\n", \
306 FAN_FROM_REG(data->reg[attr->index], \
307 DIV_FROM_REG(data->fan_div[attr->index]))); \
308}
309show_fan_reg(fan);
310show_fan_reg(fan_min);
311
312static ssize_t
313store_fan_min(struct device *dev, struct device_attribute *da,
314 const char *buf, size_t count)
315{
316 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
317 struct w83781d_data *data = dev_get_drvdata(dev);
318 int nr = attr->index;
319 unsigned long val;
320 int err;
321
322 err = kstrtoul(s: buf, base: 10, res: &val);
323 if (err)
324 return err;
325
326 mutex_lock(&data->update_lock);
327 data->fan_min[nr] =
328 FAN_TO_REG(rpm: val, DIV_FROM_REG(data->fan_div[nr]));
329 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
330 value: data->fan_min[nr]);
331
332 mutex_unlock(lock: &data->update_lock);
333 return count;
334}
335
336static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
337static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
338 show_fan_min, store_fan_min, 0);
339static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
340static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
341 show_fan_min, store_fan_min, 1);
342static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
343static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
344 show_fan_min, store_fan_min, 2);
345
346#define show_temp_reg(reg) \
347static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
348 char *buf) \
349{ \
350 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
351 struct w83781d_data *data = w83781d_update_device(dev); \
352 int nr = attr->index; \
353 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
354 return sprintf(buf, "%d\n", \
355 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
356 } else { /* TEMP1 */ \
357 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
358 } \
359}
360show_temp_reg(temp);
361show_temp_reg(temp_max);
362show_temp_reg(temp_max_hyst);
363
364#define store_temp_reg(REG, reg) \
365static ssize_t store_temp_##reg(struct device *dev, \
366 struct device_attribute *da, const char *buf, size_t count) \
367{ \
368 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
369 struct w83781d_data *data = dev_get_drvdata(dev); \
370 int nr = attr->index; \
371 long val; \
372 int err = kstrtol(buf, 10, &val); \
373 if (err) \
374 return err; \
375 mutex_lock(&data->update_lock); \
376 \
377 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
378 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
379 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
380 data->temp_##reg##_add[nr-2]); \
381 } else { /* TEMP1 */ \
382 data->temp_##reg = TEMP_TO_REG(val); \
383 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
384 data->temp_##reg); \
385 } \
386 \
387 mutex_unlock(&data->update_lock); \
388 return count; \
389}
390store_temp_reg(OVER, max);
391store_temp_reg(HYST, max_hyst);
392
393#define sysfs_temp_offsets(offset) \
394static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
395 show_temp, NULL, offset); \
396static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
397 show_temp_max, store_temp_max, offset); \
398static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
399 show_temp_max_hyst, store_temp_max_hyst, offset);
400
401sysfs_temp_offsets(1);
402sysfs_temp_offsets(2);
403sysfs_temp_offsets(3);
404
405static ssize_t
406cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
407{
408 struct w83781d_data *data = w83781d_update_device(dev);
409 return sprintf(buf, fmt: "%ld\n", (long) vid_from_reg(val: data->vid, vrm: data->vrm));
410}
411
412static DEVICE_ATTR_RO(cpu0_vid);
413
414static ssize_t
415vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
416{
417 struct w83781d_data *data = dev_get_drvdata(dev);
418 return sprintf(buf, fmt: "%ld\n", (long) data->vrm);
419}
420
421static ssize_t
422vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
423 size_t count)
424{
425 struct w83781d_data *data = dev_get_drvdata(dev);
426 unsigned long val;
427 int err;
428
429 err = kstrtoul(s: buf, base: 10, res: &val);
430 if (err)
431 return err;
432 data->vrm = clamp_val(val, 0, 255);
433
434 return count;
435}
436
437static DEVICE_ATTR_RW(vrm);
438
439static ssize_t
440alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
441{
442 struct w83781d_data *data = w83781d_update_device(dev);
443 return sprintf(buf, fmt: "%u\n", data->alarms);
444}
445
446static DEVICE_ATTR_RO(alarms);
447
448static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
449 char *buf)
450{
451 struct w83781d_data *data = w83781d_update_device(dev);
452 int bitnr = to_sensor_dev_attr(attr)->index;
453 return sprintf(buf, fmt: "%u\n", (data->alarms >> bitnr) & 1);
454}
455
456/* The W83781D has a single alarm bit for temp2 and temp3 */
457static ssize_t show_temp3_alarm(struct device *dev,
458 struct device_attribute *attr, char *buf)
459{
460 struct w83781d_data *data = w83781d_update_device(dev);
461 int bitnr = (data->type == w83781d) ? 5 : 13;
462 return sprintf(buf, fmt: "%u\n", (data->alarms >> bitnr) & 1);
463}
464
465static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
466static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
467static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
468static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
469static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
470static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
471static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
472static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
473static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
474static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
475static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
476static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
477static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
478static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
479static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
480
481static ssize_t beep_mask_show(struct device *dev,
482 struct device_attribute *attr, char *buf)
483{
484 struct w83781d_data *data = w83781d_update_device(dev);
485 return sprintf(buf, fmt: "%ld\n",
486 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
487}
488
489static ssize_t
490beep_mask_store(struct device *dev, struct device_attribute *attr,
491 const char *buf, size_t count)
492{
493 struct w83781d_data *data = dev_get_drvdata(dev);
494 unsigned long val;
495 int err;
496
497 err = kstrtoul(s: buf, base: 10, res: &val);
498 if (err)
499 return err;
500
501 mutex_lock(&data->update_lock);
502 data->beep_mask &= 0x8000; /* preserve beep enable */
503 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
504 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
505 value: data->beep_mask & 0xff);
506 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
507 value: (data->beep_mask >> 8) & 0xff);
508 if (data->type != w83781d && data->type != as99127f) {
509 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
510 value: ((data->beep_mask) >> 16) & 0xff);
511 }
512 mutex_unlock(lock: &data->update_lock);
513
514 return count;
515}
516
517static DEVICE_ATTR_RW(beep_mask);
518
519static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
520 char *buf)
521{
522 struct w83781d_data *data = w83781d_update_device(dev);
523 int bitnr = to_sensor_dev_attr(attr)->index;
524 return sprintf(buf, fmt: "%u\n", (data->beep_mask >> bitnr) & 1);
525}
526
527static ssize_t
528store_beep(struct device *dev, struct device_attribute *attr,
529 const char *buf, size_t count)
530{
531 struct w83781d_data *data = dev_get_drvdata(dev);
532 int bitnr = to_sensor_dev_attr(attr)->index;
533 u8 reg;
534 unsigned long bit;
535 int err;
536
537 err = kstrtoul(s: buf, base: 10, res: &bit);
538 if (err)
539 return err;
540
541 if (bit & ~1)
542 return -EINVAL;
543
544 mutex_lock(&data->update_lock);
545 if (bit)
546 data->beep_mask |= (1 << bitnr);
547 else
548 data->beep_mask &= ~(1 << bitnr);
549
550 if (bitnr < 8) {
551 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
552 if (bit)
553 reg |= (1 << bitnr);
554 else
555 reg &= ~(1 << bitnr);
556 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, value: reg);
557 } else if (bitnr < 16) {
558 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
559 if (bit)
560 reg |= (1 << (bitnr - 8));
561 else
562 reg &= ~(1 << (bitnr - 8));
563 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, value: reg);
564 } else {
565 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
566 if (bit)
567 reg |= (1 << (bitnr - 16));
568 else
569 reg &= ~(1 << (bitnr - 16));
570 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, value: reg);
571 }
572 mutex_unlock(lock: &data->update_lock);
573
574 return count;
575}
576
577/* The W83781D has a single beep bit for temp2 and temp3 */
578static ssize_t show_temp3_beep(struct device *dev,
579 struct device_attribute *attr, char *buf)
580{
581 struct w83781d_data *data = w83781d_update_device(dev);
582 int bitnr = (data->type == w83781d) ? 5 : 13;
583 return sprintf(buf, fmt: "%u\n", (data->beep_mask >> bitnr) & 1);
584}
585
586static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
587 show_beep, store_beep, 0);
588static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
589 show_beep, store_beep, 1);
590static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
591 show_beep, store_beep, 2);
592static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
593 show_beep, store_beep, 3);
594static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
595 show_beep, store_beep, 8);
596static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
597 show_beep, store_beep, 9);
598static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
599 show_beep, store_beep, 10);
600static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
601 show_beep, store_beep, 16);
602static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
603 show_beep, store_beep, 17);
604static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
605 show_beep, store_beep, 6);
606static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
607 show_beep, store_beep, 7);
608static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
609 show_beep, store_beep, 11);
610static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
611 show_beep, store_beep, 4);
612static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
613 show_beep, store_beep, 5);
614static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
615 show_temp3_beep, store_beep, 13);
616static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
617 show_beep, store_beep, 15);
618
619static ssize_t
620show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
621{
622 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
623 struct w83781d_data *data = w83781d_update_device(dev);
624 return sprintf(buf, fmt: "%ld\n",
625 (long) DIV_FROM_REG(data->fan_div[attr->index]));
626}
627
628/*
629 * Note: we save and restore the fan minimum here, because its value is
630 * determined in part by the fan divisor. This follows the principle of
631 * least surprise; the user doesn't expect the fan minimum to change just
632 * because the divisor changed.
633 */
634static ssize_t
635store_fan_div(struct device *dev, struct device_attribute *da,
636 const char *buf, size_t count)
637{
638 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
639 struct w83781d_data *data = dev_get_drvdata(dev);
640 unsigned long min;
641 int nr = attr->index;
642 u8 reg;
643 unsigned long val;
644 int err;
645
646 err = kstrtoul(s: buf, base: 10, res: &val);
647 if (err)
648 return err;
649
650 mutex_lock(&data->update_lock);
651
652 /* Save fan_min */
653 min = FAN_FROM_REG(val: data->fan_min[nr],
654 DIV_FROM_REG(data->fan_div[nr]));
655
656 data->fan_div[nr] = DIV_TO_REG(val, type: data->type);
657
658 reg = (w83781d_read_value(data, reg: nr == 2 ?
659 W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
660 & (nr == 0 ? 0xcf : 0x3f))
661 | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
662 w83781d_write_value(data, reg: nr == 2 ?
663 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, value: reg);
664
665 /* w83781d and as99127f don't have extended divisor bits */
666 if (data->type != w83781d && data->type != as99127f) {
667 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
668 & ~(1 << (5 + nr)))
669 | ((data->fan_div[nr] & 0x04) << (3 + nr));
670 w83781d_write_value(data, W83781D_REG_VBAT, value: reg);
671 }
672
673 /* Restore fan_min */
674 data->fan_min[nr] = FAN_TO_REG(rpm: min, DIV_FROM_REG(data->fan_div[nr]));
675 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), value: data->fan_min[nr]);
676
677 mutex_unlock(lock: &data->update_lock);
678 return count;
679}
680
681static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
682 show_fan_div, store_fan_div, 0);
683static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
684 show_fan_div, store_fan_div, 1);
685static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
686 show_fan_div, store_fan_div, 2);
687
688static ssize_t
689show_pwm(struct device *dev, struct device_attribute *da, char *buf)
690{
691 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
692 struct w83781d_data *data = w83781d_update_device(dev);
693 return sprintf(buf, fmt: "%d\n", (int)data->pwm[attr->index]);
694}
695
696static ssize_t
697pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)
698{
699 struct w83781d_data *data = w83781d_update_device(dev);
700 return sprintf(buf, fmt: "%d\n", (int)data->pwm2_enable);
701}
702
703static ssize_t
704store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
705 size_t count)
706{
707 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
708 struct w83781d_data *data = dev_get_drvdata(dev);
709 int nr = attr->index;
710 unsigned long val;
711 int err;
712
713 err = kstrtoul(s: buf, base: 10, res: &val);
714 if (err)
715 return err;
716
717 mutex_lock(&data->update_lock);
718 data->pwm[nr] = clamp_val(val, 0, 255);
719 w83781d_write_value(data, reg: W83781D_REG_PWM[nr], value: data->pwm[nr]);
720 mutex_unlock(lock: &data->update_lock);
721 return count;
722}
723
724static ssize_t
725pwm2_enable_store(struct device *dev, struct device_attribute *da,
726 const char *buf, size_t count)
727{
728 struct w83781d_data *data = dev_get_drvdata(dev);
729 unsigned long val;
730 u32 reg;
731 int err;
732
733 err = kstrtoul(s: buf, base: 10, res: &val);
734 if (err)
735 return err;
736
737 mutex_lock(&data->update_lock);
738
739 switch (val) {
740 case 0:
741 case 1:
742 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
743 w83781d_write_value(data, W83781D_REG_PWMCLK12,
744 value: (reg & 0xf7) | (val << 3));
745
746 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
747 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
748 value: (reg & 0xef) | (!val << 4));
749
750 data->pwm2_enable = val;
751 break;
752
753 default:
754 mutex_unlock(lock: &data->update_lock);
755 return -EINVAL;
756 }
757
758 mutex_unlock(lock: &data->update_lock);
759 return count;
760}
761
762static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
763static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
764static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
765static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
766/* only PWM2 can be enabled/disabled */
767static DEVICE_ATTR_RW(pwm2_enable);
768
769static ssize_t
770show_sensor(struct device *dev, struct device_attribute *da, char *buf)
771{
772 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
773 struct w83781d_data *data = w83781d_update_device(dev);
774 return sprintf(buf, fmt: "%d\n", (int)data->sens[attr->index]);
775}
776
777static ssize_t
778store_sensor(struct device *dev, struct device_attribute *da,
779 const char *buf, size_t count)
780{
781 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
782 struct w83781d_data *data = dev_get_drvdata(dev);
783 int nr = attr->index;
784 unsigned long val;
785 u32 tmp;
786 int err;
787
788 err = kstrtoul(s: buf, base: 10, res: &val);
789 if (err)
790 return err;
791
792 mutex_lock(&data->update_lock);
793
794 switch (val) {
795 case 1: /* PII/Celeron diode */
796 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
797 w83781d_write_value(data, W83781D_REG_SCFG1,
798 value: tmp | BIT_SCFG1[nr]);
799 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
800 w83781d_write_value(data, W83781D_REG_SCFG2,
801 value: tmp | BIT_SCFG2[nr]);
802 data->sens[nr] = val;
803 break;
804 case 2: /* 3904 */
805 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
806 w83781d_write_value(data, W83781D_REG_SCFG1,
807 value: tmp | BIT_SCFG1[nr]);
808 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
809 w83781d_write_value(data, W83781D_REG_SCFG2,
810 value: tmp & ~BIT_SCFG2[nr]);
811 data->sens[nr] = val;
812 break;
813 case W83781D_DEFAULT_BETA:
814 dev_warn(dev,
815 "Sensor type %d is deprecated, please use 4 instead\n",
816 W83781D_DEFAULT_BETA);
817 fallthrough;
818 case 4: /* thermistor */
819 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
820 w83781d_write_value(data, W83781D_REG_SCFG1,
821 value: tmp & ~BIT_SCFG1[nr]);
822 data->sens[nr] = val;
823 break;
824 default:
825 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
826 (long) val);
827 break;
828 }
829
830 mutex_unlock(lock: &data->update_lock);
831 return count;
832}
833
834static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
835 show_sensor, store_sensor, 0);
836static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
837 show_sensor, store_sensor, 1);
838static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
839 show_sensor, store_sensor, 2);
840
841/*
842 * Assumes that adapter is of I2C, not ISA variety.
843 * OTHERWISE DON'T CALL THIS
844 */
845static int
846w83781d_detect_subclients(struct i2c_client *new_client)
847{
848 int i, val1 = 0, id;
849 int err;
850 int address = new_client->addr;
851 unsigned short sc_addr[2];
852 struct i2c_adapter *adapter = new_client->adapter;
853 struct w83781d_data *data = i2c_get_clientdata(client: new_client);
854 enum chips kind = data->type;
855 int num_sc = 1;
856
857 id = i2c_adapter_id(adap: adapter);
858
859 if (force_subclients[0] == id && force_subclients[1] == address) {
860 for (i = 2; i <= 3; i++) {
861 if (force_subclients[i] < 0x48 ||
862 force_subclients[i] > 0x4f) {
863 dev_err(&new_client->dev,
864 "Invalid subclient address %d; must be 0x48-0x4f\n",
865 force_subclients[i]);
866 err = -EINVAL;
867 goto ERROR_SC_1;
868 }
869 }
870 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
871 value: (force_subclients[2] & 0x07) |
872 ((force_subclients[3] & 0x07) << 4));
873 sc_addr[0] = force_subclients[2];
874 } else {
875 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
876 sc_addr[0] = 0x48 + (val1 & 0x07);
877 }
878
879 if (kind != w83783s) {
880 num_sc = 2;
881 if (force_subclients[0] == id &&
882 force_subclients[1] == address) {
883 sc_addr[1] = force_subclients[3];
884 } else {
885 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
886 }
887 if (sc_addr[0] == sc_addr[1]) {
888 dev_err(&new_client->dev,
889 "Duplicate addresses 0x%x for subclients.\n",
890 sc_addr[0]);
891 err = -EBUSY;
892 goto ERROR_SC_2;
893 }
894 }
895
896 for (i = 0; i < num_sc; i++) {
897 data->lm75[i] = i2c_new_dummy_device(adapter, address: sc_addr[i]);
898 if (IS_ERR(ptr: data->lm75[i])) {
899 dev_err(&new_client->dev,
900 "Subclient %d registration at address 0x%x failed.\n",
901 i, sc_addr[i]);
902 err = PTR_ERR(ptr: data->lm75[i]);
903 if (i == 1)
904 goto ERROR_SC_3;
905 goto ERROR_SC_2;
906 }
907 }
908
909 return 0;
910
911/* Undo inits in case of errors */
912ERROR_SC_3:
913 i2c_unregister_device(client: data->lm75[0]);
914ERROR_SC_2:
915ERROR_SC_1:
916 return err;
917}
918
919#define IN_UNIT_ATTRS(X) \
920 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
921 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
922 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
923 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
924 &sensor_dev_attr_in##X##_beep.dev_attr.attr
925
926#define FAN_UNIT_ATTRS(X) \
927 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
928 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
929 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
930 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
931 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
932
933#define TEMP_UNIT_ATTRS(X) \
934 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
935 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
936 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
937 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
938 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
939
940static struct attribute *w83781d_attributes[] = {
941 IN_UNIT_ATTRS(0),
942 IN_UNIT_ATTRS(2),
943 IN_UNIT_ATTRS(3),
944 IN_UNIT_ATTRS(4),
945 IN_UNIT_ATTRS(5),
946 IN_UNIT_ATTRS(6),
947 FAN_UNIT_ATTRS(1),
948 FAN_UNIT_ATTRS(2),
949 FAN_UNIT_ATTRS(3),
950 TEMP_UNIT_ATTRS(1),
951 TEMP_UNIT_ATTRS(2),
952 &dev_attr_cpu0_vid.attr,
953 &dev_attr_vrm.attr,
954 &dev_attr_alarms.attr,
955 &dev_attr_beep_mask.attr,
956 &sensor_dev_attr_beep_enable.dev_attr.attr,
957 NULL
958};
959static const struct attribute_group w83781d_group = {
960 .attrs = w83781d_attributes,
961};
962
963static struct attribute *w83781d_attributes_in1[] = {
964 IN_UNIT_ATTRS(1),
965 NULL
966};
967static const struct attribute_group w83781d_group_in1 = {
968 .attrs = w83781d_attributes_in1,
969};
970
971static struct attribute *w83781d_attributes_in78[] = {
972 IN_UNIT_ATTRS(7),
973 IN_UNIT_ATTRS(8),
974 NULL
975};
976static const struct attribute_group w83781d_group_in78 = {
977 .attrs = w83781d_attributes_in78,
978};
979
980static struct attribute *w83781d_attributes_temp3[] = {
981 TEMP_UNIT_ATTRS(3),
982 NULL
983};
984static const struct attribute_group w83781d_group_temp3 = {
985 .attrs = w83781d_attributes_temp3,
986};
987
988static struct attribute *w83781d_attributes_pwm12[] = {
989 &sensor_dev_attr_pwm1.dev_attr.attr,
990 &sensor_dev_attr_pwm2.dev_attr.attr,
991 &dev_attr_pwm2_enable.attr,
992 NULL
993};
994static const struct attribute_group w83781d_group_pwm12 = {
995 .attrs = w83781d_attributes_pwm12,
996};
997
998static struct attribute *w83781d_attributes_pwm34[] = {
999 &sensor_dev_attr_pwm3.dev_attr.attr,
1000 &sensor_dev_attr_pwm4.dev_attr.attr,
1001 NULL
1002};
1003static const struct attribute_group w83781d_group_pwm34 = {
1004 .attrs = w83781d_attributes_pwm34,
1005};
1006
1007static struct attribute *w83781d_attributes_other[] = {
1008 &sensor_dev_attr_temp1_type.dev_attr.attr,
1009 &sensor_dev_attr_temp2_type.dev_attr.attr,
1010 &sensor_dev_attr_temp3_type.dev_attr.attr,
1011 NULL
1012};
1013static const struct attribute_group w83781d_group_other = {
1014 .attrs = w83781d_attributes_other,
1015};
1016
1017/* No clean up is done on error, it's up to the caller */
1018static int
1019w83781d_create_files(struct device *dev, int kind, int is_isa)
1020{
1021 int err;
1022
1023 err = sysfs_create_group(kobj: &dev->kobj, grp: &w83781d_group);
1024 if (err)
1025 return err;
1026
1027 if (kind != w83783s) {
1028 err = sysfs_create_group(kobj: &dev->kobj, grp: &w83781d_group_in1);
1029 if (err)
1030 return err;
1031 }
1032 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1033 err = sysfs_create_group(kobj: &dev->kobj, grp: &w83781d_group_in78);
1034 if (err)
1035 return err;
1036 }
1037 if (kind != w83783s) {
1038 err = sysfs_create_group(kobj: &dev->kobj, grp: &w83781d_group_temp3);
1039 if (err)
1040 return err;
1041
1042 if (kind != w83781d) {
1043 err = sysfs_chmod_file(kobj: &dev->kobj,
1044 attr: &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1045 S_IRUGO | S_IWUSR);
1046 if (err)
1047 return err;
1048 }
1049 }
1050
1051 if (kind != w83781d && kind != as99127f) {
1052 err = sysfs_create_group(kobj: &dev->kobj, grp: &w83781d_group_pwm12);
1053 if (err)
1054 return err;
1055 }
1056 if (kind == w83782d && !is_isa) {
1057 err = sysfs_create_group(kobj: &dev->kobj, grp: &w83781d_group_pwm34);
1058 if (err)
1059 return err;
1060 }
1061
1062 if (kind != as99127f && kind != w83781d) {
1063 err = device_create_file(device: dev,
1064 entry: &sensor_dev_attr_temp1_type.dev_attr);
1065 if (err)
1066 return err;
1067 err = device_create_file(device: dev,
1068 entry: &sensor_dev_attr_temp2_type.dev_attr);
1069 if (err)
1070 return err;
1071 if (kind != w83783s) {
1072 err = device_create_file(device: dev,
1073 entry: &sensor_dev_attr_temp3_type.dev_attr);
1074 if (err)
1075 return err;
1076 }
1077 }
1078
1079 return 0;
1080}
1081
1082/* Return 0 if detection is successful, -ENODEV otherwise */
1083static int
1084w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
1085{
1086 int val1, val2;
1087 struct w83781d_data *isa = w83781d_data_if_isa();
1088 struct i2c_adapter *adapter = client->adapter;
1089 int address = client->addr;
1090 const char *client_name;
1091 enum vendor { winbond, asus } vendid;
1092
1093 if (!i2c_check_functionality(adap: adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1094 return -ENODEV;
1095
1096 /*
1097 * We block updates of the ISA device to minimize the risk of
1098 * concurrent access to the same W83781D chip through different
1099 * interfaces.
1100 */
1101 if (isa)
1102 mutex_lock(&isa->update_lock);
1103
1104 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1105 dev_dbg(&adapter->dev,
1106 "Detection of w83781d chip failed at step 3\n");
1107 goto err_nodev;
1108 }
1109
1110 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1111 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1112 /* Check for Winbond or Asus ID if in bank 0 */
1113 if (!(val1 & 0x07) &&
1114 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1115 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1116 dev_dbg(&adapter->dev,
1117 "Detection of w83781d chip failed at step 4\n");
1118 goto err_nodev;
1119 }
1120 /*
1121 * If Winbond SMBus, check address at 0x48.
1122 * Asus doesn't support, except for as99127f rev.2
1123 */
1124 if ((!(val1 & 0x80) && val2 == 0xa3) ||
1125 ((val1 & 0x80) && val2 == 0x5c)) {
1126 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1127 != address) {
1128 dev_dbg(&adapter->dev,
1129 "Detection of w83781d chip failed at step 5\n");
1130 goto err_nodev;
1131 }
1132 }
1133
1134 /* Put it now into bank 0 and Vendor ID High Byte */
1135 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1136 value: (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1137 & 0x78) | 0x80);
1138
1139 /* Get the vendor ID */
1140 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1141 if (val2 == 0x5c)
1142 vendid = winbond;
1143 else if (val2 == 0x12)
1144 vendid = asus;
1145 else {
1146 dev_dbg(&adapter->dev,
1147 "w83781d chip vendor is neither Winbond nor Asus\n");
1148 goto err_nodev;
1149 }
1150
1151 /* Determine the chip type. */
1152 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1153 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1154 client_name = "w83781d";
1155 else if (val1 == 0x30 && vendid == winbond)
1156 client_name = "w83782d";
1157 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1158 client_name = "w83783s";
1159 else if (val1 == 0x31)
1160 client_name = "as99127f";
1161 else
1162 goto err_nodev;
1163
1164 if (val1 <= 0x30 && w83781d_alias_detect(client, chipid: val1)) {
1165 dev_dbg(&adapter->dev,
1166 "Device at 0x%02x appears to be the same as ISA device\n",
1167 address);
1168 goto err_nodev;
1169 }
1170
1171 if (isa)
1172 mutex_unlock(lock: &isa->update_lock);
1173
1174 strscpy(p: info->type, q: client_name, I2C_NAME_SIZE);
1175
1176 return 0;
1177
1178 err_nodev:
1179 if (isa)
1180 mutex_unlock(lock: &isa->update_lock);
1181 return -ENODEV;
1182}
1183
1184static void w83781d_remove_files(struct device *dev)
1185{
1186 sysfs_remove_group(kobj: &dev->kobj, grp: &w83781d_group);
1187 sysfs_remove_group(kobj: &dev->kobj, grp: &w83781d_group_in1);
1188 sysfs_remove_group(kobj: &dev->kobj, grp: &w83781d_group_in78);
1189 sysfs_remove_group(kobj: &dev->kobj, grp: &w83781d_group_temp3);
1190 sysfs_remove_group(kobj: &dev->kobj, grp: &w83781d_group_pwm12);
1191 sysfs_remove_group(kobj: &dev->kobj, grp: &w83781d_group_pwm34);
1192 sysfs_remove_group(kobj: &dev->kobj, grp: &w83781d_group_other);
1193}
1194
1195static const struct i2c_device_id w83781d_ids[];
1196
1197static int w83781d_probe(struct i2c_client *client)
1198{
1199 struct device *dev = &client->dev;
1200 struct w83781d_data *data;
1201 int err;
1202
1203 data = devm_kzalloc(dev, size: sizeof(struct w83781d_data), GFP_KERNEL);
1204 if (!data)
1205 return -ENOMEM;
1206
1207 i2c_set_clientdata(client, data);
1208 mutex_init(&data->lock);
1209 mutex_init(&data->update_lock);
1210
1211 data->type = i2c_match_id(id: w83781d_ids, client)->driver_data;
1212 data->client = client;
1213
1214 /* attach secondary i2c lm75-like clients */
1215 err = w83781d_detect_subclients(new_client: client);
1216 if (err)
1217 return err;
1218
1219 /* Initialize the chip */
1220 w83781d_init_device(dev);
1221
1222 /* Register sysfs hooks */
1223 err = w83781d_create_files(dev, kind: data->type, is_isa: 0);
1224 if (err)
1225 goto exit_remove_files;
1226
1227 data->hwmon_dev = hwmon_device_register(dev);
1228 if (IS_ERR(ptr: data->hwmon_dev)) {
1229 err = PTR_ERR(ptr: data->hwmon_dev);
1230 goto exit_remove_files;
1231 }
1232
1233 return 0;
1234
1235 exit_remove_files:
1236 w83781d_remove_files(dev);
1237 i2c_unregister_device(client: data->lm75[0]);
1238 i2c_unregister_device(client: data->lm75[1]);
1239 return err;
1240}
1241
1242static void
1243w83781d_remove(struct i2c_client *client)
1244{
1245 struct w83781d_data *data = i2c_get_clientdata(client);
1246 struct device *dev = &client->dev;
1247
1248 hwmon_device_unregister(dev: data->hwmon_dev);
1249 w83781d_remove_files(dev);
1250
1251 i2c_unregister_device(client: data->lm75[0]);
1252 i2c_unregister_device(client: data->lm75[1]);
1253}
1254
1255static int
1256w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1257{
1258 struct i2c_client *client = data->client;
1259 int res, bank;
1260 struct i2c_client *cl;
1261
1262 bank = (reg >> 8) & 0x0f;
1263 if (bank > 2)
1264 /* switch banks */
1265 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1266 value: bank);
1267 if (bank == 0 || bank > 2) {
1268 res = i2c_smbus_read_byte_data(client, command: reg & 0xff);
1269 } else {
1270 /* switch to subclient */
1271 cl = data->lm75[bank - 1];
1272 /* convert from ISA to LM75 I2C addresses */
1273 switch (reg & 0xff) {
1274 case 0x50: /* TEMP */
1275 res = i2c_smbus_read_word_swapped(client: cl, command: 0);
1276 break;
1277 case 0x52: /* CONFIG */
1278 res = i2c_smbus_read_byte_data(client: cl, command: 1);
1279 break;
1280 case 0x53: /* HYST */
1281 res = i2c_smbus_read_word_swapped(client: cl, command: 2);
1282 break;
1283 case 0x55: /* OVER */
1284 default:
1285 res = i2c_smbus_read_word_swapped(client: cl, command: 3);
1286 break;
1287 }
1288 }
1289 if (bank > 2)
1290 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, value: 0);
1291
1292 return res;
1293}
1294
1295static int
1296w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1297{
1298 struct i2c_client *client = data->client;
1299 int bank;
1300 struct i2c_client *cl;
1301
1302 bank = (reg >> 8) & 0x0f;
1303 if (bank > 2)
1304 /* switch banks */
1305 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1306 value: bank);
1307 if (bank == 0 || bank > 2) {
1308 i2c_smbus_write_byte_data(client, command: reg & 0xff,
1309 value: value & 0xff);
1310 } else {
1311 /* switch to subclient */
1312 cl = data->lm75[bank - 1];
1313 /* convert from ISA to LM75 I2C addresses */
1314 switch (reg & 0xff) {
1315 case 0x52: /* CONFIG */
1316 i2c_smbus_write_byte_data(client: cl, command: 1, value: value & 0xff);
1317 break;
1318 case 0x53: /* HYST */
1319 i2c_smbus_write_word_swapped(client: cl, command: 2, value);
1320 break;
1321 case 0x55: /* OVER */
1322 i2c_smbus_write_word_swapped(client: cl, command: 3, value);
1323 break;
1324 }
1325 }
1326 if (bank > 2)
1327 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, value: 0);
1328
1329 return 0;
1330}
1331
1332static void
1333w83781d_init_device(struct device *dev)
1334{
1335 struct w83781d_data *data = dev_get_drvdata(dev);
1336 int i, p;
1337 int type = data->type;
1338 u8 tmp;
1339
1340 if (reset && type != as99127f) { /*
1341 * this resets registers we don't have
1342 * documentation for on the as99127f
1343 */
1344 /*
1345 * Resetting the chip has been the default for a long time,
1346 * but it causes the BIOS initializations (fan clock dividers,
1347 * thermal sensor types...) to be lost, so it is now optional.
1348 * It might even go away if nobody reports it as being useful,
1349 * as I see very little reason why this would be needed at
1350 * all.
1351 */
1352 dev_info(dev,
1353 "If reset=1 solved a problem you were having, please report!\n");
1354
1355 /* save these registers */
1356 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1357 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1358 /*
1359 * Reset all except Watchdog values and last conversion values
1360 * This sets fan-divs to 2, among others
1361 */
1362 w83781d_write_value(data, W83781D_REG_CONFIG, value: 0x80);
1363 /*
1364 * Restore the registers and disable power-on abnormal beep.
1365 * This saves FAN 1/2/3 input/output values set by BIOS.
1366 */
1367 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, value: i | 0x80);
1368 w83781d_write_value(data, W83781D_REG_PWMCLK12, value: p);
1369 /*
1370 * Disable master beep-enable (reset turns it on).
1371 * Individual beep_mask should be reset to off but for some
1372 * reason disabling this bit helps some people not get beeped
1373 */
1374 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, value: 0);
1375 }
1376
1377 /*
1378 * Disable power-on abnormal beep, as advised by the datasheet.
1379 * Already done if reset=1.
1380 */
1381 if (init && !reset && type != as99127f) {
1382 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1383 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, value: i | 0x80);
1384 }
1385
1386 data->vrm = vid_which_vrm();
1387
1388 if ((type != w83781d) && (type != as99127f)) {
1389 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1390 for (i = 1; i <= 3; i++) {
1391 if (!(tmp & BIT_SCFG1[i - 1])) {
1392 data->sens[i - 1] = 4;
1393 } else {
1394 if (w83781d_read_value
1395 (data,
1396 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1397 data->sens[i - 1] = 1;
1398 else
1399 data->sens[i - 1] = 2;
1400 }
1401 if (type == w83783s && i == 2)
1402 break;
1403 }
1404 }
1405
1406 if (init && type != as99127f) {
1407 /* Enable temp2 */
1408 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1409 if (tmp & 0x01) {
1410 dev_warn(dev,
1411 "Enabling temp2, readings might not make sense\n");
1412 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1413 value: tmp & 0xfe);
1414 }
1415
1416 /* Enable temp3 */
1417 if (type != w83783s) {
1418 tmp = w83781d_read_value(data,
1419 W83781D_REG_TEMP3_CONFIG);
1420 if (tmp & 0x01) {
1421 dev_warn(dev,
1422 "Enabling temp3, readings might not make sense\n");
1423 w83781d_write_value(data,
1424 W83781D_REG_TEMP3_CONFIG, value: tmp & 0xfe);
1425 }
1426 }
1427 }
1428
1429 /* Start monitoring */
1430 w83781d_write_value(data, W83781D_REG_CONFIG,
1431 value: (w83781d_read_value(data,
1432 W83781D_REG_CONFIG) & 0xf7)
1433 | 0x01);
1434
1435 /* A few vars need to be filled upon startup */
1436 for (i = 0; i < 3; i++) {
1437 data->fan_min[i] = w83781d_read_value(data,
1438 W83781D_REG_FAN_MIN(i));
1439 }
1440
1441 mutex_init(&data->update_lock);
1442}
1443
1444static struct w83781d_data *w83781d_update_device(struct device *dev)
1445{
1446 struct w83781d_data *data = dev_get_drvdata(dev);
1447 struct i2c_client *client = data->client;
1448 int i;
1449
1450 mutex_lock(&data->update_lock);
1451
1452 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1453 || !data->valid) {
1454 dev_dbg(dev, "Starting device update\n");
1455
1456 for (i = 0; i <= 8; i++) {
1457 if (data->type == w83783s && i == 1)
1458 continue; /* 783S has no in1 */
1459 data->in[i] =
1460 w83781d_read_value(data, W83781D_REG_IN(i));
1461 data->in_min[i] =
1462 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1463 data->in_max[i] =
1464 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1465 if ((data->type != w83782d) && (i == 6))
1466 break;
1467 }
1468 for (i = 0; i < 3; i++) {
1469 data->fan[i] =
1470 w83781d_read_value(data, W83781D_REG_FAN(i));
1471 data->fan_min[i] =
1472 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1473 }
1474 if (data->type != w83781d && data->type != as99127f) {
1475 for (i = 0; i < 4; i++) {
1476 data->pwm[i] =
1477 w83781d_read_value(data,
1478 reg: W83781D_REG_PWM[i]);
1479 /* Only W83782D on SMBus has PWM3 and PWM4 */
1480 if ((data->type != w83782d || !client)
1481 && i == 1)
1482 break;
1483 }
1484 /* Only PWM2 can be disabled */
1485 data->pwm2_enable = (w83781d_read_value(data,
1486 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1487 }
1488
1489 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1490 data->temp_max =
1491 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1492 data->temp_max_hyst =
1493 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1494 data->temp_add[0] =
1495 w83781d_read_value(data, W83781D_REG_TEMP(2));
1496 data->temp_max_add[0] =
1497 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1498 data->temp_max_hyst_add[0] =
1499 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1500 if (data->type != w83783s) {
1501 data->temp_add[1] =
1502 w83781d_read_value(data, W83781D_REG_TEMP(3));
1503 data->temp_max_add[1] =
1504 w83781d_read_value(data,
1505 W83781D_REG_TEMP_OVER(3));
1506 data->temp_max_hyst_add[1] =
1507 w83781d_read_value(data,
1508 W83781D_REG_TEMP_HYST(3));
1509 }
1510 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1511 data->vid = i & 0x0f;
1512 data->vid |= (w83781d_read_value(data,
1513 W83781D_REG_CHIPID) & 0x01) << 4;
1514 data->fan_div[0] = (i >> 4) & 0x03;
1515 data->fan_div[1] = (i >> 6) & 0x03;
1516 data->fan_div[2] = (w83781d_read_value(data,
1517 W83781D_REG_PIN) >> 6) & 0x03;
1518 if ((data->type != w83781d) && (data->type != as99127f)) {
1519 i = w83781d_read_value(data, W83781D_REG_VBAT);
1520 data->fan_div[0] |= (i >> 3) & 0x04;
1521 data->fan_div[1] |= (i >> 4) & 0x04;
1522 data->fan_div[2] |= (i >> 5) & 0x04;
1523 }
1524 if (data->type == w83782d) {
1525 data->alarms = w83781d_read_value(data,
1526 W83782D_REG_ALARM1)
1527 | (w83781d_read_value(data,
1528 W83782D_REG_ALARM2) << 8)
1529 | (w83781d_read_value(data,
1530 W83782D_REG_ALARM3) << 16);
1531 } else if (data->type == w83783s) {
1532 data->alarms = w83781d_read_value(data,
1533 W83782D_REG_ALARM1)
1534 | (w83781d_read_value(data,
1535 W83782D_REG_ALARM2) << 8);
1536 } else {
1537 /*
1538 * No real-time status registers, fall back to
1539 * interrupt status registers
1540 */
1541 data->alarms = w83781d_read_value(data,
1542 W83781D_REG_ALARM1)
1543 | (w83781d_read_value(data,
1544 W83781D_REG_ALARM2) << 8);
1545 }
1546 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1547 data->beep_mask = (i << 8) +
1548 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1549 if ((data->type != w83781d) && (data->type != as99127f)) {
1550 data->beep_mask |=
1551 w83781d_read_value(data,
1552 W83781D_REG_BEEP_INTS3) << 16;
1553 }
1554 data->last_updated = jiffies;
1555 data->valid = true;
1556 }
1557
1558 mutex_unlock(lock: &data->update_lock);
1559
1560 return data;
1561}
1562
1563static const struct i2c_device_id w83781d_ids[] = {
1564 { "w83781d", w83781d, },
1565 { "w83782d", w83782d, },
1566 { "w83783s", w83783s, },
1567 { "as99127f", as99127f },
1568 { /* LIST END */ }
1569};
1570MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1571
1572static const struct of_device_id w83781d_of_match[] = {
1573 { .compatible = "winbond,w83781d" },
1574 { .compatible = "winbond,w83781g" },
1575 { .compatible = "winbond,w83782d" },
1576 { .compatible = "winbond,w83783s" },
1577 { .compatible = "asus,as99127f" },
1578 { },
1579};
1580MODULE_DEVICE_TABLE(of, w83781d_of_match);
1581
1582static struct i2c_driver w83781d_driver = {
1583 .class = I2C_CLASS_HWMON,
1584 .driver = {
1585 .name = "w83781d",
1586 .of_match_table = w83781d_of_match,
1587 },
1588 .probe = w83781d_probe,
1589 .remove = w83781d_remove,
1590 .id_table = w83781d_ids,
1591 .detect = w83781d_detect,
1592 .address_list = normal_i2c,
1593};
1594
1595/*
1596 * ISA related code
1597 */
1598#ifdef CONFIG_ISA
1599
1600/* ISA device, if found */
1601static struct platform_device *pdev;
1602
1603static unsigned short isa_address = 0x290;
1604
1605/*
1606 * I2C devices get this name attribute automatically, but for ISA devices
1607 * we must create it by ourselves.
1608 */
1609static ssize_t
1610name_show(struct device *dev, struct device_attribute *devattr, char *buf)
1611{
1612 struct w83781d_data *data = dev_get_drvdata(dev);
1613 return sprintf(buf, "%s\n", data->name);
1614}
1615static DEVICE_ATTR_RO(name);
1616
1617static struct w83781d_data *w83781d_data_if_isa(void)
1618{
1619 return pdev ? platform_get_drvdata(pdev) : NULL;
1620}
1621
1622/* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1623static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1624{
1625 struct w83781d_data *isa;
1626 int i;
1627
1628 if (!pdev) /* No ISA chip */
1629 return 0;
1630
1631 isa = platform_get_drvdata(pdev);
1632
1633 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1634 return 0; /* Address doesn't match */
1635 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1636 return 0; /* Chip type doesn't match */
1637
1638 /*
1639 * We compare all the limit registers, the config register and the
1640 * interrupt mask registers
1641 */
1642 for (i = 0x2b; i <= 0x3d; i++) {
1643 if (w83781d_read_value(isa, i) !=
1644 i2c_smbus_read_byte_data(client, i))
1645 return 0;
1646 }
1647 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
1648 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
1649 return 0;
1650 for (i = 0x43; i <= 0x46; i++) {
1651 if (w83781d_read_value(isa, i) !=
1652 i2c_smbus_read_byte_data(client, i))
1653 return 0;
1654 }
1655
1656 return 1;
1657}
1658
1659static int
1660w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1661{
1662 int word_sized, res;
1663
1664 word_sized = (((reg & 0xff00) == 0x100)
1665 || ((reg & 0xff00) == 0x200))
1666 && (((reg & 0x00ff) == 0x50)
1667 || ((reg & 0x00ff) == 0x53)
1668 || ((reg & 0x00ff) == 0x55));
1669 if (reg & 0xff00) {
1670 outb_p(W83781D_REG_BANK,
1671 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1672 outb_p(reg >> 8,
1673 data->isa_addr + W83781D_DATA_REG_OFFSET);
1674 }
1675 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1676 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
1677 if (word_sized) {
1678 outb_p((reg & 0xff) + 1,
1679 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1680 res =
1681 (res << 8) + inb_p(data->isa_addr +
1682 W83781D_DATA_REG_OFFSET);
1683 }
1684 if (reg & 0xff00) {
1685 outb_p(W83781D_REG_BANK,
1686 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1687 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1688 }
1689 return res;
1690}
1691
1692static void
1693w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1694{
1695 int word_sized;
1696
1697 word_sized = (((reg & 0xff00) == 0x100)
1698 || ((reg & 0xff00) == 0x200))
1699 && (((reg & 0x00ff) == 0x53)
1700 || ((reg & 0x00ff) == 0x55));
1701 if (reg & 0xff00) {
1702 outb_p(W83781D_REG_BANK,
1703 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1704 outb_p(reg >> 8,
1705 data->isa_addr + W83781D_DATA_REG_OFFSET);
1706 }
1707 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1708 if (word_sized) {
1709 outb_p(value >> 8,
1710 data->isa_addr + W83781D_DATA_REG_OFFSET);
1711 outb_p((reg & 0xff) + 1,
1712 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1713 }
1714 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
1715 if (reg & 0xff00) {
1716 outb_p(W83781D_REG_BANK,
1717 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1718 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1719 }
1720}
1721
1722/*
1723 * The SMBus locks itself, usually, but nothing may access the Winbond between
1724 * bank switches. ISA access must always be locked explicitly!
1725 * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1726 * would slow down the W83781D access and should not be necessary.
1727 * There are some ugly typecasts here, but the good news is - they should
1728 * nowhere else be necessary!
1729 */
1730static int
1731w83781d_read_value(struct w83781d_data *data, u16 reg)
1732{
1733 struct i2c_client *client = data->client;
1734 int res;
1735
1736 mutex_lock(&data->lock);
1737 if (client)
1738 res = w83781d_read_value_i2c(data, reg);
1739 else
1740 res = w83781d_read_value_isa(data, reg);
1741 mutex_unlock(&data->lock);
1742 return res;
1743}
1744
1745static int
1746w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1747{
1748 struct i2c_client *client = data->client;
1749
1750 mutex_lock(&data->lock);
1751 if (client)
1752 w83781d_write_value_i2c(data, reg, value);
1753 else
1754 w83781d_write_value_isa(data, reg, value);
1755 mutex_unlock(&data->lock);
1756 return 0;
1757}
1758
1759static int
1760w83781d_isa_probe(struct platform_device *pdev)
1761{
1762 int err, reg;
1763 struct w83781d_data *data;
1764 struct resource *res;
1765
1766 /* Reserve the ISA region */
1767 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1768 if (!devm_request_region(&pdev->dev,
1769 res->start + W83781D_ADDR_REG_OFFSET, 2,
1770 "w83781d"))
1771 return -EBUSY;
1772
1773 data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
1774 GFP_KERNEL);
1775 if (!data)
1776 return -ENOMEM;
1777
1778 mutex_init(&data->lock);
1779 data->isa_addr = res->start;
1780 platform_set_drvdata(pdev, data);
1781
1782 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1783 switch (reg) {
1784 case 0x30:
1785 data->type = w83782d;
1786 data->name = "w83782d";
1787 break;
1788 default:
1789 data->type = w83781d;
1790 data->name = "w83781d";
1791 }
1792
1793 /* Initialize the W83781D chip */
1794 w83781d_init_device(&pdev->dev);
1795
1796 /* Register sysfs hooks */
1797 err = w83781d_create_files(&pdev->dev, data->type, 1);
1798 if (err)
1799 goto exit_remove_files;
1800
1801 err = device_create_file(&pdev->dev, &dev_attr_name);
1802 if (err)
1803 goto exit_remove_files;
1804
1805 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1806 if (IS_ERR(data->hwmon_dev)) {
1807 err = PTR_ERR(data->hwmon_dev);
1808 goto exit_remove_files;
1809 }
1810
1811 return 0;
1812
1813 exit_remove_files:
1814 w83781d_remove_files(&pdev->dev);
1815 device_remove_file(&pdev->dev, &dev_attr_name);
1816 return err;
1817}
1818
1819static void w83781d_isa_remove(struct platform_device *pdev)
1820{
1821 struct w83781d_data *data = platform_get_drvdata(pdev);
1822
1823 hwmon_device_unregister(data->hwmon_dev);
1824 w83781d_remove_files(&pdev->dev);
1825 device_remove_file(&pdev->dev, &dev_attr_name);
1826}
1827
1828static struct platform_driver w83781d_isa_driver = {
1829 .driver = {
1830 .name = "w83781d",
1831 },
1832 .probe = w83781d_isa_probe,
1833 .remove_new = w83781d_isa_remove,
1834};
1835
1836/* return 1 if a supported chip is found, 0 otherwise */
1837static int __init
1838w83781d_isa_found(unsigned short address)
1839{
1840 int val, save, found = 0;
1841 int port;
1842
1843 /*
1844 * Some boards declare base+0 to base+7 as a PNP device, some base+4
1845 * to base+7 and some base+5 to base+6. So we better request each port
1846 * individually for the probing phase.
1847 */
1848 for (port = address; port < address + W83781D_EXTENT; port++) {
1849 if (!request_region(port, 1, "w83781d")) {
1850 pr_debug("Failed to request port 0x%x\n", port);
1851 goto release;
1852 }
1853 }
1854
1855#define REALLY_SLOW_IO
1856 /*
1857 * We need the timeouts for at least some W83781D-like
1858 * chips. But only if we read 'undefined' registers.
1859 */
1860 val = inb_p(address + 1);
1861 if (inb_p(address + 2) != val
1862 || inb_p(address + 3) != val
1863 || inb_p(address + 7) != val) {
1864 pr_debug("Detection failed at step %d\n", 1);
1865 goto release;
1866 }
1867#undef REALLY_SLOW_IO
1868
1869 /*
1870 * We should be able to change the 7 LSB of the address port. The
1871 * MSB (busy flag) should be clear initially, set after the write.
1872 */
1873 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1874 if (save & 0x80) {
1875 pr_debug("Detection failed at step %d\n", 2);
1876 goto release;
1877 }
1878 val = ~save & 0x7f;
1879 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1880 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1881 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1882 pr_debug("Detection failed at step %d\n", 3);
1883 goto release;
1884 }
1885
1886 /* We found a device, now see if it could be a W83781D */
1887 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1888 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1889 if (val & 0x80) {
1890 pr_debug("Detection failed at step %d\n", 4);
1891 goto release;
1892 }
1893 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1894 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1895 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1896 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1897 if ((!(save & 0x80) && (val != 0xa3))
1898 || ((save & 0x80) && (val != 0x5c))) {
1899 pr_debug("Detection failed at step %d\n", 5);
1900 goto release;
1901 }
1902 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1903 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1904 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1905 pr_debug("Detection failed at step %d\n", 6);
1906 goto release;
1907 }
1908
1909 /* The busy flag should be clear again */
1910 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1911 pr_debug("Detection failed at step %d\n", 7);
1912 goto release;
1913 }
1914
1915 /* Determine the chip type */
1916 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1917 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1918 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1919 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1920 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1921 if ((val & 0xfe) == 0x10 /* W83781D */
1922 || val == 0x30) /* W83782D */
1923 found = 1;
1924
1925 if (found)
1926 pr_info("Found a %s chip at %#x\n",
1927 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1928
1929 release:
1930 for (port--; port >= address; port--)
1931 release_region(port, 1);
1932 return found;
1933}
1934
1935static int __init
1936w83781d_isa_device_add(unsigned short address)
1937{
1938 struct resource res = {
1939 .start = address,
1940 .end = address + W83781D_EXTENT - 1,
1941 .name = "w83781d",
1942 .flags = IORESOURCE_IO,
1943 };
1944 int err;
1945
1946 pdev = platform_device_alloc("w83781d", address);
1947 if (!pdev) {
1948 err = -ENOMEM;
1949 pr_err("Device allocation failed\n");
1950 goto exit;
1951 }
1952
1953 err = platform_device_add_resources(pdev, &res, 1);
1954 if (err) {
1955 pr_err("Device resource addition failed (%d)\n", err);
1956 goto exit_device_put;
1957 }
1958
1959 err = platform_device_add(pdev);
1960 if (err) {
1961 pr_err("Device addition failed (%d)\n", err);
1962 goto exit_device_put;
1963 }
1964
1965 return 0;
1966
1967 exit_device_put:
1968 platform_device_put(pdev);
1969 exit:
1970 pdev = NULL;
1971 return err;
1972}
1973
1974static int __init
1975w83781d_isa_register(void)
1976{
1977 int res;
1978
1979 if (w83781d_isa_found(isa_address)) {
1980 res = platform_driver_register(&w83781d_isa_driver);
1981 if (res)
1982 goto exit;
1983
1984 /* Sets global pdev as a side effect */
1985 res = w83781d_isa_device_add(isa_address);
1986 if (res)
1987 goto exit_unreg_isa_driver;
1988 }
1989
1990 return 0;
1991
1992exit_unreg_isa_driver:
1993 platform_driver_unregister(&w83781d_isa_driver);
1994exit:
1995 return res;
1996}
1997
1998static void
1999w83781d_isa_unregister(void)
2000{
2001 if (pdev) {
2002 platform_device_unregister(pdev);
2003 platform_driver_unregister(&w83781d_isa_driver);
2004 }
2005}
2006#else /* !CONFIG_ISA */
2007
2008static struct w83781d_data *w83781d_data_if_isa(void)
2009{
2010 return NULL;
2011}
2012
2013static int
2014w83781d_alias_detect(struct i2c_client *client, u8 chipid)
2015{
2016 return 0;
2017}
2018
2019static int
2020w83781d_read_value(struct w83781d_data *data, u16 reg)
2021{
2022 int res;
2023
2024 mutex_lock(&data->lock);
2025 res = w83781d_read_value_i2c(data, reg);
2026 mutex_unlock(lock: &data->lock);
2027
2028 return res;
2029}
2030
2031static int
2032w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2033{
2034 mutex_lock(&data->lock);
2035 w83781d_write_value_i2c(data, reg, value);
2036 mutex_unlock(lock: &data->lock);
2037
2038 return 0;
2039}
2040
2041static int __init
2042w83781d_isa_register(void)
2043{
2044 return 0;
2045}
2046
2047static void
2048w83781d_isa_unregister(void)
2049{
2050}
2051#endif /* CONFIG_ISA */
2052
2053static int __init
2054sensors_w83781d_init(void)
2055{
2056 int res;
2057
2058 /*
2059 * We register the ISA device first, so that we can skip the
2060 * registration of an I2C interface to the same device.
2061 */
2062 res = w83781d_isa_register();
2063 if (res)
2064 goto exit;
2065
2066 res = i2c_add_driver(&w83781d_driver);
2067 if (res)
2068 goto exit_unreg_isa;
2069
2070 return 0;
2071
2072 exit_unreg_isa:
2073 w83781d_isa_unregister();
2074 exit:
2075 return res;
2076}
2077
2078static void __exit
2079sensors_w83781d_exit(void)
2080{
2081 w83781d_isa_unregister();
2082 i2c_del_driver(driver: &w83781d_driver);
2083}
2084
2085MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2086 "Philip Edelbrock <phil@netroedge.com>, "
2087 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2088MODULE_DESCRIPTION("W83781D driver");
2089MODULE_LICENSE("GPL");
2090
2091module_init(sensors_w83781d_init);
2092module_exit(sensors_w83781d_exit);
2093

source code of linux/drivers/hwmon/w83781d.c