1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Intel CHT Whiskey Cove PMIC I2C Master driver |
4 | * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com> |
5 | * |
6 | * Based on various non upstream patches to support the CHT Whiskey Cove PMIC: |
7 | * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved. |
8 | */ |
9 | |
10 | #include <linux/acpi.h> |
11 | #include <linux/completion.h> |
12 | #include <linux/delay.h> |
13 | #include <linux/i2c.h> |
14 | #include <linux/interrupt.h> |
15 | #include <linux/irq.h> |
16 | #include <linux/irqdomain.h> |
17 | #include <linux/mfd/intel_soc_pmic.h> |
18 | #include <linux/module.h> |
19 | #include <linux/platform_device.h> |
20 | #include <linux/power/bq24190_charger.h> |
21 | #include <linux/power/bq25890_charger.h> |
22 | #include <linux/slab.h> |
23 | |
24 | #define CHT_WC_I2C_CTRL 0x5e24 |
25 | #define CHT_WC_I2C_CTRL_WR BIT(0) |
26 | #define CHT_WC_I2C_CTRL_RD BIT(1) |
27 | #define CHT_WC_I2C_CLIENT_ADDR 0x5e25 |
28 | #define CHT_WC_I2C_REG_OFFSET 0x5e26 |
29 | #define CHT_WC_I2C_WRDATA 0x5e27 |
30 | #define CHT_WC_I2C_RDDATA 0x5e28 |
31 | |
32 | #define CHT_WC_EXTCHGRIRQ 0x6e0a |
33 | #define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ BIT(0) |
34 | #define CHT_WC_EXTCHGRIRQ_WRITE_IRQ BIT(1) |
35 | #define CHT_WC_EXTCHGRIRQ_READ_IRQ BIT(2) |
36 | #define CHT_WC_EXTCHGRIRQ_NACK_IRQ BIT(3) |
37 | #define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK ((u8)GENMASK(3, 1)) |
38 | #define CHT_WC_EXTCHGRIRQ_MSK 0x6e17 |
39 | |
40 | struct cht_wc_i2c_adap { |
41 | struct i2c_adapter adapter; |
42 | wait_queue_head_t wait; |
43 | struct irq_chip irqchip; |
44 | struct mutex adap_lock; |
45 | struct mutex irqchip_lock; |
46 | struct regmap *regmap; |
47 | struct irq_domain *irq_domain; |
48 | struct i2c_client *client; |
49 | int client_irq; |
50 | u8 irq_mask; |
51 | u8 old_irq_mask; |
52 | int read_data; |
53 | bool io_error; |
54 | bool done; |
55 | }; |
56 | |
57 | static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data) |
58 | { |
59 | struct cht_wc_i2c_adap *adap = data; |
60 | int ret, reg; |
61 | |
62 | mutex_lock(&adap->adap_lock); |
63 | |
64 | /* Read IRQs */ |
65 | ret = regmap_read(map: adap->regmap, CHT_WC_EXTCHGRIRQ, val: ®); |
66 | if (ret) { |
67 | dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n" ); |
68 | mutex_unlock(lock: &adap->adap_lock); |
69 | return IRQ_NONE; |
70 | } |
71 | |
72 | reg &= ~adap->irq_mask; |
73 | |
74 | /* Reads must be acked after reading the received data. */ |
75 | ret = regmap_read(map: adap->regmap, CHT_WC_I2C_RDDATA, val: &adap->read_data); |
76 | if (ret) |
77 | adap->io_error = true; |
78 | |
79 | /* |
80 | * Immediately ack IRQs, so that if new IRQs arrives while we're |
81 | * handling the previous ones our irq will re-trigger when we're done. |
82 | */ |
83 | ret = regmap_write(map: adap->regmap, CHT_WC_EXTCHGRIRQ, val: reg); |
84 | if (ret) |
85 | dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n" ); |
86 | |
87 | if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) { |
88 | adap->io_error |= !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ); |
89 | adap->done = true; |
90 | } |
91 | |
92 | mutex_unlock(lock: &adap->adap_lock); |
93 | |
94 | if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) |
95 | wake_up(&adap->wait); |
96 | |
97 | /* |
98 | * Do NOT use handle_nested_irq here, the client irq handler will |
99 | * likely want to do i2c transfers and the i2c controller uses this |
100 | * interrupt handler as well, so running the client irq handler from |
101 | * this thread will cause things to lock up. |
102 | */ |
103 | if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ) |
104 | generic_handle_irq_safe(irq: adap->client_irq); |
105 | |
106 | return IRQ_HANDLED; |
107 | } |
108 | |
109 | static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap) |
110 | { |
111 | /* This i2c adapter only supports SMBUS byte transfers */ |
112 | return I2C_FUNC_SMBUS_BYTE_DATA; |
113 | } |
114 | |
115 | static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr, |
116 | unsigned short flags, char read_write, |
117 | u8 command, int size, |
118 | union i2c_smbus_data *data) |
119 | { |
120 | struct cht_wc_i2c_adap *adap = i2c_get_adapdata(adap: _adap); |
121 | int ret; |
122 | |
123 | mutex_lock(&adap->adap_lock); |
124 | adap->io_error = false; |
125 | adap->done = false; |
126 | mutex_unlock(lock: &adap->adap_lock); |
127 | |
128 | ret = regmap_write(map: adap->regmap, CHT_WC_I2C_CLIENT_ADDR, val: addr); |
129 | if (ret) |
130 | return ret; |
131 | |
132 | if (read_write == I2C_SMBUS_WRITE) { |
133 | ret = regmap_write(map: adap->regmap, CHT_WC_I2C_WRDATA, val: data->byte); |
134 | if (ret) |
135 | return ret; |
136 | } |
137 | |
138 | ret = regmap_write(map: adap->regmap, CHT_WC_I2C_REG_OFFSET, val: command); |
139 | if (ret) |
140 | return ret; |
141 | |
142 | ret = regmap_write(map: adap->regmap, CHT_WC_I2C_CTRL, |
143 | val: (read_write == I2C_SMBUS_WRITE) ? |
144 | CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD); |
145 | if (ret) |
146 | return ret; |
147 | |
148 | ret = wait_event_timeout(adap->wait, adap->done, msecs_to_jiffies(30)); |
149 | if (ret == 0) { |
150 | /* |
151 | * The CHT GPIO controller serializes all IRQs, sometimes |
152 | * causing significant delays, check status manually. |
153 | */ |
154 | cht_wc_i2c_adap_thread_handler(id: 0, data: adap); |
155 | if (!adap->done) |
156 | return -ETIMEDOUT; |
157 | } |
158 | |
159 | ret = 0; |
160 | mutex_lock(&adap->adap_lock); |
161 | if (adap->io_error) |
162 | ret = -EIO; |
163 | else if (read_write == I2C_SMBUS_READ) |
164 | data->byte = adap->read_data; |
165 | mutex_unlock(lock: &adap->adap_lock); |
166 | |
167 | return ret; |
168 | } |
169 | |
170 | static const struct i2c_algorithm cht_wc_i2c_adap_algo = { |
171 | .functionality = cht_wc_i2c_adap_master_func, |
172 | .smbus_xfer = cht_wc_i2c_adap_smbus_xfer, |
173 | }; |
174 | |
175 | /* |
176 | * We are an i2c-adapter which itself is part of an i2c-client. This means that |
177 | * transfers done through us take adapter->bus_lock twice, once for our parent |
178 | * i2c-adapter and once to take our own bus_lock. Lockdep does not like this |
179 | * nested locking, to make lockdep happy in the case of busses with muxes, the |
180 | * i2c-core's i2c_adapter_lock_bus function calls: |
181 | * rt_mutex_lock_nested(&adapter->bus_lock, i2c_adapter_depth(adapter)); |
182 | * |
183 | * But i2c_adapter_depth only works when the direct parent of the adapter is |
184 | * another adapter, as it is only meant for muxes. In our case there is an |
185 | * i2c-client and MFD instantiated platform_device in the parent->child chain |
186 | * between the 2 devices. |
187 | * |
188 | * So we override the default i2c_lock_operations and pass a hardcoded |
189 | * depth of 1 to rt_mutex_lock_nested, to make lockdep happy. |
190 | * |
191 | * Note that if there were to be a mux attached to our adapter, this would |
192 | * break things again since the i2c-mux code expects the root-adapter to have |
193 | * a locking depth of 0. But we always have only 1 client directly attached |
194 | * in the form of the Charger IC paired with the CHT Whiskey Cove PMIC. |
195 | */ |
196 | static void cht_wc_i2c_adap_lock_bus(struct i2c_adapter *adapter, |
197 | unsigned int flags) |
198 | { |
199 | rt_mutex_lock_nested(lock: &adapter->bus_lock, subclass: 1); |
200 | } |
201 | |
202 | static int cht_wc_i2c_adap_trylock_bus(struct i2c_adapter *adapter, |
203 | unsigned int flags) |
204 | { |
205 | return rt_mutex_trylock(lock: &adapter->bus_lock); |
206 | } |
207 | |
208 | static void cht_wc_i2c_adap_unlock_bus(struct i2c_adapter *adapter, |
209 | unsigned int flags) |
210 | { |
211 | rt_mutex_unlock(lock: &adapter->bus_lock); |
212 | } |
213 | |
214 | static const struct i2c_lock_operations cht_wc_i2c_adap_lock_ops = { |
215 | .lock_bus = cht_wc_i2c_adap_lock_bus, |
216 | .trylock_bus = cht_wc_i2c_adap_trylock_bus, |
217 | .unlock_bus = cht_wc_i2c_adap_unlock_bus, |
218 | }; |
219 | |
220 | /**** irqchip for the client connected to the extchgr i2c adapter ****/ |
221 | static void cht_wc_i2c_irq_lock(struct irq_data *data) |
222 | { |
223 | struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(d: data); |
224 | |
225 | mutex_lock(&adap->irqchip_lock); |
226 | } |
227 | |
228 | static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data) |
229 | { |
230 | struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(d: data); |
231 | int ret; |
232 | |
233 | if (adap->irq_mask != adap->old_irq_mask) { |
234 | ret = regmap_write(map: adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, |
235 | val: adap->irq_mask); |
236 | if (ret == 0) |
237 | adap->old_irq_mask = adap->irq_mask; |
238 | else |
239 | dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n" ); |
240 | } |
241 | |
242 | mutex_unlock(lock: &adap->irqchip_lock); |
243 | } |
244 | |
245 | static void cht_wc_i2c_irq_enable(struct irq_data *data) |
246 | { |
247 | struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(d: data); |
248 | |
249 | adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; |
250 | } |
251 | |
252 | static void cht_wc_i2c_irq_disable(struct irq_data *data) |
253 | { |
254 | struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(d: data); |
255 | |
256 | adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; |
257 | } |
258 | |
259 | static const struct irq_chip cht_wc_i2c_irq_chip = { |
260 | .irq_bus_lock = cht_wc_i2c_irq_lock, |
261 | .irq_bus_sync_unlock = cht_wc_i2c_irq_sync_unlock, |
262 | .irq_disable = cht_wc_i2c_irq_disable, |
263 | .irq_enable = cht_wc_i2c_irq_enable, |
264 | .name = "cht_wc_ext_chrg_irq_chip" , |
265 | }; |
266 | |
267 | /********** GPD Win / Pocket charger IC settings **********/ |
268 | static const char * const bq24190_suppliers[] = { |
269 | "tcpm-source-psy-i2c-fusb302" }; |
270 | |
271 | static const struct property_entry bq24190_props[] = { |
272 | PROPERTY_ENTRY_STRING_ARRAY("supplied-from" , bq24190_suppliers), |
273 | PROPERTY_ENTRY_BOOL("omit-battery-class" ), |
274 | PROPERTY_ENTRY_BOOL("disable-reset" ), |
275 | { } |
276 | }; |
277 | |
278 | static const struct software_node bq24190_node = { |
279 | .properties = bq24190_props, |
280 | }; |
281 | |
282 | static struct regulator_consumer_supply fusb302_consumer = { |
283 | .supply = "vbus" , |
284 | /* Must match fusb302 dev_name in intel_cht_int33fe.c */ |
285 | .dev_name = "i2c-fusb302" , |
286 | }; |
287 | |
288 | static const struct regulator_init_data bq24190_vbus_init_data = { |
289 | .constraints = { |
290 | /* The name is used in intel_cht_int33fe.c do not change. */ |
291 | .name = "cht_wc_usb_typec_vbus" , |
292 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
293 | }, |
294 | .consumer_supplies = &fusb302_consumer, |
295 | .num_consumer_supplies = 1, |
296 | }; |
297 | |
298 | static struct bq24190_platform_data bq24190_pdata = { |
299 | .regulator_init_data = &bq24190_vbus_init_data, |
300 | }; |
301 | |
302 | static struct i2c_board_info gpd_win_board_info = { |
303 | .type = "bq24190" , |
304 | .addr = 0x6b, |
305 | .dev_name = "bq24190" , |
306 | .swnode = &bq24190_node, |
307 | .platform_data = &bq24190_pdata, |
308 | }; |
309 | |
310 | /********** Xiaomi Mi Pad 2 charger IC settings **********/ |
311 | static struct regulator_consumer_supply bq2589x_vbus_consumer = { |
312 | .supply = "vbus" , |
313 | .dev_name = "cht_wcove_pwrsrc" , |
314 | }; |
315 | |
316 | static const struct regulator_init_data bq2589x_vbus_init_data = { |
317 | .constraints = { |
318 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
319 | }, |
320 | .consumer_supplies = &bq2589x_vbus_consumer, |
321 | .num_consumer_supplies = 1, |
322 | }; |
323 | |
324 | static struct bq25890_platform_data bq2589x_pdata = { |
325 | .regulator_init_data = &bq2589x_vbus_init_data, |
326 | }; |
327 | |
328 | static const struct property_entry xiaomi_mipad2_props[] = { |
329 | PROPERTY_ENTRY_BOOL("linux,skip-reset" ), |
330 | PROPERTY_ENTRY_BOOL("linux,read-back-settings" ), |
331 | { } |
332 | }; |
333 | |
334 | static const struct software_node xiaomi_mipad2_node = { |
335 | .properties = xiaomi_mipad2_props, |
336 | }; |
337 | |
338 | static struct i2c_board_info xiaomi_mipad2_board_info = { |
339 | .type = "bq25890" , |
340 | .addr = 0x6a, |
341 | .dev_name = "bq25890" , |
342 | .swnode = &xiaomi_mipad2_node, |
343 | .platform_data = &bq2589x_pdata, |
344 | }; |
345 | |
346 | /********** Lenovo Yogabook YB1-X90F/-X91F/-X91L charger settings **********/ |
347 | static const char * const lenovo_yb1_bq25892_suppliers[] = { "cht_wcove_pwrsrc" }; |
348 | |
349 | static const struct property_entry lenovo_yb1_bq25892_props[] = { |
350 | PROPERTY_ENTRY_STRING_ARRAY("supplied-from" , |
351 | lenovo_yb1_bq25892_suppliers), |
352 | PROPERTY_ENTRY_U32("linux,pump-express-vbus-max" , 12000000), |
353 | PROPERTY_ENTRY_BOOL("linux,skip-reset" ), |
354 | /* |
355 | * The firmware sets everything to the defaults, which leads to a |
356 | * somewhat low charge-current of 2048mA and worse to a battery-voltage |
357 | * of 4.2V instead of 4.35V (when booted without a charger connected). |
358 | * Use our own values instead of "linux,read-back-settings" to fix this. |
359 | */ |
360 | PROPERTY_ENTRY_U32("ti,charge-current" , 4224000), |
361 | PROPERTY_ENTRY_U32("ti,battery-regulation-voltage" , 4352000), |
362 | PROPERTY_ENTRY_U32("ti,termination-current" , 256000), |
363 | PROPERTY_ENTRY_U32("ti,precharge-current" , 128000), |
364 | PROPERTY_ENTRY_U32("ti,minimum-sys-voltage" , 3500000), |
365 | PROPERTY_ENTRY_U32("ti,boost-voltage" , 4998000), |
366 | PROPERTY_ENTRY_U32("ti,boost-max-current" , 1400000), |
367 | PROPERTY_ENTRY_BOOL("ti,use-ilim-pin" ), |
368 | { } |
369 | }; |
370 | |
371 | static const struct software_node lenovo_yb1_bq25892_node = { |
372 | .properties = lenovo_yb1_bq25892_props, |
373 | }; |
374 | |
375 | static struct i2c_board_info lenovo_yogabook1_board_info = { |
376 | .type = "bq25892" , |
377 | .addr = 0x6b, |
378 | .dev_name = "bq25892" , |
379 | .swnode = &lenovo_yb1_bq25892_node, |
380 | .platform_data = &bq2589x_pdata, |
381 | }; |
382 | |
383 | /********** Lenovo Yogabook YT3-X90F charger settings **********/ |
384 | static const char * const lenovo_yt3_bq25892_1_suppliers[] = { "cht_wcove_pwrsrc" }; |
385 | |
386 | /* |
387 | * bq25892 charger settings for the round li-ion cells in the hinge, |
388 | * this is the main / biggest battery. |
389 | */ |
390 | static const struct property_entry lenovo_yt3_bq25892_1_props[] = { |
391 | PROPERTY_ENTRY_STRING_ARRAY("supplied-from" , lenovo_yt3_bq25892_1_suppliers), |
392 | PROPERTY_ENTRY_STRING("linux,secondary-charger-name" , "bq25890-charger-0" ), |
393 | PROPERTY_ENTRY_U32("linux,iinlim-percentage" , 60), |
394 | PROPERTY_ENTRY_U32("linux,pump-express-vbus-max" , 12000000), |
395 | PROPERTY_ENTRY_BOOL("linux,skip-reset" ), |
396 | /* |
397 | * The firmware sets everything to the defaults, leading to a low(ish) |
398 | * charge-current and battery-voltage of 2048mA resp 4.2V. Use the |
399 | * Android values instead of "linux,read-back-settings" to fix this. |
400 | */ |
401 | PROPERTY_ENTRY_U32("ti,charge-current" , 3072000), |
402 | PROPERTY_ENTRY_U32("ti,battery-regulation-voltage" , 4352000), |
403 | PROPERTY_ENTRY_U32("ti,termination-current" , 128000), |
404 | PROPERTY_ENTRY_U32("ti,precharge-current" , 128000), |
405 | PROPERTY_ENTRY_U32("ti,minimum-sys-voltage" , 3700000), |
406 | PROPERTY_ENTRY_BOOL("ti,use-ilim-pin" ), |
407 | /* Set 5V boost current-limit to 1.2A (MAX/POR values are 2.45A/1.4A) */ |
408 | PROPERTY_ENTRY_U32("ti,boost-voltage" , 4998000), |
409 | PROPERTY_ENTRY_U32("ti,boost-max-current" , 1200000), |
410 | { } |
411 | }; |
412 | |
413 | static const struct software_node lenovo_yt3_bq25892_1_node = { |
414 | .properties = lenovo_yt3_bq25892_1_props, |
415 | }; |
416 | |
417 | /* bq25892 charger for the round li-ion cells in the hinge */ |
418 | static struct i2c_board_info lenovo_yoga_tab3_board_info = { |
419 | .type = "bq25892" , |
420 | .addr = 0x6b, |
421 | .dev_name = "bq25892_1" , |
422 | .swnode = &lenovo_yt3_bq25892_1_node, |
423 | .platform_data = &bq2589x_pdata, |
424 | }; |
425 | |
426 | static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev) |
427 | { |
428 | struct intel_soc_pmic *pmic = dev_get_drvdata(dev: pdev->dev.parent); |
429 | struct i2c_board_info *board_info = NULL; |
430 | struct cht_wc_i2c_adap *adap; |
431 | int ret, reg, irq; |
432 | |
433 | irq = platform_get_irq(pdev, 0); |
434 | if (irq < 0) |
435 | return irq; |
436 | |
437 | adap = devm_kzalloc(dev: &pdev->dev, size: sizeof(*adap), GFP_KERNEL); |
438 | if (!adap) |
439 | return -ENOMEM; |
440 | |
441 | init_waitqueue_head(&adap->wait); |
442 | mutex_init(&adap->adap_lock); |
443 | mutex_init(&adap->irqchip_lock); |
444 | adap->irqchip = cht_wc_i2c_irq_chip; |
445 | adap->regmap = pmic->regmap; |
446 | adap->adapter.owner = THIS_MODULE; |
447 | adap->adapter.class = I2C_CLASS_HWMON; |
448 | adap->adapter.algo = &cht_wc_i2c_adap_algo; |
449 | adap->adapter.lock_ops = &cht_wc_i2c_adap_lock_ops; |
450 | strscpy(p: adap->adapter.name, q: "PMIC I2C Adapter" , |
451 | size: sizeof(adap->adapter.name)); |
452 | adap->adapter.dev.parent = &pdev->dev; |
453 | |
454 | /* Clear and activate i2c-adapter interrupts, disable client IRQ */ |
455 | adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK; |
456 | |
457 | ret = regmap_read(map: adap->regmap, CHT_WC_I2C_RDDATA, val: ®); |
458 | if (ret) |
459 | return ret; |
460 | |
461 | ret = regmap_write(map: adap->regmap, CHT_WC_EXTCHGRIRQ, val: ~adap->irq_mask); |
462 | if (ret) |
463 | return ret; |
464 | |
465 | ret = regmap_write(map: adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, val: adap->irq_mask); |
466 | if (ret) |
467 | return ret; |
468 | |
469 | /* Alloc and register client IRQ */ |
470 | adap->irq_domain = irq_domain_add_linear(NULL, size: 1, ops: &irq_domain_simple_ops, NULL); |
471 | if (!adap->irq_domain) |
472 | return -ENOMEM; |
473 | |
474 | adap->client_irq = irq_create_mapping(host: adap->irq_domain, hwirq: 0); |
475 | if (!adap->client_irq) { |
476 | ret = -ENOMEM; |
477 | goto remove_irq_domain; |
478 | } |
479 | |
480 | irq_set_chip_data(irq: adap->client_irq, data: adap); |
481 | irq_set_chip_and_handler(irq: adap->client_irq, chip: &adap->irqchip, |
482 | handle: handle_simple_irq); |
483 | |
484 | ret = devm_request_threaded_irq(dev: &pdev->dev, irq, NULL, |
485 | thread_fn: cht_wc_i2c_adap_thread_handler, |
486 | IRQF_ONESHOT, devname: "PMIC I2C Adapter" , dev_id: adap); |
487 | if (ret) |
488 | goto remove_irq_domain; |
489 | |
490 | i2c_set_adapdata(adap: &adap->adapter, data: adap); |
491 | ret = i2c_add_adapter(adap: &adap->adapter); |
492 | if (ret) |
493 | goto remove_irq_domain; |
494 | |
495 | switch (pmic->cht_wc_model) { |
496 | case INTEL_CHT_WC_GPD_WIN_POCKET: |
497 | board_info = &gpd_win_board_info; |
498 | break; |
499 | case INTEL_CHT_WC_XIAOMI_MIPAD2: |
500 | board_info = &xiaomi_mipad2_board_info; |
501 | break; |
502 | case INTEL_CHT_WC_LENOVO_YOGABOOK1: |
503 | board_info = &lenovo_yogabook1_board_info; |
504 | break; |
505 | case INTEL_CHT_WC_LENOVO_YT3_X90: |
506 | board_info = &lenovo_yoga_tab3_board_info; |
507 | break; |
508 | default: |
509 | dev_warn(&pdev->dev, "Unknown model, not instantiating charger device\n" ); |
510 | break; |
511 | } |
512 | |
513 | if (board_info) { |
514 | board_info->irq = adap->client_irq; |
515 | adap->client = i2c_new_client_device(adap: &adap->adapter, info: board_info); |
516 | if (IS_ERR(ptr: adap->client)) { |
517 | ret = PTR_ERR(ptr: adap->client); |
518 | goto del_adapter; |
519 | } |
520 | } |
521 | |
522 | platform_set_drvdata(pdev, data: adap); |
523 | return 0; |
524 | |
525 | del_adapter: |
526 | i2c_del_adapter(adap: &adap->adapter); |
527 | remove_irq_domain: |
528 | irq_domain_remove(host: adap->irq_domain); |
529 | return ret; |
530 | } |
531 | |
532 | static void cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev) |
533 | { |
534 | struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev); |
535 | |
536 | i2c_unregister_device(client: adap->client); |
537 | i2c_del_adapter(adap: &adap->adapter); |
538 | irq_domain_remove(host: adap->irq_domain); |
539 | } |
540 | |
541 | static const struct platform_device_id cht_wc_i2c_adap_id_table[] = { |
542 | { .name = "cht_wcove_ext_chgr" }, |
543 | {}, |
544 | }; |
545 | MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table); |
546 | |
547 | static struct platform_driver cht_wc_i2c_adap_driver = { |
548 | .probe = cht_wc_i2c_adap_i2c_probe, |
549 | .remove_new = cht_wc_i2c_adap_i2c_remove, |
550 | .driver = { |
551 | .name = "cht_wcove_ext_chgr" , |
552 | }, |
553 | .id_table = cht_wc_i2c_adap_id_table, |
554 | }; |
555 | module_platform_driver(cht_wc_i2c_adap_driver); |
556 | |
557 | MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver" ); |
558 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>" ); |
559 | MODULE_LICENSE("GPL" ); |
560 | |