1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Analog Devices AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver |
4 | * TI ADC081S/ADC101S/ADC121S 8/10/12-bit SPI ADC driver |
5 | * |
6 | * Copyright 2010 Analog Devices Inc. |
7 | */ |
8 | |
9 | #include <linux/device.h> |
10 | #include <linux/kernel.h> |
11 | #include <linux/slab.h> |
12 | #include <linux/sysfs.h> |
13 | #include <linux/spi/spi.h> |
14 | #include <linux/regulator/consumer.h> |
15 | #include <linux/gpio/consumer.h> |
16 | #include <linux/err.h> |
17 | #include <linux/module.h> |
18 | #include <linux/bitops.h> |
19 | #include <linux/delay.h> |
20 | |
21 | #include <linux/iio/iio.h> |
22 | #include <linux/iio/sysfs.h> |
23 | #include <linux/iio/buffer.h> |
24 | #include <linux/iio/trigger_consumer.h> |
25 | #include <linux/iio/triggered_buffer.h> |
26 | |
27 | struct ad7476_state; |
28 | |
29 | struct ad7476_chip_info { |
30 | unsigned int int_vref_uv; |
31 | struct iio_chan_spec channel[2]; |
32 | /* channels used when convst gpio is defined */ |
33 | struct iio_chan_spec convst_channel[2]; |
34 | void (*reset)(struct ad7476_state *); |
35 | bool has_vref; |
36 | bool has_vdrive; |
37 | }; |
38 | |
39 | struct ad7476_state { |
40 | struct spi_device *spi; |
41 | const struct ad7476_chip_info *chip_info; |
42 | struct regulator *ref_reg; |
43 | struct gpio_desc *convst_gpio; |
44 | struct spi_transfer xfer; |
45 | struct spi_message msg; |
46 | /* |
47 | * DMA (thus cache coherency maintenance) may require the |
48 | * transfer buffers to live in their own cache lines. |
49 | * Make the buffer large enough for one 16 bit sample and one 64 bit |
50 | * aligned 64 bit timestamp. |
51 | */ |
52 | unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN); |
53 | }; |
54 | |
55 | enum ad7476_supported_device_ids { |
56 | ID_AD7091, |
57 | ID_AD7091R, |
58 | ID_AD7273, |
59 | ID_AD7274, |
60 | ID_AD7276, |
61 | ID_AD7277, |
62 | ID_AD7278, |
63 | ID_AD7466, |
64 | ID_AD7467, |
65 | ID_AD7468, |
66 | ID_AD7475, |
67 | ID_AD7495, |
68 | ID_AD7940, |
69 | ID_ADC081S, |
70 | ID_ADC101S, |
71 | ID_ADC121S, |
72 | ID_ADS7866, |
73 | ID_ADS7867, |
74 | ID_ADS7868, |
75 | ID_LTC2314_14, |
76 | }; |
77 | |
78 | static void ad7091_convst(struct ad7476_state *st) |
79 | { |
80 | if (!st->convst_gpio) |
81 | return; |
82 | |
83 | gpiod_set_value(desc: st->convst_gpio, value: 0); |
84 | udelay(1); /* CONVST pulse width: 10 ns min */ |
85 | gpiod_set_value(desc: st->convst_gpio, value: 1); |
86 | udelay(1); /* Conversion time: 650 ns max */ |
87 | } |
88 | |
89 | static irqreturn_t ad7476_trigger_handler(int irq, void *p) |
90 | { |
91 | struct iio_poll_func *pf = p; |
92 | struct iio_dev *indio_dev = pf->indio_dev; |
93 | struct ad7476_state *st = iio_priv(indio_dev); |
94 | int b_sent; |
95 | |
96 | ad7091_convst(st); |
97 | |
98 | b_sent = spi_sync(spi: st->spi, message: &st->msg); |
99 | if (b_sent < 0) |
100 | goto done; |
101 | |
102 | iio_push_to_buffers_with_timestamp(indio_dev, data: st->data, |
103 | timestamp: iio_get_time_ns(indio_dev)); |
104 | done: |
105 | iio_trigger_notify_done(trig: indio_dev->trig); |
106 | |
107 | return IRQ_HANDLED; |
108 | } |
109 | |
110 | static void ad7091_reset(struct ad7476_state *st) |
111 | { |
112 | /* Any transfers with 8 scl cycles will reset the device */ |
113 | spi_read(spi: st->spi, buf: st->data, len: 1); |
114 | } |
115 | |
116 | static int ad7476_scan_direct(struct ad7476_state *st) |
117 | { |
118 | int ret; |
119 | |
120 | ad7091_convst(st); |
121 | |
122 | ret = spi_sync(spi: st->spi, message: &st->msg); |
123 | if (ret) |
124 | return ret; |
125 | |
126 | return be16_to_cpup(p: (__be16 *)st->data); |
127 | } |
128 | |
129 | static int ad7476_read_raw(struct iio_dev *indio_dev, |
130 | struct iio_chan_spec const *chan, |
131 | int *val, |
132 | int *val2, |
133 | long m) |
134 | { |
135 | int ret; |
136 | struct ad7476_state *st = iio_priv(indio_dev); |
137 | int scale_uv; |
138 | |
139 | switch (m) { |
140 | case IIO_CHAN_INFO_RAW: |
141 | ret = iio_device_claim_direct_mode(indio_dev); |
142 | if (ret) |
143 | return ret; |
144 | ret = ad7476_scan_direct(st); |
145 | iio_device_release_direct_mode(indio_dev); |
146 | |
147 | if (ret < 0) |
148 | return ret; |
149 | *val = (ret >> st->chip_info->channel[0].scan_type.shift) & |
150 | GENMASK(st->chip_info->channel[0].scan_type.realbits - 1, 0); |
151 | return IIO_VAL_INT; |
152 | case IIO_CHAN_INFO_SCALE: |
153 | if (st->ref_reg) { |
154 | scale_uv = regulator_get_voltage(regulator: st->ref_reg); |
155 | if (scale_uv < 0) |
156 | return scale_uv; |
157 | } else { |
158 | scale_uv = st->chip_info->int_vref_uv; |
159 | } |
160 | *val = scale_uv / 1000; |
161 | *val2 = chan->scan_type.realbits; |
162 | return IIO_VAL_FRACTIONAL_LOG2; |
163 | } |
164 | return -EINVAL; |
165 | } |
166 | |
167 | #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \ |
168 | { \ |
169 | .type = IIO_VOLTAGE, \ |
170 | .indexed = 1, \ |
171 | .info_mask_separate = _info_mask_sep, \ |
172 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ |
173 | .scan_type = { \ |
174 | .sign = 'u', \ |
175 | .realbits = (bits), \ |
176 | .storagebits = 16, \ |
177 | .shift = (_shift), \ |
178 | .endianness = IIO_BE, \ |
179 | }, \ |
180 | } |
181 | |
182 | #define ADC081S_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \ |
183 | BIT(IIO_CHAN_INFO_RAW)) |
184 | #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \ |
185 | BIT(IIO_CHAN_INFO_RAW)) |
186 | #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \ |
187 | BIT(IIO_CHAN_INFO_RAW)) |
188 | #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0) |
189 | #define AD7091R_CONVST_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), \ |
190 | BIT(IIO_CHAN_INFO_RAW)) |
191 | #define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \ |
192 | BIT(IIO_CHAN_INFO_RAW)) |
193 | |
194 | static const struct ad7476_chip_info ad7476_chip_info_tbl[] = { |
195 | [ID_AD7091] = { |
196 | .channel[0] = AD7091R_CHAN(12), |
197 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
198 | .convst_channel[0] = AD7091R_CONVST_CHAN(12), |
199 | .convst_channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
200 | .reset = ad7091_reset, |
201 | }, |
202 | [ID_AD7091R] = { |
203 | .channel[0] = AD7091R_CHAN(12), |
204 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
205 | .convst_channel[0] = AD7091R_CONVST_CHAN(12), |
206 | .convst_channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
207 | .int_vref_uv = 2500000, |
208 | .has_vref = true, |
209 | .reset = ad7091_reset, |
210 | }, |
211 | [ID_AD7273] = { |
212 | .channel[0] = AD7940_CHAN(10), |
213 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
214 | .has_vref = true, |
215 | }, |
216 | [ID_AD7274] = { |
217 | .channel[0] = AD7940_CHAN(12), |
218 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
219 | .has_vref = true, |
220 | }, |
221 | [ID_AD7276] = { |
222 | .channel[0] = AD7940_CHAN(12), |
223 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
224 | }, |
225 | [ID_AD7277] = { |
226 | .channel[0] = AD7940_CHAN(10), |
227 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
228 | }, |
229 | [ID_AD7278] = { |
230 | .channel[0] = AD7940_CHAN(8), |
231 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
232 | }, |
233 | [ID_AD7466] = { |
234 | .channel[0] = AD7476_CHAN(12), |
235 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
236 | }, |
237 | [ID_AD7467] = { |
238 | .channel[0] = AD7476_CHAN(10), |
239 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
240 | }, |
241 | [ID_AD7468] = { |
242 | .channel[0] = AD7476_CHAN(8), |
243 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
244 | }, |
245 | [ID_AD7475] = { |
246 | .channel[0] = AD7476_CHAN(12), |
247 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
248 | .has_vref = true, |
249 | .has_vdrive = true, |
250 | }, |
251 | [ID_AD7495] = { |
252 | .channel[0] = AD7476_CHAN(12), |
253 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
254 | .int_vref_uv = 2500000, |
255 | .has_vdrive = true, |
256 | }, |
257 | [ID_AD7940] = { |
258 | .channel[0] = AD7940_CHAN(14), |
259 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
260 | }, |
261 | [ID_ADC081S] = { |
262 | .channel[0] = ADC081S_CHAN(8), |
263 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
264 | }, |
265 | [ID_ADC101S] = { |
266 | .channel[0] = ADC081S_CHAN(10), |
267 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
268 | }, |
269 | [ID_ADC121S] = { |
270 | .channel[0] = ADC081S_CHAN(12), |
271 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
272 | }, |
273 | [ID_ADS7866] = { |
274 | .channel[0] = ADS786X_CHAN(12), |
275 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
276 | }, |
277 | [ID_ADS7867] = { |
278 | .channel[0] = ADS786X_CHAN(10), |
279 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
280 | }, |
281 | [ID_ADS7868] = { |
282 | .channel[0] = ADS786X_CHAN(8), |
283 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
284 | }, |
285 | [ID_LTC2314_14] = { |
286 | .channel[0] = AD7940_CHAN(14), |
287 | .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), |
288 | .has_vref = true, |
289 | }, |
290 | }; |
291 | |
292 | static const struct iio_info ad7476_info = { |
293 | .read_raw = &ad7476_read_raw, |
294 | }; |
295 | |
296 | static void ad7476_reg_disable(void *data) |
297 | { |
298 | struct regulator *reg = data; |
299 | |
300 | regulator_disable(regulator: reg); |
301 | } |
302 | |
303 | static int ad7476_probe(struct spi_device *spi) |
304 | { |
305 | struct ad7476_state *st; |
306 | struct iio_dev *indio_dev; |
307 | struct regulator *reg; |
308 | int ret; |
309 | |
310 | indio_dev = devm_iio_device_alloc(parent: &spi->dev, sizeof_priv: sizeof(*st)); |
311 | if (!indio_dev) |
312 | return -ENOMEM; |
313 | |
314 | st = iio_priv(indio_dev); |
315 | st->chip_info = |
316 | &ad7476_chip_info_tbl[spi_get_device_id(sdev: spi)->driver_data]; |
317 | |
318 | reg = devm_regulator_get(dev: &spi->dev, id: "vcc" ); |
319 | if (IS_ERR(ptr: reg)) |
320 | return PTR_ERR(ptr: reg); |
321 | |
322 | ret = regulator_enable(regulator: reg); |
323 | if (ret) |
324 | return ret; |
325 | |
326 | ret = devm_add_action_or_reset(&spi->dev, ad7476_reg_disable, reg); |
327 | if (ret) |
328 | return ret; |
329 | |
330 | /* Either vcc or vref (below) as appropriate */ |
331 | if (!st->chip_info->int_vref_uv) |
332 | st->ref_reg = reg; |
333 | |
334 | if (st->chip_info->has_vref) { |
335 | |
336 | /* If a device has an internal reference vref is optional */ |
337 | if (st->chip_info->int_vref_uv) { |
338 | reg = devm_regulator_get_optional(dev: &spi->dev, id: "vref" ); |
339 | if (IS_ERR(ptr: reg) && (PTR_ERR(ptr: reg) != -ENODEV)) |
340 | return PTR_ERR(ptr: reg); |
341 | } else { |
342 | reg = devm_regulator_get(dev: &spi->dev, id: "vref" ); |
343 | if (IS_ERR(ptr: reg)) |
344 | return PTR_ERR(ptr: reg); |
345 | } |
346 | |
347 | if (!IS_ERR(ptr: reg)) { |
348 | ret = regulator_enable(regulator: reg); |
349 | if (ret) |
350 | return ret; |
351 | |
352 | ret = devm_add_action_or_reset(&spi->dev, |
353 | ad7476_reg_disable, |
354 | reg); |
355 | if (ret) |
356 | return ret; |
357 | st->ref_reg = reg; |
358 | } else { |
359 | /* |
360 | * Can only get here if device supports both internal |
361 | * and external reference, but the regulator connected |
362 | * to the external reference is not connected. |
363 | * Set the reference regulator pointer to NULL to |
364 | * indicate this. |
365 | */ |
366 | st->ref_reg = NULL; |
367 | } |
368 | } |
369 | |
370 | if (st->chip_info->has_vdrive) { |
371 | ret = devm_regulator_get_enable(dev: &spi->dev, id: "vdrive" ); |
372 | if (ret) |
373 | return ret; |
374 | } |
375 | |
376 | st->convst_gpio = devm_gpiod_get_optional(dev: &spi->dev, |
377 | con_id: "adi,conversion-start" , |
378 | flags: GPIOD_OUT_LOW); |
379 | if (IS_ERR(ptr: st->convst_gpio)) |
380 | return PTR_ERR(ptr: st->convst_gpio); |
381 | |
382 | st->spi = spi; |
383 | |
384 | indio_dev->name = spi_get_device_id(sdev: spi)->name; |
385 | indio_dev->modes = INDIO_DIRECT_MODE; |
386 | indio_dev->channels = st->chip_info->channel; |
387 | indio_dev->num_channels = 2; |
388 | indio_dev->info = &ad7476_info; |
389 | |
390 | if (st->convst_gpio) |
391 | indio_dev->channels = st->chip_info->convst_channel; |
392 | /* Setup default message */ |
393 | |
394 | st->xfer.rx_buf = &st->data; |
395 | st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8; |
396 | |
397 | spi_message_init(m: &st->msg); |
398 | spi_message_add_tail(t: &st->xfer, m: &st->msg); |
399 | |
400 | ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL, |
401 | &ad7476_trigger_handler, NULL); |
402 | if (ret) |
403 | return ret; |
404 | |
405 | if (st->chip_info->reset) |
406 | st->chip_info->reset(st); |
407 | |
408 | return devm_iio_device_register(&spi->dev, indio_dev); |
409 | } |
410 | |
411 | static const struct spi_device_id ad7476_id[] = { |
412 | {"ad7091" , ID_AD7091}, |
413 | {"ad7091r" , ID_AD7091R}, |
414 | {"ad7273" , ID_AD7273}, |
415 | {"ad7274" , ID_AD7274}, |
416 | {"ad7276" , ID_AD7276}, |
417 | {"ad7277" , ID_AD7277}, |
418 | {"ad7278" , ID_AD7278}, |
419 | {"ad7466" , ID_AD7466}, |
420 | {"ad7467" , ID_AD7467}, |
421 | {"ad7468" , ID_AD7468}, |
422 | {"ad7475" , ID_AD7475}, |
423 | {"ad7476" , ID_AD7466}, |
424 | {"ad7476a" , ID_AD7466}, |
425 | {"ad7477" , ID_AD7467}, |
426 | {"ad7477a" , ID_AD7467}, |
427 | {"ad7478" , ID_AD7468}, |
428 | {"ad7478a" , ID_AD7468}, |
429 | {"ad7495" , ID_AD7495}, |
430 | {"ad7910" , ID_AD7467}, |
431 | {"ad7920" , ID_AD7466}, |
432 | {"ad7940" , ID_AD7940}, |
433 | {"adc081s" , ID_ADC081S}, |
434 | {"adc101s" , ID_ADC101S}, |
435 | {"adc121s" , ID_ADC121S}, |
436 | {"ads7866" , ID_ADS7866}, |
437 | {"ads7867" , ID_ADS7867}, |
438 | {"ads7868" , ID_ADS7868}, |
439 | {"ltc2314-14" , ID_LTC2314_14}, |
440 | {} |
441 | }; |
442 | MODULE_DEVICE_TABLE(spi, ad7476_id); |
443 | |
444 | static struct spi_driver ad7476_driver = { |
445 | .driver = { |
446 | .name = "ad7476" , |
447 | }, |
448 | .probe = ad7476_probe, |
449 | .id_table = ad7476_id, |
450 | }; |
451 | module_spi_driver(ad7476_driver); |
452 | |
453 | MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>" ); |
454 | MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs" ); |
455 | MODULE_LICENSE("GPL v2" ); |
456 | |