1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * AD5686R, AD5685R, AD5684R Digital to analog converters driver |
4 | * |
5 | * Copyright 2011 Analog Devices Inc. |
6 | */ |
7 | |
8 | #include <linux/interrupt.h> |
9 | #include <linux/fs.h> |
10 | #include <linux/device.h> |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> |
13 | #include <linux/slab.h> |
14 | #include <linux/sysfs.h> |
15 | #include <linux/regulator/consumer.h> |
16 | |
17 | #include <linux/iio/iio.h> |
18 | #include <linux/iio/sysfs.h> |
19 | |
20 | #include "ad5686.h" |
21 | |
22 | static const char * const ad5686_powerdown_modes[] = { |
23 | "1kohm_to_gnd" , |
24 | "100kohm_to_gnd" , |
25 | "three_state" |
26 | }; |
27 | |
28 | static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev, |
29 | const struct iio_chan_spec *chan) |
30 | { |
31 | struct ad5686_state *st = iio_priv(indio_dev); |
32 | |
33 | return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1; |
34 | } |
35 | |
36 | static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev, |
37 | const struct iio_chan_spec *chan, |
38 | unsigned int mode) |
39 | { |
40 | struct ad5686_state *st = iio_priv(indio_dev); |
41 | |
42 | st->pwr_down_mode &= ~(0x3 << (chan->channel * 2)); |
43 | st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2)); |
44 | |
45 | return 0; |
46 | } |
47 | |
48 | static const struct iio_enum ad5686_powerdown_mode_enum = { |
49 | .items = ad5686_powerdown_modes, |
50 | .num_items = ARRAY_SIZE(ad5686_powerdown_modes), |
51 | .get = ad5686_get_powerdown_mode, |
52 | .set = ad5686_set_powerdown_mode, |
53 | }; |
54 | |
55 | static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev, |
56 | uintptr_t private, const struct iio_chan_spec *chan, char *buf) |
57 | { |
58 | struct ad5686_state *st = iio_priv(indio_dev); |
59 | |
60 | return sysfs_emit(buf, fmt: "%d\n" , !!(st->pwr_down_mask & |
61 | (0x3 << (chan->channel * 2)))); |
62 | } |
63 | |
64 | static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev, |
65 | uintptr_t private, |
66 | const struct iio_chan_spec *chan, |
67 | const char *buf, |
68 | size_t len) |
69 | { |
70 | bool readin; |
71 | int ret; |
72 | struct ad5686_state *st = iio_priv(indio_dev); |
73 | unsigned int val, ref_bit_msk; |
74 | u8 shift, address = 0; |
75 | |
76 | ret = kstrtobool(s: buf, res: &readin); |
77 | if (ret) |
78 | return ret; |
79 | |
80 | if (readin) |
81 | st->pwr_down_mask |= (0x3 << (chan->channel * 2)); |
82 | else |
83 | st->pwr_down_mask &= ~(0x3 << (chan->channel * 2)); |
84 | |
85 | switch (st->chip_info->regmap_type) { |
86 | case AD5310_REGMAP: |
87 | shift = 9; |
88 | ref_bit_msk = AD5310_REF_BIT_MSK; |
89 | break; |
90 | case AD5683_REGMAP: |
91 | shift = 13; |
92 | ref_bit_msk = AD5683_REF_BIT_MSK; |
93 | break; |
94 | case AD5686_REGMAP: |
95 | shift = 0; |
96 | ref_bit_msk = 0; |
97 | /* AD5674R/AD5679R have 16 channels and 2 powerdown registers */ |
98 | if (chan->channel > 0x7) |
99 | address = 0x8; |
100 | break; |
101 | case AD5693_REGMAP: |
102 | shift = 13; |
103 | ref_bit_msk = AD5693_REF_BIT_MSK; |
104 | break; |
105 | default: |
106 | return -EINVAL; |
107 | } |
108 | |
109 | val = ((st->pwr_down_mask & st->pwr_down_mode) << shift); |
110 | if (!st->use_internal_vref) |
111 | val |= ref_bit_msk; |
112 | |
113 | ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, |
114 | address, val >> (address * 2)); |
115 | |
116 | return ret ? ret : len; |
117 | } |
118 | |
119 | static int ad5686_read_raw(struct iio_dev *indio_dev, |
120 | struct iio_chan_spec const *chan, |
121 | int *val, |
122 | int *val2, |
123 | long m) |
124 | { |
125 | struct ad5686_state *st = iio_priv(indio_dev); |
126 | int ret; |
127 | |
128 | switch (m) { |
129 | case IIO_CHAN_INFO_RAW: |
130 | mutex_lock(&st->lock); |
131 | ret = st->read(st, chan->address); |
132 | mutex_unlock(lock: &st->lock); |
133 | if (ret < 0) |
134 | return ret; |
135 | *val = (ret >> chan->scan_type.shift) & |
136 | GENMASK(chan->scan_type.realbits - 1, 0); |
137 | return IIO_VAL_INT; |
138 | case IIO_CHAN_INFO_SCALE: |
139 | *val = st->vref_mv; |
140 | *val2 = chan->scan_type.realbits; |
141 | return IIO_VAL_FRACTIONAL_LOG2; |
142 | } |
143 | return -EINVAL; |
144 | } |
145 | |
146 | static int ad5686_write_raw(struct iio_dev *indio_dev, |
147 | struct iio_chan_spec const *chan, |
148 | int val, |
149 | int val2, |
150 | long mask) |
151 | { |
152 | struct ad5686_state *st = iio_priv(indio_dev); |
153 | int ret; |
154 | |
155 | switch (mask) { |
156 | case IIO_CHAN_INFO_RAW: |
157 | if (val > (1 << chan->scan_type.realbits) || val < 0) |
158 | return -EINVAL; |
159 | |
160 | mutex_lock(&st->lock); |
161 | ret = st->write(st, |
162 | AD5686_CMD_WRITE_INPUT_N_UPDATE_N, |
163 | chan->address, |
164 | val << chan->scan_type.shift); |
165 | mutex_unlock(lock: &st->lock); |
166 | break; |
167 | default: |
168 | ret = -EINVAL; |
169 | } |
170 | |
171 | return ret; |
172 | } |
173 | |
174 | static const struct iio_info ad5686_info = { |
175 | .read_raw = ad5686_read_raw, |
176 | .write_raw = ad5686_write_raw, |
177 | }; |
178 | |
179 | static const struct iio_chan_spec_ext_info ad5686_ext_info[] = { |
180 | { |
181 | .name = "powerdown" , |
182 | .read = ad5686_read_dac_powerdown, |
183 | .write = ad5686_write_dac_powerdown, |
184 | .shared = IIO_SEPARATE, |
185 | }, |
186 | IIO_ENUM("powerdown_mode" , IIO_SEPARATE, &ad5686_powerdown_mode_enum), |
187 | IIO_ENUM_AVAILABLE("powerdown_mode" , IIO_SHARED_BY_TYPE, &ad5686_powerdown_mode_enum), |
188 | { }, |
189 | }; |
190 | |
191 | #define AD5868_CHANNEL(chan, addr, bits, _shift) { \ |
192 | .type = IIO_VOLTAGE, \ |
193 | .indexed = 1, \ |
194 | .output = 1, \ |
195 | .channel = chan, \ |
196 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
197 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ |
198 | .address = addr, \ |
199 | .scan_type = { \ |
200 | .sign = 'u', \ |
201 | .realbits = (bits), \ |
202 | .storagebits = 16, \ |
203 | .shift = (_shift), \ |
204 | }, \ |
205 | .ext_info = ad5686_ext_info, \ |
206 | } |
207 | |
208 | #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \ |
209 | static const struct iio_chan_spec name[] = { \ |
210 | AD5868_CHANNEL(0, 0, bits, _shift), \ |
211 | } |
212 | |
213 | #define DECLARE_AD5338_CHANNELS(name, bits, _shift) \ |
214 | static const struct iio_chan_spec name[] = { \ |
215 | AD5868_CHANNEL(0, 1, bits, _shift), \ |
216 | AD5868_CHANNEL(1, 8, bits, _shift), \ |
217 | } |
218 | |
219 | #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \ |
220 | static const struct iio_chan_spec name[] = { \ |
221 | AD5868_CHANNEL(0, 1, bits, _shift), \ |
222 | AD5868_CHANNEL(1, 2, bits, _shift), \ |
223 | AD5868_CHANNEL(2, 4, bits, _shift), \ |
224 | AD5868_CHANNEL(3, 8, bits, _shift), \ |
225 | } |
226 | |
227 | #define DECLARE_AD5676_CHANNELS(name, bits, _shift) \ |
228 | static const struct iio_chan_spec name[] = { \ |
229 | AD5868_CHANNEL(0, 0, bits, _shift), \ |
230 | AD5868_CHANNEL(1, 1, bits, _shift), \ |
231 | AD5868_CHANNEL(2, 2, bits, _shift), \ |
232 | AD5868_CHANNEL(3, 3, bits, _shift), \ |
233 | AD5868_CHANNEL(4, 4, bits, _shift), \ |
234 | AD5868_CHANNEL(5, 5, bits, _shift), \ |
235 | AD5868_CHANNEL(6, 6, bits, _shift), \ |
236 | AD5868_CHANNEL(7, 7, bits, _shift), \ |
237 | } |
238 | |
239 | #define DECLARE_AD5679_CHANNELS(name, bits, _shift) \ |
240 | static const struct iio_chan_spec name[] = { \ |
241 | AD5868_CHANNEL(0, 0, bits, _shift), \ |
242 | AD5868_CHANNEL(1, 1, bits, _shift), \ |
243 | AD5868_CHANNEL(2, 2, bits, _shift), \ |
244 | AD5868_CHANNEL(3, 3, bits, _shift), \ |
245 | AD5868_CHANNEL(4, 4, bits, _shift), \ |
246 | AD5868_CHANNEL(5, 5, bits, _shift), \ |
247 | AD5868_CHANNEL(6, 6, bits, _shift), \ |
248 | AD5868_CHANNEL(7, 7, bits, _shift), \ |
249 | AD5868_CHANNEL(8, 8, bits, _shift), \ |
250 | AD5868_CHANNEL(9, 9, bits, _shift), \ |
251 | AD5868_CHANNEL(10, 10, bits, _shift), \ |
252 | AD5868_CHANNEL(11, 11, bits, _shift), \ |
253 | AD5868_CHANNEL(12, 12, bits, _shift), \ |
254 | AD5868_CHANNEL(13, 13, bits, _shift), \ |
255 | AD5868_CHANNEL(14, 14, bits, _shift), \ |
256 | AD5868_CHANNEL(15, 15, bits, _shift), \ |
257 | } |
258 | |
259 | DECLARE_AD5693_CHANNELS(ad5310r_channels, 10, 2); |
260 | DECLARE_AD5693_CHANNELS(ad5311r_channels, 10, 6); |
261 | DECLARE_AD5338_CHANNELS(ad5337r_channels, 8, 8); |
262 | DECLARE_AD5338_CHANNELS(ad5338r_channels, 10, 6); |
263 | DECLARE_AD5676_CHANNELS(ad5672_channels, 12, 4); |
264 | DECLARE_AD5679_CHANNELS(ad5674r_channels, 12, 4); |
265 | DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0); |
266 | DECLARE_AD5679_CHANNELS(ad5679r_channels, 16, 0); |
267 | DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4); |
268 | DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2); |
269 | DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0); |
270 | DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0); |
271 | DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2); |
272 | DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4); |
273 | |
274 | static const struct ad5686_chip_info ad5686_chip_info_tbl[] = { |
275 | [ID_AD5310R] = { |
276 | .channels = ad5310r_channels, |
277 | .int_vref_mv = 2500, |
278 | .num_channels = 1, |
279 | .regmap_type = AD5310_REGMAP, |
280 | }, |
281 | [ID_AD5311R] = { |
282 | .channels = ad5311r_channels, |
283 | .int_vref_mv = 2500, |
284 | .num_channels = 1, |
285 | .regmap_type = AD5693_REGMAP, |
286 | }, |
287 | [ID_AD5337R] = { |
288 | .channels = ad5337r_channels, |
289 | .int_vref_mv = 2500, |
290 | .num_channels = 2, |
291 | .regmap_type = AD5686_REGMAP, |
292 | }, |
293 | [ID_AD5338R] = { |
294 | .channels = ad5338r_channels, |
295 | .int_vref_mv = 2500, |
296 | .num_channels = 2, |
297 | .regmap_type = AD5686_REGMAP, |
298 | }, |
299 | [ID_AD5671R] = { |
300 | .channels = ad5672_channels, |
301 | .int_vref_mv = 2500, |
302 | .num_channels = 8, |
303 | .regmap_type = AD5686_REGMAP, |
304 | }, |
305 | [ID_AD5672R] = { |
306 | .channels = ad5672_channels, |
307 | .int_vref_mv = 2500, |
308 | .num_channels = 8, |
309 | .regmap_type = AD5686_REGMAP, |
310 | }, |
311 | [ID_AD5673R] = { |
312 | .channels = ad5674r_channels, |
313 | .int_vref_mv = 2500, |
314 | .num_channels = 16, |
315 | .regmap_type = AD5686_REGMAP, |
316 | }, |
317 | [ID_AD5674R] = { |
318 | .channels = ad5674r_channels, |
319 | .int_vref_mv = 2500, |
320 | .num_channels = 16, |
321 | .regmap_type = AD5686_REGMAP, |
322 | }, |
323 | [ID_AD5675R] = { |
324 | .channels = ad5676_channels, |
325 | .int_vref_mv = 2500, |
326 | .num_channels = 8, |
327 | .regmap_type = AD5686_REGMAP, |
328 | }, |
329 | [ID_AD5676] = { |
330 | .channels = ad5676_channels, |
331 | .num_channels = 8, |
332 | .regmap_type = AD5686_REGMAP, |
333 | }, |
334 | [ID_AD5676R] = { |
335 | .channels = ad5676_channels, |
336 | .int_vref_mv = 2500, |
337 | .num_channels = 8, |
338 | .regmap_type = AD5686_REGMAP, |
339 | }, |
340 | [ID_AD5677R] = { |
341 | .channels = ad5679r_channels, |
342 | .int_vref_mv = 2500, |
343 | .num_channels = 16, |
344 | .regmap_type = AD5686_REGMAP, |
345 | }, |
346 | [ID_AD5679R] = { |
347 | .channels = ad5679r_channels, |
348 | .int_vref_mv = 2500, |
349 | .num_channels = 16, |
350 | .regmap_type = AD5686_REGMAP, |
351 | }, |
352 | [ID_AD5681R] = { |
353 | .channels = ad5691r_channels, |
354 | .int_vref_mv = 2500, |
355 | .num_channels = 1, |
356 | .regmap_type = AD5683_REGMAP, |
357 | }, |
358 | [ID_AD5682R] = { |
359 | .channels = ad5692r_channels, |
360 | .int_vref_mv = 2500, |
361 | .num_channels = 1, |
362 | .regmap_type = AD5683_REGMAP, |
363 | }, |
364 | [ID_AD5683] = { |
365 | .channels = ad5693_channels, |
366 | .num_channels = 1, |
367 | .regmap_type = AD5683_REGMAP, |
368 | }, |
369 | [ID_AD5683R] = { |
370 | .channels = ad5693_channels, |
371 | .int_vref_mv = 2500, |
372 | .num_channels = 1, |
373 | .regmap_type = AD5683_REGMAP, |
374 | }, |
375 | [ID_AD5684] = { |
376 | .channels = ad5684_channels, |
377 | .num_channels = 4, |
378 | .regmap_type = AD5686_REGMAP, |
379 | }, |
380 | [ID_AD5684R] = { |
381 | .channels = ad5684_channels, |
382 | .int_vref_mv = 2500, |
383 | .num_channels = 4, |
384 | .regmap_type = AD5686_REGMAP, |
385 | }, |
386 | [ID_AD5685R] = { |
387 | .channels = ad5685r_channels, |
388 | .int_vref_mv = 2500, |
389 | .num_channels = 4, |
390 | .regmap_type = AD5686_REGMAP, |
391 | }, |
392 | [ID_AD5686] = { |
393 | .channels = ad5686_channels, |
394 | .num_channels = 4, |
395 | .regmap_type = AD5686_REGMAP, |
396 | }, |
397 | [ID_AD5686R] = { |
398 | .channels = ad5686_channels, |
399 | .int_vref_mv = 2500, |
400 | .num_channels = 4, |
401 | .regmap_type = AD5686_REGMAP, |
402 | }, |
403 | [ID_AD5691R] = { |
404 | .channels = ad5691r_channels, |
405 | .int_vref_mv = 2500, |
406 | .num_channels = 1, |
407 | .regmap_type = AD5693_REGMAP, |
408 | }, |
409 | [ID_AD5692R] = { |
410 | .channels = ad5692r_channels, |
411 | .int_vref_mv = 2500, |
412 | .num_channels = 1, |
413 | .regmap_type = AD5693_REGMAP, |
414 | }, |
415 | [ID_AD5693] = { |
416 | .channels = ad5693_channels, |
417 | .num_channels = 1, |
418 | .regmap_type = AD5693_REGMAP, |
419 | }, |
420 | [ID_AD5693R] = { |
421 | .channels = ad5693_channels, |
422 | .int_vref_mv = 2500, |
423 | .num_channels = 1, |
424 | .regmap_type = AD5693_REGMAP, |
425 | }, |
426 | [ID_AD5694] = { |
427 | .channels = ad5684_channels, |
428 | .num_channels = 4, |
429 | .regmap_type = AD5686_REGMAP, |
430 | }, |
431 | [ID_AD5694R] = { |
432 | .channels = ad5684_channels, |
433 | .int_vref_mv = 2500, |
434 | .num_channels = 4, |
435 | .regmap_type = AD5686_REGMAP, |
436 | }, |
437 | [ID_AD5696] = { |
438 | .channels = ad5686_channels, |
439 | .num_channels = 4, |
440 | .regmap_type = AD5686_REGMAP, |
441 | }, |
442 | [ID_AD5696R] = { |
443 | .channels = ad5686_channels, |
444 | .int_vref_mv = 2500, |
445 | .num_channels = 4, |
446 | .regmap_type = AD5686_REGMAP, |
447 | }, |
448 | }; |
449 | |
450 | int ad5686_probe(struct device *dev, |
451 | enum ad5686_supported_device_ids chip_type, |
452 | const char *name, ad5686_write_func write, |
453 | ad5686_read_func read) |
454 | { |
455 | struct ad5686_state *st; |
456 | struct iio_dev *indio_dev; |
457 | unsigned int val, ref_bit_msk; |
458 | u8 cmd; |
459 | int ret, i, voltage_uv = 0; |
460 | |
461 | indio_dev = devm_iio_device_alloc(parent: dev, sizeof_priv: sizeof(*st)); |
462 | if (indio_dev == NULL) |
463 | return -ENOMEM; |
464 | |
465 | st = iio_priv(indio_dev); |
466 | dev_set_drvdata(dev, data: indio_dev); |
467 | |
468 | st->dev = dev; |
469 | st->write = write; |
470 | st->read = read; |
471 | |
472 | st->reg = devm_regulator_get_optional(dev, id: "vcc" ); |
473 | if (!IS_ERR(ptr: st->reg)) { |
474 | ret = regulator_enable(regulator: st->reg); |
475 | if (ret) |
476 | return ret; |
477 | |
478 | ret = regulator_get_voltage(regulator: st->reg); |
479 | if (ret < 0) |
480 | goto error_disable_reg; |
481 | |
482 | voltage_uv = ret; |
483 | } |
484 | |
485 | st->chip_info = &ad5686_chip_info_tbl[chip_type]; |
486 | |
487 | if (voltage_uv) |
488 | st->vref_mv = voltage_uv / 1000; |
489 | else |
490 | st->vref_mv = st->chip_info->int_vref_mv; |
491 | |
492 | /* Set all the power down mode for all channels to 1K pulldown */ |
493 | for (i = 0; i < st->chip_info->num_channels; i++) |
494 | st->pwr_down_mode |= (0x01 << (i * 2)); |
495 | |
496 | indio_dev->name = name; |
497 | indio_dev->info = &ad5686_info; |
498 | indio_dev->modes = INDIO_DIRECT_MODE; |
499 | indio_dev->channels = st->chip_info->channels; |
500 | indio_dev->num_channels = st->chip_info->num_channels; |
501 | |
502 | mutex_init(&st->lock); |
503 | |
504 | switch (st->chip_info->regmap_type) { |
505 | case AD5310_REGMAP: |
506 | cmd = AD5686_CMD_CONTROL_REG; |
507 | ref_bit_msk = AD5310_REF_BIT_MSK; |
508 | st->use_internal_vref = !voltage_uv; |
509 | break; |
510 | case AD5683_REGMAP: |
511 | cmd = AD5686_CMD_CONTROL_REG; |
512 | ref_bit_msk = AD5683_REF_BIT_MSK; |
513 | st->use_internal_vref = !voltage_uv; |
514 | break; |
515 | case AD5686_REGMAP: |
516 | cmd = AD5686_CMD_INTERNAL_REFER_SETUP; |
517 | ref_bit_msk = 0; |
518 | break; |
519 | case AD5693_REGMAP: |
520 | cmd = AD5686_CMD_CONTROL_REG; |
521 | ref_bit_msk = AD5693_REF_BIT_MSK; |
522 | st->use_internal_vref = !voltage_uv; |
523 | break; |
524 | default: |
525 | ret = -EINVAL; |
526 | goto error_disable_reg; |
527 | } |
528 | |
529 | val = (voltage_uv | ref_bit_msk); |
530 | |
531 | ret = st->write(st, cmd, 0, !!val); |
532 | if (ret) |
533 | goto error_disable_reg; |
534 | |
535 | ret = iio_device_register(indio_dev); |
536 | if (ret) |
537 | goto error_disable_reg; |
538 | |
539 | return 0; |
540 | |
541 | error_disable_reg: |
542 | if (!IS_ERR(ptr: st->reg)) |
543 | regulator_disable(regulator: st->reg); |
544 | return ret; |
545 | } |
546 | EXPORT_SYMBOL_NS_GPL(ad5686_probe, IIO_AD5686); |
547 | |
548 | void ad5686_remove(struct device *dev) |
549 | { |
550 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
551 | struct ad5686_state *st = iio_priv(indio_dev); |
552 | |
553 | iio_device_unregister(indio_dev); |
554 | if (!IS_ERR(ptr: st->reg)) |
555 | regulator_disable(regulator: st->reg); |
556 | } |
557 | EXPORT_SYMBOL_NS_GPL(ad5686_remove, IIO_AD5686); |
558 | |
559 | MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>" ); |
560 | MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC" ); |
561 | MODULE_LICENSE("GPL v2" ); |
562 | |