1 | /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ |
2 | /* |
3 | * Copyright (c) 2016 Mellanox Technologies Ltd. All rights reserved. |
4 | * Copyright (c) 2015 System Fabric Works, Inc. All rights reserved. |
5 | */ |
6 | |
7 | #ifndef RXE_PARAM_H |
8 | #define RXE_PARAM_H |
9 | |
10 | #include <uapi/rdma/rdma_user_rxe.h> |
11 | |
12 | #define DEFAULT_MAX_VALUE (1 << 20) |
13 | |
14 | static inline enum ib_mtu rxe_mtu_int_to_enum(int mtu) |
15 | { |
16 | if (mtu < 256) |
17 | return 0; |
18 | else if (mtu < 512) |
19 | return IB_MTU_256; |
20 | else if (mtu < 1024) |
21 | return IB_MTU_512; |
22 | else if (mtu < 2048) |
23 | return IB_MTU_1024; |
24 | else if (mtu < 4096) |
25 | return IB_MTU_2048; |
26 | else |
27 | return IB_MTU_4096; |
28 | } |
29 | |
30 | /* Find the IB mtu for a given network MTU. */ |
31 | static inline enum ib_mtu eth_mtu_int_to_enum(int mtu) |
32 | { |
33 | mtu -= RXE_MAX_HDR_LENGTH; |
34 | |
35 | return rxe_mtu_int_to_enum(mtu); |
36 | } |
37 | |
38 | /* default/initial rxe device parameter settings */ |
39 | enum rxe_device_param { |
40 | RXE_MAX_MR_SIZE = -1ull, |
41 | RXE_PAGE_SIZE_CAP = 0xfffff000, |
42 | RXE_MAX_QP_WR = DEFAULT_MAX_VALUE, |
43 | RXE_DEVICE_CAP_FLAGS = IB_DEVICE_BAD_PKEY_CNTR |
44 | | IB_DEVICE_BAD_QKEY_CNTR |
45 | | IB_DEVICE_AUTO_PATH_MIG |
46 | | IB_DEVICE_CHANGE_PHY_PORT |
47 | | IB_DEVICE_UD_AV_PORT_ENFORCE |
48 | | IB_DEVICE_PORT_ACTIVE_EVENT |
49 | | IB_DEVICE_SYS_IMAGE_GUID |
50 | | IB_DEVICE_RC_RNR_NAK_GEN |
51 | | IB_DEVICE_SRQ_RESIZE |
52 | | IB_DEVICE_MEM_MGT_EXTENSIONS |
53 | | IB_DEVICE_MEM_WINDOW |
54 | | IB_DEVICE_FLUSH_GLOBAL |
55 | | IB_DEVICE_FLUSH_PERSISTENT |
56 | #ifdef CONFIG_64BIT |
57 | | IB_DEVICE_MEM_WINDOW_TYPE_2B |
58 | | IB_DEVICE_ATOMIC_WRITE, |
59 | #else |
60 | | IB_DEVICE_MEM_WINDOW_TYPE_2B, |
61 | #endif /* CONFIG_64BIT */ |
62 | RXE_MAX_SGE = 32, |
63 | RXE_MAX_WQE_SIZE = sizeof(struct rxe_send_wqe) + |
64 | sizeof(struct ib_sge) * RXE_MAX_SGE, |
65 | RXE_MAX_INLINE_DATA = RXE_MAX_WQE_SIZE - |
66 | sizeof(struct rxe_send_wqe), |
67 | RXE_MAX_SGE_RD = 32, |
68 | RXE_MAX_CQ = DEFAULT_MAX_VALUE, |
69 | RXE_MAX_LOG_CQE = 15, |
70 | RXE_MAX_PD = DEFAULT_MAX_VALUE, |
71 | RXE_MAX_QP_RD_ATOM = 128, |
72 | RXE_MAX_RES_RD_ATOM = 0x3f000, |
73 | RXE_MAX_QP_INIT_RD_ATOM = 128, |
74 | RXE_MAX_MCAST_GRP = 8192, |
75 | RXE_MAX_MCAST_QP_ATTACH = 56, |
76 | RXE_MAX_TOT_MCAST_QP_ATTACH = 0x70000, |
77 | RXE_MAX_AH = (1<<15) - 1, /* 32Ki - 1 */ |
78 | RXE_MIN_AH_INDEX = 1, |
79 | RXE_MAX_AH_INDEX = RXE_MAX_AH, |
80 | RXE_MAX_SRQ_WR = DEFAULT_MAX_VALUE, |
81 | RXE_MIN_SRQ_WR = 1, |
82 | RXE_MAX_SRQ_SGE = 27, |
83 | RXE_MIN_SRQ_SGE = 1, |
84 | RXE_MAX_FMR_PAGE_LIST_LEN = 512, |
85 | RXE_MAX_PKEYS = 64, |
86 | RXE_LOCAL_CA_ACK_DELAY = 15, |
87 | |
88 | RXE_MAX_UCONTEXT = DEFAULT_MAX_VALUE, |
89 | |
90 | RXE_NUM_PORT = 1, |
91 | |
92 | RXE_MIN_QP_INDEX = 16, |
93 | RXE_MAX_QP_INDEX = DEFAULT_MAX_VALUE, |
94 | RXE_MAX_QP = DEFAULT_MAX_VALUE - RXE_MIN_QP_INDEX, |
95 | |
96 | RXE_MIN_SRQ_INDEX = 0x00020001, |
97 | RXE_MAX_SRQ_INDEX = DEFAULT_MAX_VALUE, |
98 | RXE_MAX_SRQ = DEFAULT_MAX_VALUE - RXE_MIN_SRQ_INDEX, |
99 | |
100 | RXE_MIN_MR_INDEX = 0x00000001, |
101 | RXE_MAX_MR_INDEX = DEFAULT_MAX_VALUE >> 1, |
102 | RXE_MAX_MR = RXE_MAX_MR_INDEX - RXE_MIN_MR_INDEX, |
103 | RXE_MIN_MW_INDEX = RXE_MAX_MR_INDEX + 1, |
104 | RXE_MAX_MW_INDEX = DEFAULT_MAX_VALUE, |
105 | RXE_MAX_MW = RXE_MAX_MW_INDEX - RXE_MIN_MW_INDEX, |
106 | |
107 | RXE_MAX_PKT_PER_ACK = 64, |
108 | |
109 | RXE_MAX_UNACKED_PSNS = 128, |
110 | |
111 | /* Max inflight SKBs per queue pair */ |
112 | RXE_INFLIGHT_SKBS_PER_QP_HIGH = 64, |
113 | RXE_INFLIGHT_SKBS_PER_QP_LOW = 16, |
114 | |
115 | /* Max number of interations of each work item |
116 | * before yielding the cpu to let other |
117 | * work make progress |
118 | */ |
119 | RXE_MAX_ITERATIONS = 1024, |
120 | |
121 | /* Delay before calling arbiter timer */ |
122 | RXE_NSEC_ARB_TIMER_DELAY = 200, |
123 | |
124 | /* IBTA v1.4 A3.3.1 VENDOR INFORMATION section */ |
125 | RXE_VENDOR_ID = 0XFFFFFF, |
126 | }; |
127 | |
128 | /* default/initial rxe port parameters */ |
129 | enum rxe_port_param { |
130 | RXE_PORT_GID_TBL_LEN = 1024, |
131 | RXE_PORT_PORT_CAP_FLAGS = IB_PORT_CM_SUP, |
132 | RXE_PORT_MAX_MSG_SZ = 0x800000, |
133 | RXE_PORT_BAD_PKEY_CNTR = 0, |
134 | RXE_PORT_QKEY_VIOL_CNTR = 0, |
135 | RXE_PORT_LID = 0, |
136 | RXE_PORT_SM_LID = 0, |
137 | RXE_PORT_SM_SL = 0, |
138 | RXE_PORT_LMC = 0, |
139 | RXE_PORT_MAX_VL_NUM = 1, |
140 | RXE_PORT_SUBNET_TIMEOUT = 0, |
141 | RXE_PORT_INIT_TYPE_REPLY = 0, |
142 | RXE_PORT_ACTIVE_WIDTH = IB_WIDTH_1X, |
143 | RXE_PORT_ACTIVE_SPEED = 1, |
144 | RXE_PORT_PKEY_TBL_LEN = 1, |
145 | RXE_PORT_PHYS_STATE = IB_PORT_PHYS_STATE_POLLING, |
146 | RXE_PORT_SUBNET_PREFIX = 0xfe80000000000000ULL, |
147 | }; |
148 | |
149 | /* default/initial port info parameters */ |
150 | enum rxe_port_info_param { |
151 | RXE_PORT_INFO_VL_CAP = 4, /* 1-8 */ |
152 | RXE_PORT_INFO_MTU_CAP = 5, /* 4096 */ |
153 | RXE_PORT_INFO_OPER_VL = 1, /* 1 */ |
154 | }; |
155 | |
156 | #endif /* RXE_PARAM_H */ |
157 | |