1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Description: keypad driver for ADP5589, ADP5585 |
4 | * I2C QWERTY Keypad and IO Expander |
5 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
6 | * |
7 | * Copyright (C) 2010-2011 Analog Devices Inc. |
8 | */ |
9 | |
10 | #include <linux/bitops.h> |
11 | #include <linux/module.h> |
12 | #include <linux/interrupt.h> |
13 | #include <linux/irq.h> |
14 | #include <linux/workqueue.h> |
15 | #include <linux/errno.h> |
16 | #include <linux/pm.h> |
17 | #include <linux/pm_wakeirq.h> |
18 | #include <linux/platform_device.h> |
19 | #include <linux/input.h> |
20 | #include <linux/i2c.h> |
21 | #include <linux/gpio/driver.h> |
22 | #include <linux/slab.h> |
23 | |
24 | #include <linux/input/adp5589.h> |
25 | |
26 | /* ADP5589/ADP5585 Common Registers */ |
27 | #define ADP5589_5_ID 0x00 |
28 | #define ADP5589_5_INT_STATUS 0x01 |
29 | #define ADP5589_5_STATUS 0x02 |
30 | #define ADP5589_5_FIFO_1 0x03 |
31 | #define ADP5589_5_FIFO_2 0x04 |
32 | #define ADP5589_5_FIFO_3 0x05 |
33 | #define ADP5589_5_FIFO_4 0x06 |
34 | #define ADP5589_5_FIFO_5 0x07 |
35 | #define ADP5589_5_FIFO_6 0x08 |
36 | #define ADP5589_5_FIFO_7 0x09 |
37 | #define ADP5589_5_FIFO_8 0x0A |
38 | #define ADP5589_5_FIFO_9 0x0B |
39 | #define ADP5589_5_FIFO_10 0x0C |
40 | #define ADP5589_5_FIFO_11 0x0D |
41 | #define ADP5589_5_FIFO_12 0x0E |
42 | #define ADP5589_5_FIFO_13 0x0F |
43 | #define ADP5589_5_FIFO_14 0x10 |
44 | #define ADP5589_5_FIFO_15 0x11 |
45 | #define ADP5589_5_FIFO_16 0x12 |
46 | #define ADP5589_5_GPI_INT_STAT_A 0x13 |
47 | #define ADP5589_5_GPI_INT_STAT_B 0x14 |
48 | |
49 | /* ADP5589 Registers */ |
50 | #define ADP5589_GPI_INT_STAT_C 0x15 |
51 | #define ADP5589_GPI_STATUS_A 0x16 |
52 | #define ADP5589_GPI_STATUS_B 0x17 |
53 | #define ADP5589_GPI_STATUS_C 0x18 |
54 | #define ADP5589_RPULL_CONFIG_A 0x19 |
55 | #define ADP5589_RPULL_CONFIG_B 0x1A |
56 | #define ADP5589_RPULL_CONFIG_C 0x1B |
57 | #define ADP5589_RPULL_CONFIG_D 0x1C |
58 | #define ADP5589_RPULL_CONFIG_E 0x1D |
59 | #define ADP5589_GPI_INT_LEVEL_A 0x1E |
60 | #define ADP5589_GPI_INT_LEVEL_B 0x1F |
61 | #define ADP5589_GPI_INT_LEVEL_C 0x20 |
62 | #define ADP5589_GPI_EVENT_EN_A 0x21 |
63 | #define ADP5589_GPI_EVENT_EN_B 0x22 |
64 | #define ADP5589_GPI_EVENT_EN_C 0x23 |
65 | #define ADP5589_GPI_INTERRUPT_EN_A 0x24 |
66 | #define ADP5589_GPI_INTERRUPT_EN_B 0x25 |
67 | #define ADP5589_GPI_INTERRUPT_EN_C 0x26 |
68 | #define ADP5589_DEBOUNCE_DIS_A 0x27 |
69 | #define ADP5589_DEBOUNCE_DIS_B 0x28 |
70 | #define ADP5589_DEBOUNCE_DIS_C 0x29 |
71 | #define ADP5589_GPO_DATA_OUT_A 0x2A |
72 | #define ADP5589_GPO_DATA_OUT_B 0x2B |
73 | #define ADP5589_GPO_DATA_OUT_C 0x2C |
74 | #define ADP5589_GPO_OUT_MODE_A 0x2D |
75 | #define ADP5589_GPO_OUT_MODE_B 0x2E |
76 | #define ADP5589_GPO_OUT_MODE_C 0x2F |
77 | #define ADP5589_GPIO_DIRECTION_A 0x30 |
78 | #define ADP5589_GPIO_DIRECTION_B 0x31 |
79 | #define ADP5589_GPIO_DIRECTION_C 0x32 |
80 | #define ADP5589_UNLOCK1 0x33 |
81 | #define ADP5589_UNLOCK2 0x34 |
82 | #define ADP5589_EXT_LOCK_EVENT 0x35 |
83 | #define ADP5589_UNLOCK_TIMERS 0x36 |
84 | #define ADP5589_LOCK_CFG 0x37 |
85 | #define ADP5589_RESET1_EVENT_A 0x38 |
86 | #define ADP5589_RESET1_EVENT_B 0x39 |
87 | #define ADP5589_RESET1_EVENT_C 0x3A |
88 | #define ADP5589_RESET2_EVENT_A 0x3B |
89 | #define ADP5589_RESET2_EVENT_B 0x3C |
90 | #define ADP5589_RESET_CFG 0x3D |
91 | #define ADP5589_PWM_OFFT_LOW 0x3E |
92 | #define ADP5589_PWM_OFFT_HIGH 0x3F |
93 | #define ADP5589_PWM_ONT_LOW 0x40 |
94 | #define ADP5589_PWM_ONT_HIGH 0x41 |
95 | #define ADP5589_PWM_CFG 0x42 |
96 | #define ADP5589_CLOCK_DIV_CFG 0x43 |
97 | #define ADP5589_LOGIC_1_CFG 0x44 |
98 | #define ADP5589_LOGIC_2_CFG 0x45 |
99 | #define ADP5589_LOGIC_FF_CFG 0x46 |
100 | #define ADP5589_LOGIC_INT_EVENT_EN 0x47 |
101 | #define ADP5589_POLL_PTIME_CFG 0x48 |
102 | #define ADP5589_PIN_CONFIG_A 0x49 |
103 | #define ADP5589_PIN_CONFIG_B 0x4A |
104 | #define ADP5589_PIN_CONFIG_C 0x4B |
105 | #define ADP5589_PIN_CONFIG_D 0x4C |
106 | #define ADP5589_GENERAL_CFG 0x4D |
107 | #define ADP5589_INT_EN 0x4E |
108 | |
109 | /* ADP5585 Registers */ |
110 | #define ADP5585_GPI_STATUS_A 0x15 |
111 | #define ADP5585_GPI_STATUS_B 0x16 |
112 | #define ADP5585_RPULL_CONFIG_A 0x17 |
113 | #define ADP5585_RPULL_CONFIG_B 0x18 |
114 | #define ADP5585_RPULL_CONFIG_C 0x19 |
115 | #define ADP5585_RPULL_CONFIG_D 0x1A |
116 | #define ADP5585_GPI_INT_LEVEL_A 0x1B |
117 | #define ADP5585_GPI_INT_LEVEL_B 0x1C |
118 | #define ADP5585_GPI_EVENT_EN_A 0x1D |
119 | #define ADP5585_GPI_EVENT_EN_B 0x1E |
120 | #define ADP5585_GPI_INTERRUPT_EN_A 0x1F |
121 | #define ADP5585_GPI_INTERRUPT_EN_B 0x20 |
122 | #define ADP5585_DEBOUNCE_DIS_A 0x21 |
123 | #define ADP5585_DEBOUNCE_DIS_B 0x22 |
124 | #define ADP5585_GPO_DATA_OUT_A 0x23 |
125 | #define ADP5585_GPO_DATA_OUT_B 0x24 |
126 | #define ADP5585_GPO_OUT_MODE_A 0x25 |
127 | #define ADP5585_GPO_OUT_MODE_B 0x26 |
128 | #define ADP5585_GPIO_DIRECTION_A 0x27 |
129 | #define ADP5585_GPIO_DIRECTION_B 0x28 |
130 | #define ADP5585_RESET1_EVENT_A 0x29 |
131 | #define ADP5585_RESET1_EVENT_B 0x2A |
132 | #define ADP5585_RESET1_EVENT_C 0x2B |
133 | #define ADP5585_RESET2_EVENT_A 0x2C |
134 | #define ADP5585_RESET2_EVENT_B 0x2D |
135 | #define ADP5585_RESET_CFG 0x2E |
136 | #define ADP5585_PWM_OFFT_LOW 0x2F |
137 | #define ADP5585_PWM_OFFT_HIGH 0x30 |
138 | #define ADP5585_PWM_ONT_LOW 0x31 |
139 | #define ADP5585_PWM_ONT_HIGH 0x32 |
140 | #define ADP5585_PWM_CFG 0x33 |
141 | #define ADP5585_LOGIC_CFG 0x34 |
142 | #define ADP5585_LOGIC_FF_CFG 0x35 |
143 | #define ADP5585_LOGIC_INT_EVENT_EN 0x36 |
144 | #define ADP5585_POLL_PTIME_CFG 0x37 |
145 | #define ADP5585_PIN_CONFIG_A 0x38 |
146 | #define ADP5585_PIN_CONFIG_B 0x39 |
147 | #define ADP5585_PIN_CONFIG_D 0x3A |
148 | #define ADP5585_GENERAL_CFG 0x3B |
149 | #define ADP5585_INT_EN 0x3C |
150 | |
151 | /* ID Register */ |
152 | #define ADP5589_5_DEVICE_ID_MASK 0xF |
153 | #define ADP5589_5_MAN_ID_MASK 0xF |
154 | #define ADP5589_5_MAN_ID_SHIFT 4 |
155 | #define ADP5589_5_MAN_ID 0x02 |
156 | |
157 | /* GENERAL_CFG Register */ |
158 | #define OSC_EN BIT(7) |
159 | #define CORE_CLK(x) (((x) & 0x3) << 5) |
160 | #define LCK_TRK_LOGIC BIT(4) /* ADP5589 only */ |
161 | #define LCK_TRK_GPI BIT(3) /* ADP5589 only */ |
162 | #define INT_CFG BIT(1) |
163 | #define RST_CFG BIT(0) |
164 | |
165 | /* INT_EN Register */ |
166 | #define LOGIC2_IEN BIT(5) /* ADP5589 only */ |
167 | #define LOGIC1_IEN BIT(4) |
168 | #define LOCK_IEN BIT(3) /* ADP5589 only */ |
169 | #define OVRFLOW_IEN BIT(2) |
170 | #define GPI_IEN BIT(1) |
171 | #define EVENT_IEN BIT(0) |
172 | |
173 | /* Interrupt Status Register */ |
174 | #define LOGIC2_INT BIT(5) /* ADP5589 only */ |
175 | #define LOGIC1_INT BIT(4) |
176 | #define LOCK_INT BIT(3) /* ADP5589 only */ |
177 | #define OVRFLOW_INT BIT(2) |
178 | #define GPI_INT BIT(1) |
179 | #define EVENT_INT BIT(0) |
180 | |
181 | /* STATUS Register */ |
182 | #define LOGIC2_STAT BIT(7) /* ADP5589 only */ |
183 | #define LOGIC1_STAT BIT(6) |
184 | #define LOCK_STAT BIT(5) /* ADP5589 only */ |
185 | #define KEC 0x1F |
186 | |
187 | /* PIN_CONFIG_D Register */ |
188 | #define C4_EXTEND_CFG BIT(6) /* RESET2 */ |
189 | #define R4_EXTEND_CFG BIT(5) /* RESET1 */ |
190 | |
191 | /* LOCK_CFG */ |
192 | #define LOCK_EN BIT(0) |
193 | |
194 | #define PTIME_MASK 0x3 |
195 | #define LTIME_MASK 0x3 /* ADP5589 only */ |
196 | |
197 | /* Key Event Register xy */ |
198 | #define KEY_EV_PRESSED BIT(7) |
199 | #define KEY_EV_MASK 0x7F |
200 | |
201 | #define KEYP_MAX_EVENT 16 |
202 | #define ADP5589_MAXGPIO 19 |
203 | #define ADP5585_MAXGPIO 11 /* 10 on the ADP5585-01, 11 on ADP5585-02 */ |
204 | |
205 | enum { |
206 | ADP5589, |
207 | ADP5585_01, |
208 | ADP5585_02 |
209 | }; |
210 | |
211 | struct adp_constants { |
212 | u8 maxgpio; |
213 | u8 keymapsize; |
214 | u8 gpi_pin_row_base; |
215 | u8 gpi_pin_row_end; |
216 | u8 gpi_pin_col_base; |
217 | u8 gpi_pin_base; |
218 | u8 gpi_pin_end; |
219 | u8 gpimapsize_max; |
220 | u8 max_row_num; |
221 | u8 max_col_num; |
222 | u8 row_mask; |
223 | u8 col_mask; |
224 | u8 col_shift; |
225 | u8 c4_extend_cfg; |
226 | u8 (*bank) (u8 offset); |
227 | u8 (*bit) (u8 offset); |
228 | u8 (*reg) (u8 reg); |
229 | }; |
230 | |
231 | struct adp5589_kpad { |
232 | struct i2c_client *client; |
233 | struct input_dev *input; |
234 | const struct adp_constants *var; |
235 | unsigned short keycode[ADP5589_KEYMAPSIZE]; |
236 | const struct adp5589_gpi_map *gpimap; |
237 | unsigned short gpimapsize; |
238 | unsigned extend_cfg; |
239 | bool is_adp5585; |
240 | bool support_row5; |
241 | #ifdef CONFIG_GPIOLIB |
242 | unsigned char gpiomap[ADP5589_MAXGPIO]; |
243 | struct gpio_chip gc; |
244 | struct mutex gpio_lock; /* Protect cached dir, dat_out */ |
245 | u8 dat_out[3]; |
246 | u8 dir[3]; |
247 | #endif |
248 | }; |
249 | |
250 | /* |
251 | * ADP5589 / ADP5585 derivative / variant handling |
252 | */ |
253 | |
254 | |
255 | /* ADP5589 */ |
256 | |
257 | static unsigned char adp5589_bank(unsigned char offset) |
258 | { |
259 | return offset >> 3; |
260 | } |
261 | |
262 | static unsigned char adp5589_bit(unsigned char offset) |
263 | { |
264 | return 1u << (offset & 0x7); |
265 | } |
266 | |
267 | static unsigned char adp5589_reg(unsigned char reg) |
268 | { |
269 | return reg; |
270 | } |
271 | |
272 | static const struct adp_constants const_adp5589 = { |
273 | .maxgpio = ADP5589_MAXGPIO, |
274 | .keymapsize = ADP5589_KEYMAPSIZE, |
275 | .gpi_pin_row_base = ADP5589_GPI_PIN_ROW_BASE, |
276 | .gpi_pin_row_end = ADP5589_GPI_PIN_ROW_END, |
277 | .gpi_pin_col_base = ADP5589_GPI_PIN_COL_BASE, |
278 | .gpi_pin_base = ADP5589_GPI_PIN_BASE, |
279 | .gpi_pin_end = ADP5589_GPI_PIN_END, |
280 | .gpimapsize_max = ADP5589_GPIMAPSIZE_MAX, |
281 | .c4_extend_cfg = 12, |
282 | .max_row_num = ADP5589_MAX_ROW_NUM, |
283 | .max_col_num = ADP5589_MAX_COL_NUM, |
284 | .row_mask = ADP5589_ROW_MASK, |
285 | .col_mask = ADP5589_COL_MASK, |
286 | .col_shift = ADP5589_COL_SHIFT, |
287 | .bank = adp5589_bank, |
288 | .bit = adp5589_bit, |
289 | .reg = adp5589_reg, |
290 | }; |
291 | |
292 | /* ADP5585 */ |
293 | |
294 | static unsigned char adp5585_bank(unsigned char offset) |
295 | { |
296 | return offset > ADP5585_MAX_ROW_NUM; |
297 | } |
298 | |
299 | static unsigned char adp5585_bit(unsigned char offset) |
300 | { |
301 | return (offset > ADP5585_MAX_ROW_NUM) ? |
302 | 1u << (offset - ADP5585_COL_SHIFT) : 1u << offset; |
303 | } |
304 | |
305 | static const unsigned char adp5585_reg_lut[] = { |
306 | [ADP5589_GPI_STATUS_A] = ADP5585_GPI_STATUS_A, |
307 | [ADP5589_GPI_STATUS_B] = ADP5585_GPI_STATUS_B, |
308 | [ADP5589_RPULL_CONFIG_A] = ADP5585_RPULL_CONFIG_A, |
309 | [ADP5589_RPULL_CONFIG_B] = ADP5585_RPULL_CONFIG_B, |
310 | [ADP5589_RPULL_CONFIG_C] = ADP5585_RPULL_CONFIG_C, |
311 | [ADP5589_RPULL_CONFIG_D] = ADP5585_RPULL_CONFIG_D, |
312 | [ADP5589_GPI_INT_LEVEL_A] = ADP5585_GPI_INT_LEVEL_A, |
313 | [ADP5589_GPI_INT_LEVEL_B] = ADP5585_GPI_INT_LEVEL_B, |
314 | [ADP5589_GPI_EVENT_EN_A] = ADP5585_GPI_EVENT_EN_A, |
315 | [ADP5589_GPI_EVENT_EN_B] = ADP5585_GPI_EVENT_EN_B, |
316 | [ADP5589_GPI_INTERRUPT_EN_A] = ADP5585_GPI_INTERRUPT_EN_A, |
317 | [ADP5589_GPI_INTERRUPT_EN_B] = ADP5585_GPI_INTERRUPT_EN_B, |
318 | [ADP5589_DEBOUNCE_DIS_A] = ADP5585_DEBOUNCE_DIS_A, |
319 | [ADP5589_DEBOUNCE_DIS_B] = ADP5585_DEBOUNCE_DIS_B, |
320 | [ADP5589_GPO_DATA_OUT_A] = ADP5585_GPO_DATA_OUT_A, |
321 | [ADP5589_GPO_DATA_OUT_B] = ADP5585_GPO_DATA_OUT_B, |
322 | [ADP5589_GPO_OUT_MODE_A] = ADP5585_GPO_OUT_MODE_A, |
323 | [ADP5589_GPO_OUT_MODE_B] = ADP5585_GPO_OUT_MODE_B, |
324 | [ADP5589_GPIO_DIRECTION_A] = ADP5585_GPIO_DIRECTION_A, |
325 | [ADP5589_GPIO_DIRECTION_B] = ADP5585_GPIO_DIRECTION_B, |
326 | [ADP5589_RESET1_EVENT_A] = ADP5585_RESET1_EVENT_A, |
327 | [ADP5589_RESET1_EVENT_B] = ADP5585_RESET1_EVENT_B, |
328 | [ADP5589_RESET1_EVENT_C] = ADP5585_RESET1_EVENT_C, |
329 | [ADP5589_RESET2_EVENT_A] = ADP5585_RESET2_EVENT_A, |
330 | [ADP5589_RESET2_EVENT_B] = ADP5585_RESET2_EVENT_B, |
331 | [ADP5589_RESET_CFG] = ADP5585_RESET_CFG, |
332 | [ADP5589_PWM_OFFT_LOW] = ADP5585_PWM_OFFT_LOW, |
333 | [ADP5589_PWM_OFFT_HIGH] = ADP5585_PWM_OFFT_HIGH, |
334 | [ADP5589_PWM_ONT_LOW] = ADP5585_PWM_ONT_LOW, |
335 | [ADP5589_PWM_ONT_HIGH] = ADP5585_PWM_ONT_HIGH, |
336 | [ADP5589_PWM_CFG] = ADP5585_PWM_CFG, |
337 | [ADP5589_LOGIC_1_CFG] = ADP5585_LOGIC_CFG, |
338 | [ADP5589_LOGIC_FF_CFG] = ADP5585_LOGIC_FF_CFG, |
339 | [ADP5589_LOGIC_INT_EVENT_EN] = ADP5585_LOGIC_INT_EVENT_EN, |
340 | [ADP5589_POLL_PTIME_CFG] = ADP5585_POLL_PTIME_CFG, |
341 | [ADP5589_PIN_CONFIG_A] = ADP5585_PIN_CONFIG_A, |
342 | [ADP5589_PIN_CONFIG_B] = ADP5585_PIN_CONFIG_B, |
343 | [ADP5589_PIN_CONFIG_D] = ADP5585_PIN_CONFIG_D, |
344 | [ADP5589_GENERAL_CFG] = ADP5585_GENERAL_CFG, |
345 | [ADP5589_INT_EN] = ADP5585_INT_EN, |
346 | }; |
347 | |
348 | static unsigned char adp5585_reg(unsigned char reg) |
349 | { |
350 | return adp5585_reg_lut[reg]; |
351 | } |
352 | |
353 | static const struct adp_constants const_adp5585 = { |
354 | .maxgpio = ADP5585_MAXGPIO, |
355 | .keymapsize = ADP5585_KEYMAPSIZE, |
356 | .gpi_pin_row_base = ADP5585_GPI_PIN_ROW_BASE, |
357 | .gpi_pin_row_end = ADP5585_GPI_PIN_ROW_END, |
358 | .gpi_pin_col_base = ADP5585_GPI_PIN_COL_BASE, |
359 | .gpi_pin_base = ADP5585_GPI_PIN_BASE, |
360 | .gpi_pin_end = ADP5585_GPI_PIN_END, |
361 | .gpimapsize_max = ADP5585_GPIMAPSIZE_MAX, |
362 | .c4_extend_cfg = 10, |
363 | .max_row_num = ADP5585_MAX_ROW_NUM, |
364 | .max_col_num = ADP5585_MAX_COL_NUM, |
365 | .row_mask = ADP5585_ROW_MASK, |
366 | .col_mask = ADP5585_COL_MASK, |
367 | .col_shift = ADP5585_COL_SHIFT, |
368 | .bank = adp5585_bank, |
369 | .bit = adp5585_bit, |
370 | .reg = adp5585_reg, |
371 | }; |
372 | |
373 | static int adp5589_read(struct i2c_client *client, u8 reg) |
374 | { |
375 | int ret = i2c_smbus_read_byte_data(client, command: reg); |
376 | |
377 | if (ret < 0) |
378 | dev_err(&client->dev, "Read Error\n" ); |
379 | |
380 | return ret; |
381 | } |
382 | |
383 | static int adp5589_write(struct i2c_client *client, u8 reg, u8 val) |
384 | { |
385 | return i2c_smbus_write_byte_data(client, command: reg, value: val); |
386 | } |
387 | |
388 | #ifdef CONFIG_GPIOLIB |
389 | static int adp5589_gpio_get_value(struct gpio_chip *chip, unsigned off) |
390 | { |
391 | struct adp5589_kpad *kpad = gpiochip_get_data(gc: chip); |
392 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
393 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); |
394 | |
395 | return !!(adp5589_read(client: kpad->client, |
396 | reg: kpad->var->reg(ADP5589_GPI_STATUS_A) + bank) & |
397 | bit); |
398 | } |
399 | |
400 | static void adp5589_gpio_set_value(struct gpio_chip *chip, |
401 | unsigned off, int val) |
402 | { |
403 | struct adp5589_kpad *kpad = gpiochip_get_data(gc: chip); |
404 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
405 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); |
406 | |
407 | mutex_lock(&kpad->gpio_lock); |
408 | |
409 | if (val) |
410 | kpad->dat_out[bank] |= bit; |
411 | else |
412 | kpad->dat_out[bank] &= ~bit; |
413 | |
414 | adp5589_write(client: kpad->client, reg: kpad->var->reg(ADP5589_GPO_DATA_OUT_A) + |
415 | bank, val: kpad->dat_out[bank]); |
416 | |
417 | mutex_unlock(lock: &kpad->gpio_lock); |
418 | } |
419 | |
420 | static int adp5589_gpio_direction_input(struct gpio_chip *chip, unsigned off) |
421 | { |
422 | struct adp5589_kpad *kpad = gpiochip_get_data(gc: chip); |
423 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
424 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); |
425 | int ret; |
426 | |
427 | mutex_lock(&kpad->gpio_lock); |
428 | |
429 | kpad->dir[bank] &= ~bit; |
430 | ret = adp5589_write(client: kpad->client, |
431 | reg: kpad->var->reg(ADP5589_GPIO_DIRECTION_A) + bank, |
432 | val: kpad->dir[bank]); |
433 | |
434 | mutex_unlock(lock: &kpad->gpio_lock); |
435 | |
436 | return ret; |
437 | } |
438 | |
439 | static int adp5589_gpio_direction_output(struct gpio_chip *chip, |
440 | unsigned off, int val) |
441 | { |
442 | struct adp5589_kpad *kpad = gpiochip_get_data(gc: chip); |
443 | unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); |
444 | unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); |
445 | int ret; |
446 | |
447 | mutex_lock(&kpad->gpio_lock); |
448 | |
449 | kpad->dir[bank] |= bit; |
450 | |
451 | if (val) |
452 | kpad->dat_out[bank] |= bit; |
453 | else |
454 | kpad->dat_out[bank] &= ~bit; |
455 | |
456 | ret = adp5589_write(client: kpad->client, reg: kpad->var->reg(ADP5589_GPO_DATA_OUT_A) |
457 | + bank, val: kpad->dat_out[bank]); |
458 | ret |= adp5589_write(client: kpad->client, |
459 | reg: kpad->var->reg(ADP5589_GPIO_DIRECTION_A) + bank, |
460 | val: kpad->dir[bank]); |
461 | |
462 | mutex_unlock(lock: &kpad->gpio_lock); |
463 | |
464 | return ret; |
465 | } |
466 | |
467 | static int adp5589_build_gpiomap(struct adp5589_kpad *kpad, |
468 | const struct adp5589_kpad_platform_data *pdata) |
469 | { |
470 | bool pin_used[ADP5589_MAXGPIO]; |
471 | int n_unused = 0; |
472 | int i; |
473 | |
474 | memset(pin_used, false, sizeof(pin_used)); |
475 | |
476 | for (i = 0; i < kpad->var->maxgpio; i++) |
477 | if (pdata->keypad_en_mask & BIT(i)) |
478 | pin_used[i] = true; |
479 | |
480 | for (i = 0; i < kpad->gpimapsize; i++) |
481 | pin_used[kpad->gpimap[i].pin - kpad->var->gpi_pin_base] = true; |
482 | |
483 | if (kpad->extend_cfg & R4_EXTEND_CFG) |
484 | pin_used[4] = true; |
485 | |
486 | if (kpad->extend_cfg & C4_EXTEND_CFG) |
487 | pin_used[kpad->var->c4_extend_cfg] = true; |
488 | |
489 | if (!kpad->support_row5) |
490 | pin_used[5] = true; |
491 | |
492 | for (i = 0; i < kpad->var->maxgpio; i++) |
493 | if (!pin_used[i]) |
494 | kpad->gpiomap[n_unused++] = i; |
495 | |
496 | return n_unused; |
497 | } |
498 | |
499 | static int adp5589_gpio_add(struct adp5589_kpad *kpad) |
500 | { |
501 | struct device *dev = &kpad->client->dev; |
502 | const struct adp5589_kpad_platform_data *pdata = dev_get_platdata(dev); |
503 | const struct adp5589_gpio_platform_data *gpio_data = pdata->gpio_data; |
504 | int i, error; |
505 | |
506 | if (!gpio_data) |
507 | return 0; |
508 | |
509 | kpad->gc.parent = dev; |
510 | kpad->gc.ngpio = adp5589_build_gpiomap(kpad, pdata); |
511 | if (kpad->gc.ngpio == 0) { |
512 | dev_info(dev, "No unused gpios left to export\n" ); |
513 | return 0; |
514 | } |
515 | |
516 | kpad->gc.direction_input = adp5589_gpio_direction_input; |
517 | kpad->gc.direction_output = adp5589_gpio_direction_output; |
518 | kpad->gc.get = adp5589_gpio_get_value; |
519 | kpad->gc.set = adp5589_gpio_set_value; |
520 | kpad->gc.can_sleep = 1; |
521 | |
522 | kpad->gc.base = gpio_data->gpio_start; |
523 | kpad->gc.label = kpad->client->name; |
524 | kpad->gc.owner = THIS_MODULE; |
525 | |
526 | mutex_init(&kpad->gpio_lock); |
527 | |
528 | error = devm_gpiochip_add_data(dev, &kpad->gc, kpad); |
529 | if (error) |
530 | return error; |
531 | |
532 | for (i = 0; i <= kpad->var->bank(kpad->var->maxgpio); i++) { |
533 | kpad->dat_out[i] = adp5589_read(client: kpad->client, reg: kpad->var->reg( |
534 | ADP5589_GPO_DATA_OUT_A) + i); |
535 | kpad->dir[i] = adp5589_read(client: kpad->client, reg: kpad->var->reg( |
536 | ADP5589_GPIO_DIRECTION_A) + i); |
537 | } |
538 | |
539 | return 0; |
540 | } |
541 | #else |
542 | static inline int adp5589_gpio_add(struct adp5589_kpad *kpad) |
543 | { |
544 | return 0; |
545 | } |
546 | #endif |
547 | |
548 | static void adp5589_report_switches(struct adp5589_kpad *kpad, |
549 | int key, int key_val) |
550 | { |
551 | int i; |
552 | |
553 | for (i = 0; i < kpad->gpimapsize; i++) { |
554 | if (key_val == kpad->gpimap[i].pin) { |
555 | input_report_switch(dev: kpad->input, |
556 | code: kpad->gpimap[i].sw_evt, |
557 | value: key & KEY_EV_PRESSED); |
558 | break; |
559 | } |
560 | } |
561 | } |
562 | |
563 | static void adp5589_report_events(struct adp5589_kpad *kpad, int ev_cnt) |
564 | { |
565 | int i; |
566 | |
567 | for (i = 0; i < ev_cnt; i++) { |
568 | int key = adp5589_read(client: kpad->client, ADP5589_5_FIFO_1 + i); |
569 | int key_val = key & KEY_EV_MASK; |
570 | |
571 | if (key_val >= kpad->var->gpi_pin_base && |
572 | key_val <= kpad->var->gpi_pin_end) { |
573 | adp5589_report_switches(kpad, key, key_val); |
574 | } else { |
575 | input_report_key(dev: kpad->input, |
576 | code: kpad->keycode[key_val - 1], |
577 | value: key & KEY_EV_PRESSED); |
578 | } |
579 | } |
580 | } |
581 | |
582 | static irqreturn_t adp5589_irq(int irq, void *handle) |
583 | { |
584 | struct adp5589_kpad *kpad = handle; |
585 | struct i2c_client *client = kpad->client; |
586 | int status, ev_cnt; |
587 | |
588 | status = adp5589_read(client, ADP5589_5_INT_STATUS); |
589 | |
590 | if (status & OVRFLOW_INT) /* Unlikely and should never happen */ |
591 | dev_err(&client->dev, "Event Overflow Error\n" ); |
592 | |
593 | if (status & EVENT_INT) { |
594 | ev_cnt = adp5589_read(client, ADP5589_5_STATUS) & KEC; |
595 | if (ev_cnt) { |
596 | adp5589_report_events(kpad, ev_cnt); |
597 | input_sync(dev: kpad->input); |
598 | } |
599 | } |
600 | |
601 | adp5589_write(client, ADP5589_5_INT_STATUS, val: status); /* Status is W1C */ |
602 | |
603 | return IRQ_HANDLED; |
604 | } |
605 | |
606 | static int adp5589_get_evcode(struct adp5589_kpad *kpad, unsigned short key) |
607 | { |
608 | int i; |
609 | |
610 | for (i = 0; i < kpad->var->keymapsize; i++) |
611 | if (key == kpad->keycode[i]) |
612 | return (i + 1) | KEY_EV_PRESSED; |
613 | |
614 | dev_err(&kpad->client->dev, "RESET/UNLOCK key not in keycode map\n" ); |
615 | |
616 | return -EINVAL; |
617 | } |
618 | |
619 | static int adp5589_setup(struct adp5589_kpad *kpad) |
620 | { |
621 | struct i2c_client *client = kpad->client; |
622 | const struct adp5589_kpad_platform_data *pdata = |
623 | dev_get_platdata(dev: &client->dev); |
624 | u8 (*reg) (u8) = kpad->var->reg; |
625 | unsigned char evt_mode1 = 0, evt_mode2 = 0, evt_mode3 = 0; |
626 | unsigned char pull_mask = 0; |
627 | int i, ret; |
628 | |
629 | ret = adp5589_write(client, reg: reg(ADP5589_PIN_CONFIG_A), |
630 | val: pdata->keypad_en_mask & kpad->var->row_mask); |
631 | ret |= adp5589_write(client, reg: reg(ADP5589_PIN_CONFIG_B), |
632 | val: (pdata->keypad_en_mask >> kpad->var->col_shift) & |
633 | kpad->var->col_mask); |
634 | |
635 | if (!kpad->is_adp5585) |
636 | ret |= adp5589_write(client, ADP5589_PIN_CONFIG_C, |
637 | val: (pdata->keypad_en_mask >> 16) & 0xFF); |
638 | |
639 | if (!kpad->is_adp5585 && pdata->en_keylock) { |
640 | ret |= adp5589_write(client, ADP5589_UNLOCK1, |
641 | val: pdata->unlock_key1); |
642 | ret |= adp5589_write(client, ADP5589_UNLOCK2, |
643 | val: pdata->unlock_key2); |
644 | ret |= adp5589_write(client, ADP5589_UNLOCK_TIMERS, |
645 | val: pdata->unlock_timer & LTIME_MASK); |
646 | ret |= adp5589_write(client, ADP5589_LOCK_CFG, LOCK_EN); |
647 | } |
648 | |
649 | for (i = 0; i < KEYP_MAX_EVENT; i++) |
650 | ret |= adp5589_read(client, ADP5589_5_FIFO_1 + i); |
651 | |
652 | for (i = 0; i < pdata->gpimapsize; i++) { |
653 | unsigned short pin = pdata->gpimap[i].pin; |
654 | |
655 | if (pin <= kpad->var->gpi_pin_row_end) { |
656 | evt_mode1 |= BIT(pin - kpad->var->gpi_pin_row_base); |
657 | } else { |
658 | evt_mode2 |= |
659 | BIT(pin - kpad->var->gpi_pin_col_base) & 0xFF; |
660 | if (!kpad->is_adp5585) |
661 | evt_mode3 |= |
662 | BIT(pin - kpad->var->gpi_pin_col_base) >> 8; |
663 | } |
664 | } |
665 | |
666 | if (pdata->gpimapsize) { |
667 | ret |= adp5589_write(client, reg: reg(ADP5589_GPI_EVENT_EN_A), |
668 | val: evt_mode1); |
669 | ret |= adp5589_write(client, reg: reg(ADP5589_GPI_EVENT_EN_B), |
670 | val: evt_mode2); |
671 | if (!kpad->is_adp5585) |
672 | ret |= adp5589_write(client, |
673 | reg: reg(ADP5589_GPI_EVENT_EN_C), |
674 | val: evt_mode3); |
675 | } |
676 | |
677 | if (pdata->pull_dis_mask & pdata->pullup_en_100k & |
678 | pdata->pullup_en_300k & pdata->pulldown_en_300k) |
679 | dev_warn(&client->dev, "Conflicting pull resistor config\n" ); |
680 | |
681 | for (i = 0; i <= kpad->var->max_row_num; i++) { |
682 | unsigned int val = 0, bit = BIT(i); |
683 | if (pdata->pullup_en_300k & bit) |
684 | val = 0; |
685 | else if (pdata->pulldown_en_300k & bit) |
686 | val = 1; |
687 | else if (pdata->pullup_en_100k & bit) |
688 | val = 2; |
689 | else if (pdata->pull_dis_mask & bit) |
690 | val = 3; |
691 | |
692 | pull_mask |= val << (2 * (i & 0x3)); |
693 | |
694 | if (i % 4 == 3 || i == kpad->var->max_row_num) { |
695 | ret |= adp5589_write(client, reg: reg(ADP5585_RPULL_CONFIG_A) |
696 | + (i >> 2), val: pull_mask); |
697 | pull_mask = 0; |
698 | } |
699 | } |
700 | |
701 | for (i = 0; i <= kpad->var->max_col_num; i++) { |
702 | unsigned int val = 0, bit = BIT(i + kpad->var->col_shift); |
703 | if (pdata->pullup_en_300k & bit) |
704 | val = 0; |
705 | else if (pdata->pulldown_en_300k & bit) |
706 | val = 1; |
707 | else if (pdata->pullup_en_100k & bit) |
708 | val = 2; |
709 | else if (pdata->pull_dis_mask & bit) |
710 | val = 3; |
711 | |
712 | pull_mask |= val << (2 * (i & 0x3)); |
713 | |
714 | if (i % 4 == 3 || i == kpad->var->max_col_num) { |
715 | ret |= adp5589_write(client, |
716 | reg: reg(ADP5585_RPULL_CONFIG_C) + |
717 | (i >> 2), val: pull_mask); |
718 | pull_mask = 0; |
719 | } |
720 | } |
721 | |
722 | if (pdata->reset1_key_1 && pdata->reset1_key_2 && pdata->reset1_key_3) { |
723 | ret |= adp5589_write(client, reg: reg(ADP5589_RESET1_EVENT_A), |
724 | val: adp5589_get_evcode(kpad, |
725 | key: pdata->reset1_key_1)); |
726 | ret |= adp5589_write(client, reg: reg(ADP5589_RESET1_EVENT_B), |
727 | val: adp5589_get_evcode(kpad, |
728 | key: pdata->reset1_key_2)); |
729 | ret |= adp5589_write(client, reg: reg(ADP5589_RESET1_EVENT_C), |
730 | val: adp5589_get_evcode(kpad, |
731 | key: pdata->reset1_key_3)); |
732 | kpad->extend_cfg |= R4_EXTEND_CFG; |
733 | } |
734 | |
735 | if (pdata->reset2_key_1 && pdata->reset2_key_2) { |
736 | ret |= adp5589_write(client, reg: reg(ADP5589_RESET2_EVENT_A), |
737 | val: adp5589_get_evcode(kpad, |
738 | key: pdata->reset2_key_1)); |
739 | ret |= adp5589_write(client, reg: reg(ADP5589_RESET2_EVENT_B), |
740 | val: adp5589_get_evcode(kpad, |
741 | key: pdata->reset2_key_2)); |
742 | kpad->extend_cfg |= C4_EXTEND_CFG; |
743 | } |
744 | |
745 | if (kpad->extend_cfg) { |
746 | ret |= adp5589_write(client, reg: reg(ADP5589_RESET_CFG), |
747 | val: pdata->reset_cfg); |
748 | ret |= adp5589_write(client, reg: reg(ADP5589_PIN_CONFIG_D), |
749 | val: kpad->extend_cfg); |
750 | } |
751 | |
752 | ret |= adp5589_write(client, reg: reg(ADP5589_DEBOUNCE_DIS_A), |
753 | val: pdata->debounce_dis_mask & kpad->var->row_mask); |
754 | |
755 | ret |= adp5589_write(client, reg: reg(ADP5589_DEBOUNCE_DIS_B), |
756 | val: (pdata->debounce_dis_mask >> kpad->var->col_shift) |
757 | & kpad->var->col_mask); |
758 | |
759 | if (!kpad->is_adp5585) |
760 | ret |= adp5589_write(client, reg: reg(ADP5589_DEBOUNCE_DIS_C), |
761 | val: (pdata->debounce_dis_mask >> 16) & 0xFF); |
762 | |
763 | ret |= adp5589_write(client, reg: reg(ADP5589_POLL_PTIME_CFG), |
764 | val: pdata->scan_cycle_time & PTIME_MASK); |
765 | ret |= adp5589_write(client, ADP5589_5_INT_STATUS, |
766 | val: (kpad->is_adp5585 ? 0 : LOGIC2_INT) | |
767 | LOGIC1_INT | OVRFLOW_INT | |
768 | (kpad->is_adp5585 ? 0 : LOCK_INT) | |
769 | GPI_INT | EVENT_INT); /* Status is W1C */ |
770 | |
771 | ret |= adp5589_write(client, reg: reg(ADP5589_GENERAL_CFG), |
772 | INT_CFG | OSC_EN | CORE_CLK(3)); |
773 | ret |= adp5589_write(client, reg: reg(ADP5589_INT_EN), |
774 | OVRFLOW_IEN | GPI_IEN | EVENT_IEN); |
775 | |
776 | if (ret < 0) { |
777 | dev_err(&client->dev, "Write Error\n" ); |
778 | return ret; |
779 | } |
780 | |
781 | return 0; |
782 | } |
783 | |
784 | static void adp5589_report_switch_state(struct adp5589_kpad *kpad) |
785 | { |
786 | int gpi_stat_tmp, pin_loc; |
787 | int i; |
788 | int gpi_stat1 = adp5589_read(client: kpad->client, |
789 | reg: kpad->var->reg(ADP5589_GPI_STATUS_A)); |
790 | int gpi_stat2 = adp5589_read(client: kpad->client, |
791 | reg: kpad->var->reg(ADP5589_GPI_STATUS_B)); |
792 | int gpi_stat3 = !kpad->is_adp5585 ? |
793 | adp5589_read(client: kpad->client, ADP5589_GPI_STATUS_C) : 0; |
794 | |
795 | for (i = 0; i < kpad->gpimapsize; i++) { |
796 | unsigned short pin = kpad->gpimap[i].pin; |
797 | |
798 | if (pin <= kpad->var->gpi_pin_row_end) { |
799 | gpi_stat_tmp = gpi_stat1; |
800 | pin_loc = pin - kpad->var->gpi_pin_row_base; |
801 | } else if ((pin - kpad->var->gpi_pin_col_base) < 8) { |
802 | gpi_stat_tmp = gpi_stat2; |
803 | pin_loc = pin - kpad->var->gpi_pin_col_base; |
804 | } else { |
805 | gpi_stat_tmp = gpi_stat3; |
806 | pin_loc = pin - kpad->var->gpi_pin_col_base - 8; |
807 | } |
808 | |
809 | if (gpi_stat_tmp < 0) { |
810 | dev_err(&kpad->client->dev, |
811 | "Can't read GPIO_DAT_STAT switch %d, default to OFF\n" , |
812 | pin); |
813 | gpi_stat_tmp = 0; |
814 | } |
815 | |
816 | input_report_switch(dev: kpad->input, |
817 | code: kpad->gpimap[i].sw_evt, |
818 | value: !(gpi_stat_tmp & BIT(pin_loc))); |
819 | } |
820 | |
821 | input_sync(dev: kpad->input); |
822 | } |
823 | |
824 | static int adp5589_keypad_add(struct adp5589_kpad *kpad, unsigned int revid) |
825 | { |
826 | struct i2c_client *client = kpad->client; |
827 | const struct adp5589_kpad_platform_data *pdata = |
828 | dev_get_platdata(dev: &client->dev); |
829 | struct input_dev *input; |
830 | unsigned int i; |
831 | int error; |
832 | |
833 | if (!((pdata->keypad_en_mask & kpad->var->row_mask) && |
834 | (pdata->keypad_en_mask >> kpad->var->col_shift)) || |
835 | !pdata->keymap) { |
836 | dev_err(&client->dev, "no rows, cols or keymap from pdata\n" ); |
837 | return -EINVAL; |
838 | } |
839 | |
840 | if (pdata->keymapsize != kpad->var->keymapsize) { |
841 | dev_err(&client->dev, "invalid keymapsize\n" ); |
842 | return -EINVAL; |
843 | } |
844 | |
845 | if (!pdata->gpimap && pdata->gpimapsize) { |
846 | dev_err(&client->dev, "invalid gpimap from pdata\n" ); |
847 | return -EINVAL; |
848 | } |
849 | |
850 | if (pdata->gpimapsize > kpad->var->gpimapsize_max) { |
851 | dev_err(&client->dev, "invalid gpimapsize\n" ); |
852 | return -EINVAL; |
853 | } |
854 | |
855 | for (i = 0; i < pdata->gpimapsize; i++) { |
856 | unsigned short pin = pdata->gpimap[i].pin; |
857 | |
858 | if (pin < kpad->var->gpi_pin_base || |
859 | pin > kpad->var->gpi_pin_end) { |
860 | dev_err(&client->dev, "invalid gpi pin data\n" ); |
861 | return -EINVAL; |
862 | } |
863 | |
864 | if (BIT(pin - kpad->var->gpi_pin_row_base) & |
865 | pdata->keypad_en_mask) { |
866 | dev_err(&client->dev, "invalid gpi row/col data\n" ); |
867 | return -EINVAL; |
868 | } |
869 | } |
870 | |
871 | if (!client->irq) { |
872 | dev_err(&client->dev, "no IRQ?\n" ); |
873 | return -EINVAL; |
874 | } |
875 | |
876 | input = devm_input_allocate_device(&client->dev); |
877 | if (!input) |
878 | return -ENOMEM; |
879 | |
880 | kpad->input = input; |
881 | |
882 | input->name = client->name; |
883 | input->phys = "adp5589-keys/input0" ; |
884 | input->dev.parent = &client->dev; |
885 | |
886 | input_set_drvdata(dev: input, data: kpad); |
887 | |
888 | input->id.bustype = BUS_I2C; |
889 | input->id.vendor = 0x0001; |
890 | input->id.product = 0x0001; |
891 | input->id.version = revid; |
892 | |
893 | input->keycodesize = sizeof(kpad->keycode[0]); |
894 | input->keycodemax = pdata->keymapsize; |
895 | input->keycode = kpad->keycode; |
896 | |
897 | memcpy(kpad->keycode, pdata->keymap, |
898 | pdata->keymapsize * input->keycodesize); |
899 | |
900 | kpad->gpimap = pdata->gpimap; |
901 | kpad->gpimapsize = pdata->gpimapsize; |
902 | |
903 | /* setup input device */ |
904 | __set_bit(EV_KEY, input->evbit); |
905 | |
906 | if (pdata->repeat) |
907 | __set_bit(EV_REP, input->evbit); |
908 | |
909 | for (i = 0; i < input->keycodemax; i++) |
910 | if (kpad->keycode[i] <= KEY_MAX) |
911 | __set_bit(kpad->keycode[i], input->keybit); |
912 | __clear_bit(KEY_RESERVED, input->keybit); |
913 | |
914 | if (kpad->gpimapsize) |
915 | __set_bit(EV_SW, input->evbit); |
916 | for (i = 0; i < kpad->gpimapsize; i++) |
917 | __set_bit(kpad->gpimap[i].sw_evt, input->swbit); |
918 | |
919 | error = input_register_device(input); |
920 | if (error) { |
921 | dev_err(&client->dev, "unable to register input device\n" ); |
922 | return error; |
923 | } |
924 | |
925 | error = devm_request_threaded_irq(dev: &client->dev, irq: client->irq, |
926 | NULL, thread_fn: adp5589_irq, |
927 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
928 | devname: client->dev.driver->name, dev_id: kpad); |
929 | if (error) { |
930 | dev_err(&client->dev, "unable to request irq %d\n" , client->irq); |
931 | return error; |
932 | } |
933 | |
934 | return 0; |
935 | } |
936 | |
937 | static void adp5589_clear_config(void *data) |
938 | { |
939 | struct i2c_client *client = data; |
940 | struct adp5589_kpad *kpad = i2c_get_clientdata(client); |
941 | |
942 | adp5589_write(client, reg: kpad->var->reg(ADP5589_GENERAL_CFG), val: 0); |
943 | } |
944 | |
945 | static int adp5589_probe(struct i2c_client *client) |
946 | { |
947 | const struct i2c_device_id *id = i2c_client_get_device_id(client); |
948 | struct adp5589_kpad *kpad; |
949 | const struct adp5589_kpad_platform_data *pdata = |
950 | dev_get_platdata(dev: &client->dev); |
951 | unsigned int revid; |
952 | int error, ret; |
953 | |
954 | if (!i2c_check_functionality(adap: client->adapter, |
955 | I2C_FUNC_SMBUS_BYTE_DATA)) { |
956 | dev_err(&client->dev, "SMBUS Byte Data not Supported\n" ); |
957 | return -EIO; |
958 | } |
959 | |
960 | if (!pdata) { |
961 | dev_err(&client->dev, "no platform data?\n" ); |
962 | return -EINVAL; |
963 | } |
964 | |
965 | kpad = devm_kzalloc(dev: &client->dev, size: sizeof(*kpad), GFP_KERNEL); |
966 | if (!kpad) |
967 | return -ENOMEM; |
968 | |
969 | kpad->client = client; |
970 | |
971 | switch (id->driver_data) { |
972 | case ADP5585_02: |
973 | kpad->support_row5 = true; |
974 | fallthrough; |
975 | case ADP5585_01: |
976 | kpad->is_adp5585 = true; |
977 | kpad->var = &const_adp5585; |
978 | break; |
979 | case ADP5589: |
980 | kpad->support_row5 = true; |
981 | kpad->var = &const_adp5589; |
982 | break; |
983 | } |
984 | |
985 | error = devm_add_action_or_reset(&client->dev, adp5589_clear_config, |
986 | client); |
987 | if (error) |
988 | return error; |
989 | |
990 | ret = adp5589_read(client, ADP5589_5_ID); |
991 | if (ret < 0) |
992 | return ret; |
993 | |
994 | revid = (u8) ret & ADP5589_5_DEVICE_ID_MASK; |
995 | |
996 | if (pdata->keymapsize) { |
997 | error = adp5589_keypad_add(kpad, revid); |
998 | if (error) |
999 | return error; |
1000 | } |
1001 | |
1002 | error = adp5589_setup(kpad); |
1003 | if (error) |
1004 | return error; |
1005 | |
1006 | if (kpad->gpimapsize) |
1007 | adp5589_report_switch_state(kpad); |
1008 | |
1009 | error = adp5589_gpio_add(kpad); |
1010 | if (error) |
1011 | return error; |
1012 | |
1013 | i2c_set_clientdata(client, data: kpad); |
1014 | |
1015 | dev_info(&client->dev, "Rev.%d keypad, irq %d\n" , revid, client->irq); |
1016 | return 0; |
1017 | } |
1018 | |
1019 | static int adp5589_suspend(struct device *dev) |
1020 | { |
1021 | struct i2c_client *client = to_i2c_client(dev); |
1022 | struct adp5589_kpad *kpad = i2c_get_clientdata(client); |
1023 | |
1024 | if (kpad->input) |
1025 | disable_irq(irq: client->irq); |
1026 | |
1027 | return 0; |
1028 | } |
1029 | |
1030 | static int adp5589_resume(struct device *dev) |
1031 | { |
1032 | struct i2c_client *client = to_i2c_client(dev); |
1033 | struct adp5589_kpad *kpad = i2c_get_clientdata(client); |
1034 | |
1035 | if (kpad->input) |
1036 | enable_irq(irq: client->irq); |
1037 | |
1038 | return 0; |
1039 | } |
1040 | |
1041 | static DEFINE_SIMPLE_DEV_PM_OPS(adp5589_dev_pm_ops, adp5589_suspend, adp5589_resume); |
1042 | |
1043 | static const struct i2c_device_id adp5589_id[] = { |
1044 | {"adp5589-keys" , ADP5589}, |
1045 | {"adp5585-keys" , ADP5585_01}, |
1046 | {"adp5585-02-keys" , ADP5585_02}, /* Adds ROW5 to ADP5585 */ |
1047 | {} |
1048 | }; |
1049 | |
1050 | MODULE_DEVICE_TABLE(i2c, adp5589_id); |
1051 | |
1052 | static struct i2c_driver adp5589_driver = { |
1053 | .driver = { |
1054 | .name = KBUILD_MODNAME, |
1055 | .pm = pm_sleep_ptr(&adp5589_dev_pm_ops), |
1056 | }, |
1057 | .probe = adp5589_probe, |
1058 | .id_table = adp5589_id, |
1059 | }; |
1060 | |
1061 | module_i2c_driver(adp5589_driver); |
1062 | |
1063 | MODULE_LICENSE("GPL" ); |
1064 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>" ); |
1065 | MODULE_DESCRIPTION("ADP5589/ADP5585 Keypad driver" ); |
1066 | |