1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Copyright (C) 2013 Aeroflex Gaisler |
4 | * |
5 | * This driver supports the APBPS2 PS/2 core available in the GRLIB |
6 | * VHDL IP core library. |
7 | * |
8 | * Full documentation of the APBPS2 core can be found here: |
9 | * http://www.gaisler.com/products/grlib/grip.pdf |
10 | * |
11 | * See "Documentation/devicetree/bindings/input/ps2keyb-mouse-apbps2.txt" for |
12 | * information on open firmware properties. |
13 | * |
14 | * Contributors: Daniel Hellstrom <daniel@gaisler.com> |
15 | */ |
16 | #include <linux/platform_device.h> |
17 | #include <linux/module.h> |
18 | #include <linux/serio.h> |
19 | #include <linux/errno.h> |
20 | #include <linux/interrupt.h> |
21 | #include <linux/of.h> |
22 | #include <linux/of_irq.h> |
23 | #include <linux/device.h> |
24 | #include <linux/delay.h> |
25 | #include <linux/err.h> |
26 | #include <linux/slab.h> |
27 | #include <linux/string.h> |
28 | #include <linux/kernel.h> |
29 | #include <linux/io.h> |
30 | |
31 | struct apbps2_regs { |
32 | u32 __iomem data; /* 0x00 */ |
33 | u32 __iomem status; /* 0x04 */ |
34 | u32 __iomem ctrl; /* 0x08 */ |
35 | u32 __iomem reload; /* 0x0c */ |
36 | }; |
37 | |
38 | #define APBPS2_STATUS_DR (1<<0) |
39 | #define APBPS2_STATUS_PE (1<<1) |
40 | #define APBPS2_STATUS_FE (1<<2) |
41 | #define APBPS2_STATUS_KI (1<<3) |
42 | #define APBPS2_STATUS_RF (1<<4) |
43 | #define APBPS2_STATUS_TF (1<<5) |
44 | #define APBPS2_STATUS_TCNT (0x1f<<22) |
45 | #define APBPS2_STATUS_RCNT (0x1f<<27) |
46 | |
47 | #define APBPS2_CTRL_RE (1<<0) |
48 | #define APBPS2_CTRL_TE (1<<1) |
49 | #define APBPS2_CTRL_RI (1<<2) |
50 | #define APBPS2_CTRL_TI (1<<3) |
51 | |
52 | struct apbps2_priv { |
53 | struct serio *io; |
54 | struct apbps2_regs __iomem *regs; |
55 | }; |
56 | |
57 | static int apbps2_idx; |
58 | |
59 | static irqreturn_t apbps2_isr(int irq, void *dev_id) |
60 | { |
61 | struct apbps2_priv *priv = dev_id; |
62 | unsigned long status, data, rxflags; |
63 | irqreturn_t ret = IRQ_NONE; |
64 | |
65 | while ((status = ioread32be(&priv->regs->status)) & APBPS2_STATUS_DR) { |
66 | data = ioread32be(&priv->regs->data); |
67 | rxflags = (status & APBPS2_STATUS_PE) ? SERIO_PARITY : 0; |
68 | rxflags |= (status & APBPS2_STATUS_FE) ? SERIO_FRAME : 0; |
69 | |
70 | /* clear error bits? */ |
71 | if (rxflags) |
72 | iowrite32be(0, &priv->regs->status); |
73 | |
74 | serio_interrupt(serio: priv->io, data, flags: rxflags); |
75 | |
76 | ret = IRQ_HANDLED; |
77 | } |
78 | |
79 | return ret; |
80 | } |
81 | |
82 | static int apbps2_write(struct serio *io, unsigned char val) |
83 | { |
84 | struct apbps2_priv *priv = io->port_data; |
85 | unsigned int tleft = 10000; /* timeout in 100ms */ |
86 | |
87 | /* delay until PS/2 controller has room for more chars */ |
88 | while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) && tleft--) |
89 | udelay(10); |
90 | |
91 | if ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) == 0) { |
92 | iowrite32be(val, &priv->regs->data); |
93 | |
94 | iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI | APBPS2_CTRL_TE, |
95 | &priv->regs->ctrl); |
96 | return 0; |
97 | } |
98 | |
99 | return -ETIMEDOUT; |
100 | } |
101 | |
102 | static int apbps2_open(struct serio *io) |
103 | { |
104 | struct apbps2_priv *priv = io->port_data; |
105 | int limit; |
106 | |
107 | /* clear error flags */ |
108 | iowrite32be(0, &priv->regs->status); |
109 | |
110 | /* Clear old data if available (unlikely) */ |
111 | limit = 1024; |
112 | while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_DR) && --limit) |
113 | ioread32be(&priv->regs->data); |
114 | |
115 | /* Enable reciever and it's interrupt */ |
116 | iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI, &priv->regs->ctrl); |
117 | |
118 | return 0; |
119 | } |
120 | |
121 | static void apbps2_close(struct serio *io) |
122 | { |
123 | struct apbps2_priv *priv = io->port_data; |
124 | |
125 | /* stop interrupts at PS/2 HW level */ |
126 | iowrite32be(0, &priv->regs->ctrl); |
127 | } |
128 | |
129 | /* Initialize one APBPS2 PS/2 core */ |
130 | static int apbps2_of_probe(struct platform_device *ofdev) |
131 | { |
132 | struct apbps2_priv *priv; |
133 | int irq, err; |
134 | u32 freq_hz; |
135 | |
136 | priv = devm_kzalloc(dev: &ofdev->dev, size: sizeof(*priv), GFP_KERNEL); |
137 | if (!priv) { |
138 | dev_err(&ofdev->dev, "memory allocation failed\n" ); |
139 | return -ENOMEM; |
140 | } |
141 | |
142 | /* Find Device Address */ |
143 | priv->regs = devm_platform_get_and_ioremap_resource(pdev: ofdev, index: 0, NULL); |
144 | if (IS_ERR(ptr: priv->regs)) |
145 | return PTR_ERR(ptr: priv->regs); |
146 | |
147 | /* Reset hardware, disable interrupt */ |
148 | iowrite32be(0, &priv->regs->ctrl); |
149 | |
150 | /* IRQ */ |
151 | irq = irq_of_parse_and_map(node: ofdev->dev.of_node, index: 0); |
152 | err = devm_request_irq(dev: &ofdev->dev, irq, handler: apbps2_isr, |
153 | IRQF_SHARED, devname: "apbps2" , dev_id: priv); |
154 | if (err) { |
155 | dev_err(&ofdev->dev, "request IRQ%d failed\n" , irq); |
156 | return err; |
157 | } |
158 | |
159 | /* Get core frequency */ |
160 | if (of_property_read_u32(np: ofdev->dev.of_node, propname: "freq" , out_value: &freq_hz)) { |
161 | dev_err(&ofdev->dev, "unable to get core frequency\n" ); |
162 | return -EINVAL; |
163 | } |
164 | |
165 | /* Set reload register to core freq in kHz/10 */ |
166 | iowrite32be(freq_hz / 10000, &priv->regs->reload); |
167 | |
168 | priv->io = kzalloc(size: sizeof(struct serio), GFP_KERNEL); |
169 | if (!priv->io) |
170 | return -ENOMEM; |
171 | |
172 | priv->io->id.type = SERIO_8042; |
173 | priv->io->open = apbps2_open; |
174 | priv->io->close = apbps2_close; |
175 | priv->io->write = apbps2_write; |
176 | priv->io->port_data = priv; |
177 | strscpy(p: priv->io->name, q: "APBPS2 PS/2" , size: sizeof(priv->io->name)); |
178 | snprintf(buf: priv->io->phys, size: sizeof(priv->io->phys), |
179 | fmt: "apbps2_%d" , apbps2_idx++); |
180 | |
181 | dev_info(&ofdev->dev, "irq = %d, base = 0x%p\n" , irq, priv->regs); |
182 | |
183 | serio_register_port(priv->io); |
184 | |
185 | platform_set_drvdata(pdev: ofdev, data: priv); |
186 | |
187 | return 0; |
188 | } |
189 | |
190 | static int apbps2_of_remove(struct platform_device *of_dev) |
191 | { |
192 | struct apbps2_priv *priv = platform_get_drvdata(pdev: of_dev); |
193 | |
194 | serio_unregister_port(serio: priv->io); |
195 | |
196 | return 0; |
197 | } |
198 | |
199 | static const struct of_device_id apbps2_of_match[] = { |
200 | { .name = "GAISLER_APBPS2" , }, |
201 | { .name = "01_060" , }, |
202 | {} |
203 | }; |
204 | |
205 | MODULE_DEVICE_TABLE(of, apbps2_of_match); |
206 | |
207 | static struct platform_driver apbps2_of_driver = { |
208 | .driver = { |
209 | .name = "grlib-apbps2" , |
210 | .of_match_table = apbps2_of_match, |
211 | }, |
212 | .probe = apbps2_of_probe, |
213 | .remove = apbps2_of_remove, |
214 | }; |
215 | |
216 | module_platform_driver(apbps2_of_driver); |
217 | |
218 | MODULE_AUTHOR("Aeroflex Gaisler AB." ); |
219 | MODULE_DESCRIPTION("GRLIB APBPS2 PS/2 serial I/O" ); |
220 | MODULE_LICENSE("GPL" ); |
221 | |